Lines Matching +full:0 +full:x440
11 #define DMM_REVISION 0x000
12 #define DMM_HWINFO 0x004
13 #define DMM_LISA_HWINFO 0x008
14 #define DMM_DMM_SYSCONFIG 0x010
15 #define DMM_LISA_LOCK 0x01C
16 #define DMM_LISA_MAP__0 0x040
17 #define DMM_LISA_MAP__1 0x044
18 #define DMM_TILER_HWINFO 0x208
19 #define DMM_TILER_OR__0 0x220
20 #define DMM_TILER_OR__1 0x224
21 #define DMM_PAT_HWINFO 0x408
22 #define DMM_PAT_GEOMETRY 0x40C
23 #define DMM_PAT_CONFIG 0x410
24 #define DMM_PAT_VIEW__0 0x420
25 #define DMM_PAT_VIEW__1 0x424
26 #define DMM_PAT_VIEW_MAP__0 0x440
27 #define DMM_PAT_VIEW_MAP_BASE 0x460
28 #define DMM_PAT_IRQ_EOI 0x478
29 #define DMM_PAT_IRQSTATUS_RAW 0x480
30 #define DMM_PAT_IRQSTATUS 0x490
31 #define DMM_PAT_IRQENABLE_SET 0x4A0
32 #define DMM_PAT_IRQENABLE_CLR 0x4B0
33 #define DMM_PAT_STATUS__0 0x4C0
34 #define DMM_PAT_STATUS__1 0x4C4
35 #define DMM_PAT_STATUS__2 0x4C8
36 #define DMM_PAT_STATUS__3 0x4CC
37 #define DMM_PAT_DESCR__0 0x500
38 #define DMM_PAT_DESCR__1 0x510
39 #define DMM_PAT_DESCR__2 0x520
40 #define DMM_PAT_DESCR__3 0x530
41 #define DMM_PEG_HWINFO 0x608
42 #define DMM_PEG_PRIO 0x620
43 #define DMM_PEG_PRIO_PAT 0x640
45 #define DMM_IRQSTAT_DST (1<<0)
61 #define DMM_PATSTATUS_READY (1<<0)