Lines Matching +full:no +full:- +full:wp
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
31 #include <sound/omap-hdmi-audio.h>
47 r = pm_runtime_get_sync(&hdmi->pdev->dev);
49 pm_runtime_put_noidle(&hdmi->pdev->dev);
61 r = pm_runtime_put_sync(&hdmi->pdev->dev);
62 WARN_ON(r < 0 && r != -ENOSYS);
68 struct hdmi_wp_data *wp = &hdmi->wp;
71 irqstatus = hdmi_wp_get_irqstatus(wp);
72 hdmi_wp_set_irqstatus(wp, irqstatus);
84 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
91 v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
94 hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
96 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
99 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
101 REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
104 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
106 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
116 r = regulator_enable(hdmi->vdda_reg);
125 dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
127 hdmi->core_enabled = true;
132 regulator_disable(hdmi->vdda_reg);
139 hdmi->core_enabled = false;
142 regulator_disable(hdmi->vdda_reg);
156 vm = &hdmi->cfg.vm;
158 DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
159 vm->vactive);
161 pc = vm->pixelclock;
162 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
168 dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
172 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
173 hdmi_wp_set_irqstatus(&hdmi->wp,
174 hdmi_wp_get_irqstatus(&hdmi->wp));
176 r = dss_pll_enable(&hdmi->pll.pll);
182 r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
188 r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
195 r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON);
199 hdmi5_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
201 r = dss_mgr_enable(&hdmi->output);
205 r = hdmi_wp_video_start(&hdmi->wp);
209 hdmi_wp_set_irqenable(&hdmi->wp,
215 dss_mgr_disable(&hdmi->output);
217 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
221 dss_pll_disable(&hdmi->pll.pll);
224 return -EIO;
229 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
231 hdmi_wp_video_stop(&hdmi->wp);
233 dss_mgr_disable(&hdmi->output);
235 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
237 dss_pll_disable(&hdmi->pll.pll);
244 struct omap_hdmi *hdmi = s->private;
246 mutex_lock(&hdmi->lock);
249 mutex_unlock(&hdmi->lock);
253 hdmi_wp_dump(&hdmi->wp, s);
254 hdmi_pll_dump(&hdmi->pll, s);
255 hdmi_phy_dump(&hdmi->phy, s);
256 hdmi5_core_dump(&hdmi->core, s);
259 mutex_unlock(&hdmi->lock);
265 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
266 hdmi_wp_audio_enable(&hd->wp, true);
267 hdmi_wp_audio_core_req_enable(&hd->wp, true);
272 hdmi_wp_audio_core_req_enable(&hd->wp, false);
273 hdmi_wp_audio_enable(&hd->wp, false);
274 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
283 mutex_lock(&hdmi->lock);
291 mutex_unlock(&hdmi->lock);
295 mutex_unlock(&hdmi->lock);
303 mutex_lock(&hdmi->lock);
307 mutex_unlock(&hdmi->lock);
310 /* -----------------------------------------------------------------------------
320 return -EINVAL;
322 return drm_bridge_attach(bridge->encoder, hdmi->output.next_bridge,
332 mutex_lock(&hdmi->lock);
334 drm_display_mode_to_videomode(adjusted_mode, &hdmi->cfg.vm);
336 dispc_set_tv_pclk(hdmi->dss->dispc, adjusted_mode->clock * 1000);
338 mutex_unlock(&hdmi->lock);
356 bridge->encoder);
362 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
366 hdmi->cfg.hdmi_dvi_mode = connector->display_info.is_hdmi
369 if (connector->display_info.is_hdmi) {
373 mode = &crtc_state->adjusted_mode;
377 hdmi->cfg.infoframe = avi;
380 mutex_lock(&hdmi->lock);
388 if (hdmi->audio_configured) {
389 ret = hdmi5_audio_config(&hdmi->core, &hdmi->wp,
390 &hdmi->audio_config,
391 hdmi->cfg.vm.pixelclock);
394 hdmi->audio_abort_cb(&hdmi->pdev->dev);
395 hdmi->audio_configured = false;
399 spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
400 if (hdmi->audio_configured && hdmi->audio_playing)
402 hdmi->display_enabled = true;
403 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
406 mutex_unlock(&hdmi->lock);
415 mutex_lock(&hdmi->lock);
417 spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
419 hdmi->display_enabled = false;
420 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
424 mutex_unlock(&hdmi->lock);
436 need_enable = hdmi->core_enabled == false;
444 mutex_lock(&hdmi->lock);
448 idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
449 /* No-idle mode */
450 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
452 hdmi5_core_ddc_init(&hdmi->core);
454 drm_edid = drm_edid_read_custom(connector, hdmi5_core_ddc_read, &hdmi->core);
456 hdmi5_core_ddc_uninit(&hdmi->core);
458 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
461 mutex_unlock(&hdmi->lock);
482 hdmi->bridge.funcs = &hdmi5_bridge_funcs;
483 hdmi->bridge.of_node = hdmi->pdev->dev.of_node;
484 hdmi->bridge.ops = DRM_BRIDGE_OP_EDID;
485 hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
487 drm_bridge_add(&hdmi->bridge);
492 drm_bridge_remove(&hdmi->bridge);
495 /* -----------------------------------------------------------------------------
504 mutex_lock(&hd->lock);
506 WARN_ON(hd->audio_abort_cb != NULL);
508 hd->audio_abort_cb = abort_cb;
510 mutex_unlock(&hd->lock);
519 mutex_lock(&hd->lock);
520 hd->audio_abort_cb = NULL;
521 hd->audio_configured = false;
522 hd->audio_playing = false;
523 mutex_unlock(&hd->lock);
533 spin_lock_irqsave(&hd->audio_playing_lock, flags);
535 if (hd->display_enabled) {
536 if (!hdmi_mode_has_audio(&hd->cfg))
541 hd->audio_playing = true;
543 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
552 if (!hdmi_mode_has_audio(&hd->cfg))
555 spin_lock_irqsave(&hd->audio_playing_lock, flags);
557 if (hd->display_enabled)
559 hd->audio_playing = false;
561 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
570 mutex_lock(&hd->lock);
572 if (hd->display_enabled) {
573 ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
574 hd->cfg.vm.pixelclock);
579 hd->audio_configured = true;
580 hd->audio_config = *dss_audio;
582 mutex_unlock(&hd->lock);
598 .dev = &hdmi->pdev->dev,
600 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
604 hdmi->audio_pdev = platform_device_register_data(
605 &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
608 if (IS_ERR(hdmi->audio_pdev))
609 return PTR_ERR(hdmi->audio_pdev);
612 hdmi->wp_idlemode =
613 REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
619 /* -----------------------------------------------------------------------------
629 hdmi->dss = dss;
631 r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp);
641 hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
647 hdmi_pll_uninit(&hdmi->pll);
655 dss_debugfs_remove_file(hdmi->debugfs);
657 if (hdmi->audio_pdev)
658 platform_device_unregister(hdmi->audio_pdev);
660 hdmi_pll_uninit(&hdmi->pll);
668 /* -----------------------------------------------------------------------------
674 struct omap_dss_device *out = &hdmi->output;
679 out->dev = &hdmi->pdev->dev;
680 out->id = OMAP_DSS_OUTPUT_HDMI;
681 out->type = OMAP_DISPLAY_TYPE_HDMI;
682 out->name = "hdmi.0";
683 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
684 out->of_port = 0;
686 r = omapdss_device_init_output(out, &hdmi->bridge);
699 struct omap_dss_device *out = &hdmi->output;
709 struct platform_device *pdev = hdmi->pdev;
710 struct device_node *node = pdev->dev.of_node;
718 r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
731 return -ENOMEM;
733 hdmi->pdev = pdev;
735 dev_set_drvdata(&pdev->dev, hdmi);
737 mutex_init(&hdmi->lock);
738 spin_lock_init(&hdmi->audio_playing_lock);
744 r = hdmi_wp_init(pdev, &hdmi->wp, 5);
748 r = hdmi_phy_init(pdev, &hdmi->phy, 5);
752 r = hdmi5_core_init(pdev, &hdmi->core);
759 r = -ENODEV;
763 r = devm_request_threaded_irq(&pdev->dev, irq,
771 hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda");
772 if (IS_ERR(hdmi->vdda_reg)) {
773 r = PTR_ERR(hdmi->vdda_reg);
774 if (r != -EPROBE_DEFER)
779 pm_runtime_enable(&pdev->dev);
785 r = component_add(&pdev->dev, &hdmi5_component_ops);
794 pm_runtime_disable(&pdev->dev);
804 component_del(&pdev->dev, &hdmi5_component_ops);
808 pm_runtime_disable(&pdev->dev);
814 { .compatible = "ti,omap5-hdmi", },
815 { .compatible = "ti,dra7-hdmi", },