Lines Matching refs:hwsq
39 struct hwsq base;
68 struct nv50_ramseq hwsq; member
183 nvkm_sddr2_dll_reset(struct nv50_ramseq *hwsq) in nvkm_sddr2_dll_reset() argument
185 ram_mask(hwsq, mr[0], 0x100, 0x100); in nvkm_sddr2_dll_reset()
186 ram_mask(hwsq, mr[0], 0x100, 0x000); in nvkm_sddr2_dll_reset()
187 ram_nsec(hwsq, 24000); in nvkm_sddr2_dll_reset()
191 nv50_ram_gpio(struct nv50_ramseq *hwsq, u8 tag, u32 val) in nv50_ram_gpio() argument
193 struct nvkm_gpio *gpio = hwsq->base.subdev->device->gpio; in nv50_ram_gpio()
205 gpio_val = ram_rd32(hwsq, gpio[reg]); in nv50_ram_gpio()
212 ram_mask(hwsq, gpio[reg], (0x3 << sh), ((val | 0x2) << sh)); in nv50_ram_gpio()
213 ram_nsec(hwsq, 20000); in nv50_ram_gpio()
221 struct nv50_ramseq *hwsq = &ram->hwsq; in nv50_ram_calc() local
281 ret = ram_init(hwsq, subdev); in nv50_ram_calc()
286 ram->base.mr[0] = ram_rd32(hwsq, mr[0]); in nv50_ram_calc()
287 ram->base.mr[1] = ram_rd32(hwsq, mr[1]); in nv50_ram_calc()
288 ram->base.mr[2] = ram_rd32(hwsq, mr[2]); in nv50_ram_calc()
305 ram_mask(hwsq, 0x100710, 0x00000200, 0x00000000); in nv50_ram_calc()
308 ram_mask(hwsq, 0x100200, 0x00000800, 0x00000000); in nv50_ram_calc()
310 ram_wait_vblank(hwsq); in nv50_ram_calc()
311 ram_wr32(hwsq, 0x611200, 0x00003300); in nv50_ram_calc()
312 ram_wr32(hwsq, 0x002504, 0x00000001); /* block fifo */ in nv50_ram_calc()
313 ram_nsec(hwsq, 8000); in nv50_ram_calc()
314 ram_setf(hwsq, 0x10, 0x00); /* disable fb */ in nv50_ram_calc()
315 ram_wait(hwsq, 0x00, 0x01); /* wait for fb disabled */ in nv50_ram_calc()
316 ram_nsec(hwsq, 2000); in nv50_ram_calc()
319 nv50_ram_gpio(hwsq, 0x2e, 1); in nv50_ram_calc()
321 ram_wr32(hwsq, 0x1002d4, 0x00000001); /* precharge */ in nv50_ram_calc()
322 ram_wr32(hwsq, 0x1002d0, 0x00000001); /* refresh */ in nv50_ram_calc()
323 ram_wr32(hwsq, 0x1002d0, 0x00000001); /* refresh */ in nv50_ram_calc()
324 ram_wr32(hwsq, 0x100210, 0x00000000); /* disable auto-refresh */ in nv50_ram_calc()
325 ram_wr32(hwsq, 0x1002dc, 0x00000001); /* enable self-refresh */ in nv50_ram_calc()
350 ram_mask(hwsq, 0x00c040, 0xc000c000, 0x0000c000); in nv50_ram_calc()
353 ram_mask(hwsq, 0x004008, 0x00004200, 0x00000200 | in nv50_ram_calc()
355 ram_mask(hwsq, 0x00400c, 0x0000ffff, (N1 << 8) | M1); in nv50_ram_calc()
356 ram_mask(hwsq, 0x004008, 0x91ff0000, r004008); in nv50_ram_calc()
360 ram_wr32(hwsq, 0x100da0, r100da0); in nv50_ram_calc()
362 nv50_ram_gpio(hwsq, 0x18, !next->bios.ramcfg_FBVDDQ); in nv50_ram_calc()
363 ram_nsec(hwsq, 64000); /*XXX*/ in nv50_ram_calc()
364 ram_nsec(hwsq, 32000); /*XXX*/ in nv50_ram_calc()
366 ram_mask(hwsq, 0x004008, 0x00002200, 0x00002000); in nv50_ram_calc()
368 ram_wr32(hwsq, 0x1002dc, 0x00000000); /* disable self-refresh */ in nv50_ram_calc()
369 ram_wr32(hwsq, 0x1002d4, 0x00000001); /* disable self-refresh */ in nv50_ram_calc()
370 ram_wr32(hwsq, 0x100210, 0x80000000); /* enable auto-refresh */ in nv50_ram_calc()
372 ram_nsec(hwsq, 12000); in nv50_ram_calc()
376 ram_nuke(hwsq, mr[0]); /* force update */ in nv50_ram_calc()
377 ram_mask(hwsq, mr[0], 0x000, 0x000); in nv50_ram_calc()
380 ram_nuke(hwsq, mr[1]); /* force update */ in nv50_ram_calc()
381 ram_wr32(hwsq, mr[1], ram->base.mr[1]); in nv50_ram_calc()
382 ram_nuke(hwsq, mr[0]); /* force update */ in nv50_ram_calc()
383 ram_wr32(hwsq, mr[0], ram->base.mr[0]); in nv50_ram_calc()
389 ram_mask(hwsq, timing[3], 0xffffffff, timing[3]); in nv50_ram_calc()
390 ram_mask(hwsq, timing[1], 0xffffffff, timing[1]); in nv50_ram_calc()
391 ram_mask(hwsq, timing[6], 0xffffffff, timing[6]); in nv50_ram_calc()
392 ram_mask(hwsq, timing[7], 0xffffffff, timing[7]); in nv50_ram_calc()
393 ram_mask(hwsq, timing[8], 0xffffffff, timing[8]); in nv50_ram_calc()
394 ram_mask(hwsq, timing[0], 0xffffffff, timing[0]); in nv50_ram_calc()
395 ram_mask(hwsq, timing[2], 0xffffffff, timing[2]); in nv50_ram_calc()
396 ram_mask(hwsq, timing[4], 0xffffffff, timing[4]); in nv50_ram_calc()
397 ram_mask(hwsq, timing[5], 0xffffffff, timing[5]); in nv50_ram_calc()
400 ram_mask(hwsq, 0x10021c, 0x00010000, 0x00000000); in nv50_ram_calc()
401 ram_mask(hwsq, 0x100200, 0x00001000, !next->bios.ramcfg_00_04_02 << 12); in nv50_ram_calc()
404 unk710 = ram_rd32(hwsq, 0x100710) & ~0x00000100; in nv50_ram_calc()
405 unk714 = ram_rd32(hwsq, 0x100714) & ~0xf0000020; in nv50_ram_calc()
406 unk718 = ram_rd32(hwsq, 0x100718) & ~0x00000100; in nv50_ram_calc()
407 unk71c = ram_rd32(hwsq, 0x10071c) & ~0x00000100; in nv50_ram_calc()
436 ram_mask(hwsq, 0x100714, 0xffffffff, unk714); in nv50_ram_calc()
437 ram_mask(hwsq, 0x10071c, 0xffffffff, unk71c); in nv50_ram_calc()
438 ram_mask(hwsq, 0x100718, 0xffffffff, unk718); in nv50_ram_calc()
439 ram_mask(hwsq, 0x100710, 0xffffffff, unk710); in nv50_ram_calc()
444 ram_wr32(hwsq, 0x1005a0, next->bios.ramcfg_00_07 << 16 | in nv50_ram_calc()
447 ram_wr32(hwsq, 0x1005a4, next->bios.ramcfg_00_09 << 8 | in nv50_ram_calc()
449 ram_mask(hwsq, 0x10053c, 0x00001000, 0x00000000); in nv50_ram_calc()
451 ram_mask(hwsq, 0x10053c, 0x00001000, 0x00001000); in nv50_ram_calc()
453 ram_mask(hwsq, mr[1], 0xffffffff, ram->base.mr[1]); in nv50_ram_calc()
456 nv50_ram_gpio(hwsq, 0x2e, 0); in nv50_ram_calc()
460 nvkm_sddr2_dll_reset(hwsq); in nv50_ram_calc()
462 ram_setf(hwsq, 0x10, 0x01); /* enable fb */ in nv50_ram_calc()
463 ram_wait(hwsq, 0x00, 0x00); /* wait for fb enabled */ in nv50_ram_calc()
464 ram_wr32(hwsq, 0x611200, 0x00003330); in nv50_ram_calc()
465 ram_wr32(hwsq, 0x002504, 0x00000000); /* un-block fifo */ in nv50_ram_calc()
468 ram_mask(hwsq, 0x100200, 0x00000800, 0x00000800); in nv50_ram_calc()
470 ram_mask(hwsq, 0x004008, 0x00004000, 0x00000000); in nv50_ram_calc()
472 ram_mask(hwsq, 0x10021c, 0x00010000, 0x00010000); in nv50_ram_calc()
474 ram_mask(hwsq, 0x100710, 0x00000200, 0x00000200); in nv50_ram_calc()
484 ram_exec(&ram->hwsq, nvkm_boolopt(device->cfgopt, "NvMemExec", true)); in nv50_ram_prog()
492 ram_exec(&ram->hwsq, false); in nv50_ram_tidy()
598 ram->hwsq.r_0x002504 = hwsq_reg(0x002504); in nv50_ram_new()
599 ram->hwsq.r_0x00c040 = hwsq_reg(0x00c040); in nv50_ram_new()
600 ram->hwsq.r_0x004008 = hwsq_reg(0x004008); in nv50_ram_new()
601 ram->hwsq.r_0x00400c = hwsq_reg(0x00400c); in nv50_ram_new()
602 ram->hwsq.r_0x100200 = hwsq_reg(0x100200); in nv50_ram_new()
603 ram->hwsq.r_0x100210 = hwsq_reg(0x100210); in nv50_ram_new()
604 ram->hwsq.r_0x10021c = hwsq_reg(0x10021c); in nv50_ram_new()
605 ram->hwsq.r_0x1002d0 = hwsq_reg(0x1002d0); in nv50_ram_new()
606 ram->hwsq.r_0x1002d4 = hwsq_reg(0x1002d4); in nv50_ram_new()
607 ram->hwsq.r_0x1002dc = hwsq_reg(0x1002dc); in nv50_ram_new()
608 ram->hwsq.r_0x10053c = hwsq_reg(0x10053c); in nv50_ram_new()
609 ram->hwsq.r_0x1005a0 = hwsq_reg(0x1005a0); in nv50_ram_new()
610 ram->hwsq.r_0x1005a4 = hwsq_reg(0x1005a4); in nv50_ram_new()
611 ram->hwsq.r_0x100710 = hwsq_reg(0x100710); in nv50_ram_new()
612 ram->hwsq.r_0x100714 = hwsq_reg(0x100714); in nv50_ram_new()
613 ram->hwsq.r_0x100718 = hwsq_reg(0x100718); in nv50_ram_new()
614 ram->hwsq.r_0x10071c = hwsq_reg(0x10071c); in nv50_ram_new()
615 ram->hwsq.r_0x100da0 = hwsq_stride(0x100da0, 4, ram->base.part_mask); in nv50_ram_new()
616 ram->hwsq.r_0x100e20 = hwsq_reg(0x100e20); in nv50_ram_new()
617 ram->hwsq.r_0x100e24 = hwsq_reg(0x100e24); in nv50_ram_new()
618 ram->hwsq.r_0x611200 = hwsq_reg(0x611200); in nv50_ram_new()
621 ram->hwsq.r_timing[i] = hwsq_reg(0x100220 + (i * 0x04)); in nv50_ram_new()
624 ram->hwsq.r_mr[0] = hwsq_reg2(0x1002c0, 0x1002c8); in nv50_ram_new()
625 ram->hwsq.r_mr[1] = hwsq_reg2(0x1002c4, 0x1002cc); in nv50_ram_new()
626 ram->hwsq.r_mr[2] = hwsq_reg2(0x1002e0, 0x1002e8); in nv50_ram_new()
627 ram->hwsq.r_mr[3] = hwsq_reg2(0x1002e4, 0x1002ec); in nv50_ram_new()
629 ram->hwsq.r_mr[0] = hwsq_reg(0x1002c0); in nv50_ram_new()
630 ram->hwsq.r_mr[1] = hwsq_reg(0x1002c4); in nv50_ram_new()
631 ram->hwsq.r_mr[2] = hwsq_reg(0x1002e0); in nv50_ram_new()
632 ram->hwsq.r_mr[3] = hwsq_reg(0x1002e4); in nv50_ram_new()
635 ram->hwsq.r_gpio[0] = hwsq_reg(0x00e104); in nv50_ram_new()
636 ram->hwsq.r_gpio[1] = hwsq_reg(0x00e108); in nv50_ram_new()
637 ram->hwsq.r_gpio[2] = hwsq_reg(0x00e120); in nv50_ram_new()
638 ram->hwsq.r_gpio[3] = hwsq_reg(0x00e124); in nv50_ram_new()