Lines Matching full:fw
27 #include <nvfw/fw.h>
31 nvkm_falcon_fw_patch(struct nvkm_falcon_fw *fw) in nvkm_falcon_fw_patch() argument
33 struct nvkm_falcon *falcon = fw->falcon; in nvkm_falcon_fw_patch()
34 u32 sig_base_src = fw->sig_base_prd; in nvkm_falcon_fw_patch()
38 FLCNFW_DBG(fw, "patching sigs:%d size:%d", fw->sig_nr, fw->sig_size); in nvkm_falcon_fw_patch()
39 if (fw->func->signature) { in nvkm_falcon_fw_patch()
40 idx = fw->func->signature(fw, &sig_base_src); in nvkm_falcon_fw_patch()
45 src = idx * fw->sig_size; in nvkm_falcon_fw_patch()
46 dst = fw->sig_base_img; in nvkm_falcon_fw_patch()
47 len = fw->sig_size / 4; in nvkm_falcon_fw_patch()
48 FLCNFW_DBG(fw, "patch idx:%d src:%08x dst:%08x", idx, sig_base_src + src, dst); in nvkm_falcon_fw_patch()
50 u32 sig = *(u32 *)(fw->sigs + src); in nvkm_falcon_fw_patch()
58 *(u32 *)(fw->fw.img + dst) = sig; in nvkm_falcon_fw_patch()
67 nvkm_falcon_fw_dtor_sigs(struct nvkm_falcon_fw *fw) in nvkm_falcon_fw_dtor_sigs() argument
69 kfree(fw->sigs); in nvkm_falcon_fw_dtor_sigs()
70 fw->sigs = NULL; in nvkm_falcon_fw_dtor_sigs()
74 nvkm_falcon_fw_boot(struct nvkm_falcon_fw *fw, struct nvkm_subdev *user, in nvkm_falcon_fw_boot() argument
77 struct nvkm_falcon *falcon = fw->falcon; in nvkm_falcon_fw_boot()
84 if (fw->sigs) { in nvkm_falcon_fw_boot()
85 ret = nvkm_falcon_fw_patch(fw); in nvkm_falcon_fw_boot()
89 nvkm_falcon_fw_dtor_sigs(fw); in nvkm_falcon_fw_boot()
93 FLCNFW_DBG(fw, "resetting"); in nvkm_falcon_fw_boot()
94 fw->func->reset(fw); in nvkm_falcon_fw_boot()
96 FLCNFW_DBG(fw, "loading"); in nvkm_falcon_fw_boot()
97 if (fw->func->setup) { in nvkm_falcon_fw_boot()
98 ret = fw->func->setup(fw); in nvkm_falcon_fw_boot()
104 dma_sync_single_for_device(fw->fw.device->dev, in nvkm_falcon_fw_boot()
105 fw->fw.phys, in nvkm_falcon_fw_boot()
106 sg_dma_len(&fw->fw.mem.sgl), in nvkm_falcon_fw_boot()
109 ret = fw->func->load(fw); in nvkm_falcon_fw_boot()
113 FLCNFW_DBG(fw, "booting"); in nvkm_falcon_fw_boot()
114 ret = fw->func->boot(fw, pmbox0, pmbox1, mbox0_ok, irqsclr); in nvkm_falcon_fw_boot()
116 FLCNFW_ERR(fw, "boot failed: %d", ret); in nvkm_falcon_fw_boot()
118 FLCNFW_DBG(fw, "booted"); in nvkm_falcon_fw_boot()
127 nvkm_falcon_fw_oneinit(struct nvkm_falcon_fw *fw, struct nvkm_falcon *falcon, in nvkm_falcon_fw_oneinit() argument
132 fw->falcon = falcon; in nvkm_falcon_fw_oneinit()
133 fw->vmm = nvkm_vmm_ref(vmm); in nvkm_falcon_fw_oneinit()
134 fw->inst = nvkm_memory_ref(inst); in nvkm_falcon_fw_oneinit()
136 if (fw->boot) { in nvkm_falcon_fw_oneinit()
137 FLCN_DBG(falcon, "mapping %s fw", fw->fw.name); in nvkm_falcon_fw_oneinit()
138 ret = nvkm_vmm_get(fw->vmm, 12, nvkm_memory_size(&fw->fw.mem.memory), &fw->vma); in nvkm_falcon_fw_oneinit()
144 ret = nvkm_memory_map(&fw->fw.mem.memory, 0, fw->vmm, fw->vma, NULL, 0); in nvkm_falcon_fw_oneinit()
155 nvkm_falcon_fw_dtor(struct nvkm_falcon_fw *fw) in nvkm_falcon_fw_dtor() argument
157 nvkm_vmm_put(fw->vmm, &fw->vma); in nvkm_falcon_fw_dtor()
158 nvkm_vmm_unref(&fw->vmm); in nvkm_falcon_fw_dtor()
159 nvkm_memory_unref(&fw->inst); in nvkm_falcon_fw_dtor()
160 nvkm_falcon_fw_dtor_sigs(fw); in nvkm_falcon_fw_dtor()
161 nvkm_firmware_dtor(&fw->fw); in nvkm_falcon_fw_dtor()
175 nvkm_falcon_fw_sign(struct nvkm_falcon_fw *fw, u32 sig_base_img, u32 sig_size, const u8 *sigs, in nvkm_falcon_fw_sign() argument
178 fw->sig_base_prd = sig_base_prd; in nvkm_falcon_fw_sign()
179 fw->sig_base_dbg = sig_base_dbg; in nvkm_falcon_fw_sign()
180 fw->sig_base_img = sig_base_img; in nvkm_falcon_fw_sign()
181 fw->sig_size = sig_size; in nvkm_falcon_fw_sign()
182 fw->sig_nr = sig_nr_prd + sig_nr_dbg; in nvkm_falcon_fw_sign()
184 fw->sigs = kmalloc_array(fw->sig_nr, fw->sig_size, GFP_KERNEL); in nvkm_falcon_fw_sign()
185 if (!fw->sigs) in nvkm_falcon_fw_sign()
188 memcpy(fw->sigs, sigs + sig_base_prd, sig_nr_prd * fw->sig_size); in nvkm_falcon_fw_sign()
190 memcpy(fw->sigs + sig_size, sigs + sig_base_dbg, sig_nr_dbg * fw->sig_size); in nvkm_falcon_fw_sign()
198 struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw) in nvkm_falcon_fw_ctor() argument
203 fw->func = func; in nvkm_falcon_fw_ctor()
205 ret = nvkm_firmware_ctor(type, name, device, src, len, &fw->fw); in nvkm_falcon_fw_ctor()
209 return falcon ? nvkm_falcon_fw_oneinit(fw, falcon, NULL, NULL) : 0; in nvkm_falcon_fw_ctor()
215 struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw) in nvkm_falcon_fw_ctor_hs() argument
233 blob->data + hdr->data_offset, hdr->data_size, falcon, fw); in nvkm_falcon_fw_ctor_hs()
237 /* Earlier FW releases by NVIDIA for Nouveau's use aren't in NVIDIA's in nvkm_falcon_fw_ctor_hs()
256 ret = nvkm_falcon_fw_sign(fw, loc, hshdr->sig_prod_size, blob->data, in nvkm_falcon_fw_ctor_hs()
264 fw->nmem_base_img = 0; in nvkm_falcon_fw_ctor_hs()
265 fw->nmem_base = lhdr->non_sec_code_off; in nvkm_falcon_fw_ctor_hs()
266 fw->nmem_size = lhdr->non_sec_code_size; in nvkm_falcon_fw_ctor_hs()
268 fw->imem_base_img = lhdr->apps[0]; in nvkm_falcon_fw_ctor_hs()
269 fw->imem_base = ALIGN(lhdr->apps[0], 0x100); in nvkm_falcon_fw_ctor_hs()
270 fw->imem_size = lhdr->apps[lhdr->num_apps + 0]; in nvkm_falcon_fw_ctor_hs()
272 fw->dmem_base_img = lhdr->data_dma_base; in nvkm_falcon_fw_ctor_hs()
273 fw->dmem_base = 0; in nvkm_falcon_fw_ctor_hs()
274 fw->dmem_size = lhdr->data_size; in nvkm_falcon_fw_ctor_hs()
275 fw->dmem_sign = loc - lhdr->data_dma_base; in nvkm_falcon_fw_ctor_hs()
287 fw->boot_addr = desc->start_tag << 8; in nvkm_falcon_fw_ctor_hs()
288 fw->boot_size = desc->code_size; in nvkm_falcon_fw_ctor_hs()
289 fw->boot = kmemdup(blob->data + hdr->data_offset + desc->code_off, in nvkm_falcon_fw_ctor_hs()
290 fw->boot_size, GFP_KERNEL); in nvkm_falcon_fw_ctor_hs()
291 if (!fw->boot) in nvkm_falcon_fw_ctor_hs()
294 fw->boot_addr = fw->nmem_base; in nvkm_falcon_fw_ctor_hs()
299 nvkm_falcon_fw_dtor(fw); in nvkm_falcon_fw_ctor_hs()
308 struct nvkm_falcon *falcon, struct nvkm_falcon_fw *fw) in nvkm_falcon_fw_ctor_hs_v2() argument
329 blob->data + hdr->data_offset, hdr->data_size, falcon, fw); in nvkm_falcon_fw_ctor_hs_v2()
333 ret = nvkm_falcon_fw_sign(fw, loc, hshdr->sig_prod_size / cnt, blob->data, in nvkm_falcon_fw_ctor_hs_v2()
340 fw->imem_base_img = lhdr->app[0].offset; in nvkm_falcon_fw_ctor_hs_v2()
341 fw->imem_base = 0; in nvkm_falcon_fw_ctor_hs_v2()
342 fw->imem_size = lhdr->app[0].size; in nvkm_falcon_fw_ctor_hs_v2()
344 fw->dmem_base_img = lhdr->os_data_offset; in nvkm_falcon_fw_ctor_hs_v2()
345 fw->dmem_base = 0; in nvkm_falcon_fw_ctor_hs_v2()
346 fw->dmem_size = lhdr->os_data_size; in nvkm_falcon_fw_ctor_hs_v2()
347 fw->dmem_sign = loc - lhdr->os_data_offset; in nvkm_falcon_fw_ctor_hs_v2()
349 fw->boot_addr = lhdr->app[0].offset; in nvkm_falcon_fw_ctor_hs_v2()
351 fw->fuse_ver = meta[0]; in nvkm_falcon_fw_ctor_hs_v2()
352 fw->engine_id = meta[1]; in nvkm_falcon_fw_ctor_hs_v2()
353 fw->ucode_id = meta[2]; in nvkm_falcon_fw_ctor_hs_v2()
357 nvkm_falcon_fw_dtor(fw); in nvkm_falcon_fw_ctor_hs_v2()