41 	pu &= 0x0f;  in gm200_sor_dp_drive()
43 	data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift);  in gm200_sor_dp_drive()
44 	data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift);  in gm200_sor_dp_drive()
45 	data[2] = nvkm_rd32(device, 0x61c130 + loff);  in gm200_sor_dp_drive()
46 	if ((data[2] & 0x00000f00) < (pu << 8) || ln == 0)  in gm200_sor_dp_drive()
47 		data[2] = (data[2] & ~0x00000f00) | (pu << 8);  in gm200_sor_dp_drive()
49 	nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift));  in gm200_sor_dp_drive()
50 	nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift));  in gm200_sor_dp_drive()
51 	nvkm_wr32(device, 0x61c130 + loff, data[2]);  in gm200_sor_dp_drive()
53 	data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift);  in gm200_sor_dp_drive()
54 	nvkm_wr32(device, 0x61c13c + loff, data[3] | (pc << shift));  in gm200_sor_dp_drive()
59 	.lanes = { 0, 1, 2, 3 },
76 	u32 ctrl = 0;  in gm200_sor_hdmi_scdc()
82 			ctrl |= 0x00000002;  in gm200_sor_hdmi_scdc()
84 			ctrl |= 0x00000001;  in gm200_sor_hdmi_scdc()
87 	nvkm_mask(device, 0x61c5bc + soff, 0x00000003, ctrl);  in gm200_sor_hdmi_scdc()
102 	const u32 moff = __ffs(outp->info.or) * 0x100;  in gm200_sor_route_set()
103 	const u32  sor = ior ? ior->id + 1 : 0;  in gm200_sor_route_set()
104 	u32 link = ior ? (ior->asy.link == 2) : 0;  in gm200_sor_route_set()
107 		nvkm_mask(device, 0x612308 + moff, 0x0000001f, link << 4 | sor);  in gm200_sor_route_set()
112 		nvkm_mask(device, 0x612388 + moff, 0x0000001f, link << 4 | sor);  in gm200_sor_route_set()
122 	for (*link = 0, m = __ffs(outp->info.or) * 2, s = 0; s < 2; m++, s++) {  in gm200_sor_route_get()
124 			u32 data = nvkm_rd32(device, 0x612308 + (m * 0x80));  in gm200_sor_route_get()
125 			lnk[s] = (data & 0x00000010) >> 4;  in gm200_sor_route_get()
126 			sor[s] = (data & 0x0000000f);  in gm200_sor_route_get()
134 		if (sor[0] != sor[1] || WARN_ON(lnk[0] || !lnk[1]))  in gm200_sor_route_get()
138 	return ((sublinks & 1) ? sor[0] : sor[1]) - 1;  in gm200_sor_route_get()
162 	if (!((hda = nvkm_rd32(device, 0x08a15c)) & 0x40000000))  in gm200_sor_new()
163 		hda = nvkm_rd32(device, 0x101034);  in gm200_sor_new()
180 	.root = { 0,0,GM200_DISP },
182 		{{0,0,GK104_DISP_CURSOR             }, nvkm_disp_chan_new, &gf119_disp_curs },
183 		{{0,0,GK104_DISP_OVERLAY            }, nvkm_disp_chan_new, &gf119_disp_oimm },
184 		{{0,0,GK110_DISP_BASE_CHANNEL_DMA   }, nvkm_disp_chan_new, &gf119_disp_base },
185 		{{0,0,GM200_DISP_CORE_CHANNEL_DMA   }, nvkm_disp_core_new, &gk104_disp_core },
186 		{{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly },