85 gf119_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark)  in gf119_sor_dp_watermark()  argument
87 	struct nvkm_device *device = sor->disp->engine.subdev.device;  in gf119_sor_dp_watermark()
94 gf119_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v)  in gf119_sor_dp_audio_sym()  argument
96 	struct nvkm_device *device = sor->disp->engine.subdev.device;  in gf119_sor_dp_audio_sym()
104 gf119_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable)  in gf119_sor_dp_audio()  argument
106 	struct nvkm_device *device = sor->disp->engine.subdev.device;  in gf119_sor_dp_audio()
119 gf119_sor_dp_vcpi(struct nvkm_ior *sor, int head, u8 slot, u8 slot_nr, u16 pbn, u16 aligned)  in gf119_sor_dp_vcpi()  argument
121 	struct nvkm_device *device = sor->disp->engine.subdev.device;  in gf119_sor_dp_vcpi()
129 gf119_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu)  in gf119_sor_dp_drive()  argument
131 	struct nvkm_device *device = sor->disp->engine.subdev.device;  in gf119_sor_dp_drive()
132 	const u32  loff = nv50_sor_link(sor);  in gf119_sor_dp_drive()
133 	const u32 shift = sor->func->dp->lanes[ln] * 8;  in gf119_sor_dp_drive()
151 gf119_sor_dp_pattern(struct nvkm_ior *sor, int pattern)  in gf119_sor_dp_pattern()  argument
153 	struct nvkm_device *device = sor->disp->engine.subdev.device;  in gf119_sor_dp_pattern()
154 	const u32 soff = nv50_ior_base(sor);  in gf119_sor_dp_pattern()
171 gf119_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux)  in gf119_sor_dp_links()  argument
173 	struct nvkm_device *device = sor->disp->engine.subdev.device;  in gf119_sor_dp_links()
174 	const u32 soff = nv50_ior_base(sor);  in gf119_sor_dp_links()
175 	const u32 loff = nv50_sor_link(sor);  in gf119_sor_dp_links()
179 	clksor |= sor->dp.bw << 18;  in gf119_sor_dp_links()
180 	dpctrl |= ((1 << sor->dp.nr) - 1) << 16;  in gf119_sor_dp_links()
181 	if (sor->dp.mst)  in gf119_sor_dp_links()
183 	if (sor->dp.ef)  in gf119_sor_dp_links()
286 gf119_sor_clock(struct nvkm_ior *sor)  in gf119_sor_clock()  argument
288 	struct nvkm_device *device = sor->disp->engine.subdev.device;  in gf119_sor_clock()
289 	const u32 soff = nv50_ior_base(sor);  in gf119_sor_clock()
290 	u32 div1 = sor->asy.link == 3;  in gf119_sor_clock()
291 	u32 div2 = sor->asy.link == 3;  in gf119_sor_clock()
293 	if (sor->asy.proto == TMDS) {  in gf119_sor_clock()
294 		const u32 speed = sor->tmds.high_speed ? 0x14 : 0x0a;  in gf119_sor_clock()
296 		if (sor->tmds.high_speed)  in gf119_sor_clock()
304 gf119_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state)  in gf119_sor_state()  argument
306 	struct nvkm_device *device = sor->disp->engine.subdev.device;  in gf119_sor_state()
307 	const u32 coff = (state == &sor->asy) * 0x20000 + sor->id * 0x20;  in gf119_sor_state()
340 	return nvkm_ior_new_(&gf119_sor, disp, SOR, id, true);  in gf119_sor_new()
938 		{    "SOR", 8, &gf119_disp_core_mthd_sor  },
1194 	/* ... SOR caps */  in gf119_disp_init()
1195 	for (i = 0; i < disp->sor.nr; i++) {  in gf119_disp_init()
1244 	.sor = { .cnt = gf119_sor_cnt, .new = gf119_sor_new },