Lines Matching refs:soff

57 	const u32 soff = nv50_ior_base(sor);  in g94_sor_dp_audio_sym()  local
59 nvkm_mask(device, 0x61c1e8 + soff, 0x0000ffff, h); in g94_sor_dp_audio_sym()
60 nvkm_mask(device, 0x61c1ec + soff, 0x00ffffff, v); in g94_sor_dp_audio_sym()
105 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_power() local
113 nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000); in g94_sor_dp_power()
115 if (!(nvkm_rd32(device, 0x61c034 + soff) & 0x80000000)) in g94_sor_dp_power()
124 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_links() local
135 nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor); in g94_sor_dp_links()
156 const u32 soff = nv50_ior_base(sor); in g94_sor_war_needed() local
159 switch (nvkm_rd32(device, 0x614300 + soff) & 0x00030000) { in g94_sor_war_needed()
204 const u32 soff = nv50_ior_base(sor); in g94_sor_war_3() local
210 sorpwr = nvkm_rd32(device, 0x61c004 + soff); in g94_sor_war_3()
212 u32 seqctl = nvkm_rd32(device, 0x61c030 + soff); in g94_sor_war_3()
216 nvkm_wr32(device, 0x61c040 + soff + pd_pc * 4, 0x1f008000); in g94_sor_war_3()
219 if (!(nvkm_rd32(device, 0x61c030 + soff) & 0x10000000)) in g94_sor_war_3()
222 nvkm_mask(device, 0x61c004 + soff, 0x80000001, 0x80000000); in g94_sor_war_3()
224 if (!(nvkm_rd32(device, 0x61c030 + soff) & 0x10000000)) in g94_sor_war_3()
228 nvkm_wr32(device, 0x61c040 + soff + pd_pc * 4, 0x00002000); in g94_sor_war_3()
229 nvkm_wr32(device, 0x61c040 + soff + pu_pc * 4, 0x1f000000); in g94_sor_war_3()
232 nvkm_mask(device, 0x61c10c + soff, 0x00000001, 0x00000000); in g94_sor_war_3()
233 nvkm_mask(device, 0x614300 + soff, 0x03000000, 0x00000000); in g94_sor_war_3()
236 nvkm_mask(device, 0x61c004 + soff, 0x80000001, 0x80000001); in g94_sor_war_3()
245 const u32 soff = nv50_ior_base(sor); in g94_sor_war_2() local
251 nvkm_mask(device, 0x614300 + soff, 0x03000000, 0x03000000); in g94_sor_war_2()
252 nvkm_mask(device, 0x61c10c + soff, 0x00000001, 0x00000001); in g94_sor_war_2()
254 nvkm_mask(device, 0x61c00c + soff, 0x0f000000, 0x00000000); in g94_sor_war_2()
255 nvkm_mask(device, 0x61c008 + soff, 0xff000000, 0x14000000); in g94_sor_war_2()
257 nvkm_mask(device, 0x61c008 + soff, 0xff000000, 0x00000000); in g94_sor_war_2()
258 nvkm_mask(device, 0x61c00c + soff, 0x0f000000, 0x01000000); in g94_sor_war_2()
260 if (nvkm_rd32(device, 0x61c004 + soff) & 0x00000001) { in g94_sor_war_2()
261 u32 seqctl = nvkm_rd32(device, 0x61c030 + soff); in g94_sor_war_2()
263 nvkm_wr32(device, 0x61c040 + soff + pu_pc * 4, 0x1f008000); in g94_sor_war_2()