Lines Matching full:lt
92 nvkm_dp_train_sense(struct lt_state *lt, bool pc, u32 delay) in nvkm_dp_train_sense() argument
94 struct nvkm_outp *outp = lt->outp; in nvkm_dp_train_sense()
100 if (lt->repeater) in nvkm_dp_train_sense()
101 addr = DPCD_LTTPR_LANE0_1_STATUS(lt->repeater); in nvkm_dp_train_sense()
105 ret = nvkm_rdaux(outp->dp.aux, addr, <->stat[0], 3); in nvkm_dp_train_sense()
109 if (lt->repeater) in nvkm_dp_train_sense()
110 addr = DPCD_LTTPR_LANE0_1_ADJUST(lt->repeater); in nvkm_dp_train_sense()
114 ret = nvkm_rdaux(outp->dp.aux, addr, <->stat[4], 2); in nvkm_dp_train_sense()
119 ret = nvkm_rdaux(outp->dp.aux, DPCD_LS0C, <->pc2stat, 1); in nvkm_dp_train_sense()
121 lt->pc2stat = 0x00; in nvkm_dp_train_sense()
123 OUTP_TRACE(outp, "status %6ph pc2 %02x", lt->stat, lt->pc2stat); in nvkm_dp_train_sense()
125 OUTP_TRACE(outp, "status %6ph", lt->stat); in nvkm_dp_train_sense()
132 nvkm_dp_train_drive(struct lt_state *lt, bool pc) in nvkm_dp_train_drive() argument
134 struct nvkm_outp *outp = lt->outp; in nvkm_dp_train_drive()
145 u8 lane = (lt->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_drive()
146 u8 lpc2 = (lt->pc2stat >> (i * 2)) & 0x3; in nvkm_dp_train_drive()
163 lt->conf[i] = (lpre << 3) | lvsw; in nvkm_dp_train_drive()
164 lt->pc2conf[i >> 1] |= lpc2 << ((i & 1) * 4); in nvkm_dp_train_drive()
166 OUTP_TRACE(outp, "config lane %d %02x %02x", i, lt->conf[i], lpc2); in nvkm_dp_train_drive()
168 if (lt->repeater != lt->repeaters) in nvkm_dp_train_drive()
184 if (lt->repeater) in nvkm_dp_train_drive()
185 addr = DPCD_LTTPR_LANE0_SET(lt->repeater); in nvkm_dp_train_drive()
189 ret = nvkm_wraux(outp->dp.aux, addr, lt->conf, 4); in nvkm_dp_train_drive()
194 ret = nvkm_wraux(outp->dp.aux, DPCD_LC0F, lt->pc2conf, 2); in nvkm_dp_train_drive()
203 nvkm_dp_train_pattern(struct lt_state *lt, u8 pattern) in nvkm_dp_train_pattern() argument
205 struct nvkm_outp *outp = lt->outp; in nvkm_dp_train_pattern()
212 if (lt->repeater) in nvkm_dp_train_pattern()
213 addr = DPCD_LTTPR_PATTERN_SET(lt->repeater); in nvkm_dp_train_pattern()
229 nvkm_dp_train_eq(struct lt_state *lt) in nvkm_dp_train_eq() argument
231 struct nvkm_i2c_aux *aux = lt->outp->dp.aux; in nvkm_dp_train_eq()
236 if (lt->repeater) { in nvkm_dp_train_eq()
237 if (!nvkm_rdaux(aux, DPCD_LTTPR_AUX_RD_INTERVAL(lt->repeater), &data, sizeof(data))) in nvkm_dp_train_eq()
240 nvkm_dp_train_pattern(lt, 4); in nvkm_dp_train_eq()
242 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] >= 0x14 && in nvkm_dp_train_eq()
243 lt->outp->dp.dpcd[DPCD_RC03] & DPCD_RC03_TPS4_SUPPORTED) in nvkm_dp_train_eq()
244 nvkm_dp_train_pattern(lt, 4); in nvkm_dp_train_eq()
246 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] >= 0x12 && in nvkm_dp_train_eq()
247 lt->outp->dp.dpcd[DPCD_RC02] & DPCD_RC02_TPS3_SUPPORTED) in nvkm_dp_train_eq()
248 nvkm_dp_train_pattern(lt, 3); in nvkm_dp_train_eq()
250 nvkm_dp_train_pattern(lt, 2); in nvkm_dp_train_eq()
252 usec = (lt->outp->dp.dpcd[DPCD_RC0E] & DPCD_RC0E_AUX_RD_INTERVAL) * 4000; in nvkm_dp_train_eq()
257 nvkm_dp_train_drive(lt, lt->pc2)) || in nvkm_dp_train_eq()
258 nvkm_dp_train_sense(lt, lt->pc2, usec ? usec : 400)) in nvkm_dp_train_eq()
261 eq_done = !!(lt->stat[2] & DPCD_LS04_INTERLANE_ALIGN_DONE); in nvkm_dp_train_eq()
262 for (i = 0; i < lt->outp->ior->dp.nr && eq_done; i++) { in nvkm_dp_train_eq()
263 u8 lane = (lt->stat[i >> 1] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_eq()
276 nvkm_dp_train_cr(struct lt_state *lt) in nvkm_dp_train_cr() argument
279 int voltage = lt->conf[0] & DPCD_LC03_VOLTAGE_SWING_SET; in nvkm_dp_train_cr()
282 nvkm_dp_train_pattern(lt, 1); in nvkm_dp_train_cr()
284 if (lt->outp->dp.dpcd[DPCD_RC00_DPCD_REV] < 0x14 && !lt->repeater) in nvkm_dp_train_cr()
285 usec = (lt->outp->dp.dpcd[DPCD_RC0E] & DPCD_RC0E_AUX_RD_INTERVAL) * 4000; in nvkm_dp_train_cr()
288 if (nvkm_dp_train_drive(lt, false) || in nvkm_dp_train_cr()
289 nvkm_dp_train_sense(lt, false, usec ? usec : 100)) in nvkm_dp_train_cr()
293 for (i = 0; i < lt->outp->ior->dp.nr; i++) { in nvkm_dp_train_cr()
294 u8 lane = (lt->stat[i >> 1] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_cr()
297 if (lt->conf[i] & DPCD_LC03_MAX_SWING_REACHED) in nvkm_dp_train_cr()
303 if ((lt->conf[0] & DPCD_LC03_VOLTAGE_SWING_SET) != voltage) { in nvkm_dp_train_cr()
304 voltage = lt->conf[0] & DPCD_LC03_VOLTAGE_SWING_SET; in nvkm_dp_train_cr()
316 struct lt_state lt = { in nvkm_dp_train_link() local
331 if (outp->dp.lt.post_adj) in nvkm_dp_train_link()
352 for (lt.repeater = lt.repeaters; lt.repeater >= 0; lt.repeater--) { in nvkm_dp_train_link()
353 if (lt.repeater) in nvkm_dp_train_link()
354 OUTP_DBG(outp, "training LTTPR%d", lt.repeater); in nvkm_dp_train_link()
358 memset(lt.stat, 0x00, sizeof(lt.stat)); in nvkm_dp_train_link()
359 ret = nvkm_dp_train_cr(<); in nvkm_dp_train_link()
361 ret = nvkm_dp_train_eq(<); in nvkm_dp_train_link()
362 nvkm_dp_train_pattern(<, 0); in nvkm_dp_train_link()
475 struct lt_state lt = { in nvkm_dp_drive() local
483 return nvkm_dp_train_drive(<, false); in nvkm_dp_drive()
493 if (outp->dp.rate[rate].rate == (retrain ? ior->dp.bw : outp->dp.lt.bw) * 27000) in nvkm_dp_train()
511 ior->dp.mst = outp->dp.lt.mst; in nvkm_dp_train()
513 ior->dp.bw = outp->dp.lt.bw; in nvkm_dp_train()
514 ior->dp.nr = outp->dp.lt.nr; in nvkm_dp_train()