Lines Matching +full:dp +full:- +full:connector
32 #include <linux/dma-mapping.h>
84 chan->device = device; in nv50_chan_create()
95 &chan->user); in nv50_chan_create()
97 ret = nvif_object_map(&chan->user, NULL, 0); in nv50_chan_create()
99 nvif_object_dtor(&chan->user); in nv50_chan_create()
109 return -ENOSYS; in nv50_chan_create()
115 nvif_object_dtor(&chan->user); in nv50_chan_destroy()
125 nvif_object_dtor(&dmac->vram); in nv50_dmac_destroy()
126 nvif_object_dtor(&dmac->sync); in nv50_dmac_destroy()
128 nv50_chan_destroy(&dmac->base); in nv50_dmac_destroy()
130 nvif_mem_dtor(&dmac->push.mem); in nv50_dmac_destroy()
138 dmac->cur = push->cur - (u32 __iomem *)dmac->push.mem.object.map.ptr; in nv50_dmac_kick()
139 if (dmac->put != dmac->cur) { in nv50_dmac_kick()
143 if (dmac->push.mem.type & NVIF_MEM_VRAM) { in nv50_dmac_kick()
144 struct nvif_device *device = dmac->base.device; in nv50_dmac_kick()
145 nvif_wr32(&device->object, 0x070000, 0x00000001); in nv50_dmac_kick()
147 if (!(nvif_rd32(&device->object, 0x070000) & 0x00000002)) in nv50_dmac_kick()
152 NVIF_WV32(&dmac->base.user, NV507C, PUT, PTR, dmac->cur); in nv50_dmac_kick()
153 dmac->put = dmac->cur; in nv50_dmac_kick()
156 push->bgn = push->cur; in nv50_dmac_kick()
162 u32 get = NVIF_RV32(&dmac->base.user, NV507C, GET, PTR); in nv50_dmac_free()
163 if (get > dmac->cur) /* NVIDIA stay 5 away from GET, do the same. */ in nv50_dmac_free()
164 return get - dmac->cur - 5; in nv50_dmac_free()
165 return dmac->max - dmac->cur; in nv50_dmac_free()
174 u32 get = NVIF_RV32(&dmac->base.user, NV507C, GET, PTR); in nv50_dmac_wind()
176 /* Corner-case, HW idle, but non-committed work pending. */ in nv50_dmac_wind()
177 if (dmac->put == 0) in nv50_dmac_wind()
178 nv50_dmac_kick(&dmac->push); in nv50_dmac_wind()
180 if (nvif_msec(dmac->base.device, 2000, in nv50_dmac_wind()
181 if (NVIF_TV32(&dmac->base.user, NV507C, GET, PTR, >, 0)) in nv50_dmac_wind()
184 return -ETIMEDOUT; in nv50_dmac_wind()
187 PUSH_RSVD(&dmac->push, PUSH_JUMP(&dmac->push, 0)); in nv50_dmac_wind()
188 dmac->cur = 0; in nv50_dmac_wind()
198 if (WARN_ON(size > dmac->max)) in nv50_dmac_wait()
199 return -EINVAL; in nv50_dmac_wait()
201 dmac->cur = push->cur - (u32 __iomem *)dmac->push.mem.object.map.ptr; in nv50_dmac_wait()
202 if (dmac->cur + size >= dmac->max) { in nv50_dmac_wait()
207 push->cur = dmac->push.mem.object.map.ptr; in nv50_dmac_wait()
208 push->cur = push->cur + dmac->cur; in nv50_dmac_wait()
212 if (nvif_msec(dmac->base.device, 2000, in nv50_dmac_wait()
217 return -ETIMEDOUT; in nv50_dmac_wait()
220 push->bgn = dmac->push.mem.object.map.ptr; in nv50_dmac_wait()
221 push->bgn = push->bgn + dmac->cur; in nv50_dmac_wait()
222 push->cur = push->bgn; in nv50_dmac_wait()
223 push->end = push->cur + free; in nv50_dmac_wait()
228 static int nv50_dmac_vram_pushbuf = -1;
236 struct nvif_device *device = &drm->device; in nv50_dmac_create()
237 struct nvif_object *disp = &drm->display->disp.object; in nv50_dmac_create()
242 /* Pascal added support for 47-bit physical addresses, but some in nv50_dmac_create()
243 * parts of EVO still only accept 40-bit PAs. in nv50_dmac_create()
252 (nv50_dmac_vram_pushbuf < 0 && device->info.family == NV_DEVICE_INFO_V0_PASCAL)) in nv50_dmac_create()
255 ret = nvif_mem_ctor_map(&drm->mmu, "kmsChanPush", type, 0x1000, &dmac->push.mem); in nv50_dmac_create()
259 dmac->push.wait = nv50_dmac_wait; in nv50_dmac_create()
260 dmac->push.kick = nv50_dmac_kick; in nv50_dmac_create()
261 dmac->push.bgn = dmac->push.mem.object.map.ptr; in nv50_dmac_create()
262 dmac->push.cur = dmac->push.bgn; in nv50_dmac_create()
263 dmac->push.end = dmac->push.bgn; in nv50_dmac_create()
264 dmac->max = 0x1000/4 - 1; in nv50_dmac_create()
269 if (disp->oclass < GV100_DISP) in nv50_dmac_create()
270 dmac->max -= 12; in nv50_dmac_create()
272 args->pushbuf = nvif_handle(&dmac->push.mem.object); in nv50_dmac_create()
275 &dmac->base); in nv50_dmac_create()
283 if (disp->oclass >= GB202_DISP) { in nv50_dmac_create()
287 dmac->sync.handle = NV50_DISP_HANDLE_SYNCBUF; in nv50_dmac_create()
288 dmac->vram.handle = NV50_DISP_HANDLE_VRAM; in nv50_dmac_create()
292 ret = nvif_object_ctor(&dmac->base.user, "kmsSyncCtxDma", NV50_DISP_HANDLE_SYNCBUF, in nv50_dmac_create()
300 &dmac->sync); in nv50_dmac_create()
304 ret = nvif_object_ctor(&dmac->base.user, "kmsVramCtxDma", NV50_DISP_HANDLE_VRAM, in nv50_dmac_create()
310 .limit = device->info.ram_user - 1, in nv50_dmac_create()
312 &dmac->vram); in nv50_dmac_create()
327 outp->base.base.name, outp->caps.dp_interlace); in nv50_outp_dump_caps()
336 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; in nv50_outp_atomic_check_view()
337 struct drm_display_mode *mode = &crtc_state->mode; in nv50_outp_atomic_check_view()
338 struct drm_connector *connector = conn_state->connector; in nv50_outp_atomic_check_view() local
340 struct nouveau_drm *drm = nouveau_drm(encoder->dev); in nv50_outp_atomic_check_view()
342 NV_ATOMIC(drm, "%s atomic_check\n", encoder->name); in nv50_outp_atomic_check_view()
343 asyc->scaler.full = false; in nv50_outp_atomic_check_view()
347 if (asyc->scaler.mode == DRM_MODE_SCALE_NONE) { in nv50_outp_atomic_check_view()
348 switch (connector->connector_type) { in nv50_outp_atomic_check_view()
355 if (mode->hdisplay == native_mode->hdisplay && in nv50_outp_atomic_check_view()
356 mode->vdisplay == native_mode->vdisplay && in nv50_outp_atomic_check_view()
357 mode->type & DRM_MODE_TYPE_DRIVER) in nv50_outp_atomic_check_view()
360 asyc->scaler.full = true; in nv50_outp_atomic_check_view()
371 crtc_state->mode_changed = true; in nv50_outp_atomic_check_view()
382 struct drm_display_mode *mode = &asyh->state.adjusted_mode; in nv50_outp_atomic_fix_depth()
385 switch (nv_encoder->dcb->type) { in nv50_outp_atomic_fix_depth()
387 max_rate = nv_encoder->dp.link_nr * nv_encoder->dp.link_bw; in nv50_outp_atomic_fix_depth()
390 asyh->or.bpc = min_t(u8, asyh->or.bpc, 10); in nv50_outp_atomic_fix_depth()
393 while (asyh->or.bpc > 6) { in nv50_outp_atomic_fix_depth()
394 mode_rate = DIV_ROUND_UP(mode->clock * asyh->or.bpc * 3, 8); in nv50_outp_atomic_fix_depth()
398 asyh->or.bpc -= 2; in nv50_outp_atomic_fix_depth()
411 struct drm_connector *connector = conn_state->connector; in nv50_outp_atomic_check() local
412 struct nouveau_connector *nv_connector = nouveau_connector(connector); in nv50_outp_atomic_check()
417 nv_connector->native_mode); in nv50_outp_atomic_check()
421 if (crtc_state->mode_changed || crtc_state->connectors_changed) in nv50_outp_atomic_check()
422 asyh->or.bpc = connector->display_info.bpc; in nv50_outp_atomic_check()
433 struct drm_connector *connector; in nv50_outp_get_new_connector() local
438 for_each_new_connector_in_state(state, connector, connector_state, i) { in nv50_outp_get_new_connector()
439 if (connector_state->best_encoder == encoder) in nv50_outp_get_new_connector()
440 return nouveau_connector(connector); in nv50_outp_get_new_connector()
449 struct drm_connector *connector; in nv50_outp_get_old_connector() local
454 for_each_old_connector_in_state(state, connector, connector_state, i) { in nv50_outp_get_old_connector()
455 if (connector_state->best_encoder == encoder) in nv50_outp_get_old_connector()
456 return nouveau_connector(connector); in nv50_outp_get_old_connector()
467 const u32 mask = drm_encoder_mask(&outp->base.base); in nv50_outp_get_new_crtc()
471 if (crtc_state->encoder_mask & mask) in nv50_outp_get_new_crtc()
485 struct nv50_core *core = nv50_disp(encoder->dev)->core; in nv50_dac_atomic_disable()
488 core->func->dac->ctrl(core, nv_encoder->outp.or.id, ctrl, NULL); in nv50_dac_atomic_disable()
489 nv_encoder->crtc = NULL; in nv50_dac_atomic_disable()
498 nv50_head_atom(drm_atomic_get_new_crtc_state(state, &nv_crtc->base)); in nv50_dac_atomic_enable()
499 struct nv50_core *core = nv50_disp(encoder->dev)->core; in nv50_dac_atomic_enable()
502 switch (nv_crtc->index) { in nv50_dac_atomic_enable()
514 if (!nvif_outp_acquired(&nv_encoder->outp)) in nv50_dac_atomic_enable()
515 nvif_outp_acquire_dac(&nv_encoder->outp); in nv50_dac_atomic_enable()
517 core->func->dac->ctrl(core, nv_encoder->outp.or.id, ctrl, asyh); in nv50_dac_atomic_enable()
518 asyh->or.depth = 0; in nv50_dac_atomic_enable()
520 nv_encoder->crtc = &nv_crtc->base; in nv50_dac_atomic_enable()
524 nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector) in nv50_dac_detect() argument
530 loadval = nouveau_drm(encoder->dev)->vbios.dactestval; in nv50_dac_detect()
534 ret = nvif_outp_load_detect(&nv_encoder->outp, loadval); in nv50_dac_detect()
554 nvif_outp_dtor(&nv_encoder->outp); in nv50_dac_destroy()
568 struct drm_connector *connector = &nv_encoder->conn->base; in nv50_dac_create() local
569 struct nouveau_drm *drm = nouveau_drm(connector->dev); in nv50_dac_create()
573 struct dcb_output *dcbe = nv_encoder->dcb; in nv50_dac_create()
576 bus = nvkm_i2c_bus_find(i2c, dcbe->i2c_index); in nv50_dac_create()
578 nv_encoder->i2c = &bus->i2c; in nv50_dac_create()
581 drm_encoder_init(connector->dev, encoder, &nv50_dac_func, type, in nv50_dac_create()
582 "dac-%04x-%04x", dcbe->hasht, dcbe->hashm); in nv50_dac_create()
585 drm_connector_attach_encoder(connector, encoder); in nv50_dac_create()
596 if (acomp && acomp->audio_ops && acomp->audio_ops->pin_eld_notify) in nv50_audio_component_eld_notify()
597 acomp->audio_ops->pin_eld_notify(acomp->audio_ops->audio_ptr, in nv50_audio_component_eld_notify()
613 mutex_lock(&drm->audio.lock); in nv50_audio_component_get_eld()
615 drm_for_each_encoder(encoder, drm->dev) { in nv50_audio_component_get_eld()
618 if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) in nv50_audio_component_get_eld()
622 nv_connector = nv_encoder->conn; in nv50_audio_component_get_eld()
623 nv_crtc = nouveau_crtc(nv_encoder->crtc); in nv50_audio_component_get_eld()
625 if (!nv_crtc || nv_encoder->outp.or.id != port || nv_crtc->index != dev_id) in nv50_audio_component_get_eld()
628 *enabled = nv_encoder->audio.enabled; in nv50_audio_component_get_eld()
630 ret = drm_eld_size(nv_connector->base.eld); in nv50_audio_component_get_eld()
631 memcpy(buf, nv_connector->base.eld, in nv50_audio_component_get_eld()
637 mutex_unlock(&drm->audio.lock); in nv50_audio_component_get_eld()
654 return -ENOMEM; in nv50_audio_component_bind()
656 drm_modeset_lock_all(drm->dev); in nv50_audio_component_bind()
657 acomp->ops = &nv50_audio_component_ops; in nv50_audio_component_bind()
658 acomp->dev = kdev; in nv50_audio_component_bind()
659 drm->audio.component = acomp; in nv50_audio_component_bind()
660 drm_modeset_unlock_all(drm->dev); in nv50_audio_component_bind()
671 drm_modeset_lock_all(drm->dev); in nv50_audio_component_unbind()
672 drm->audio.component = NULL; in nv50_audio_component_unbind()
673 acomp->ops = NULL; in nv50_audio_component_unbind()
674 acomp->dev = NULL; in nv50_audio_component_unbind()
675 drm_modeset_unlock_all(drm->dev); in nv50_audio_component_unbind()
686 if (component_add(drm->dev->dev, &nv50_audio_component_bind_ops)) in nv50_audio_component_init()
689 drm->audio.component_registered = true; in nv50_audio_component_init()
690 mutex_init(&drm->audio.lock); in nv50_audio_component_init()
696 if (!drm->audio.component_registered) in nv50_audio_component_fini()
699 component_del(drm->dev->dev, &nv50_audio_component_bind_ops); in nv50_audio_component_fini()
700 drm->audio.component_registered = false; in nv50_audio_component_fini()
701 mutex_destroy(&drm->audio.lock); in nv50_audio_component_fini()
710 struct nv50_disp *disp = nv50_disp(encoder->dev); in nv50_audio_supported()
712 if (disp->disp->object.oclass <= GT200_DISP || in nv50_audio_supported()
713 disp->disp->object.oclass == GT206_DISP) in nv50_audio_supported()
716 if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) { in nv50_audio_supported()
719 switch (nv_encoder->dcb->type) { in nv50_audio_supported()
734 struct nouveau_drm *drm = nouveau_drm(encoder->dev); in nv50_audio_disable()
736 struct nvif_outp *outp = &nv_encoder->outp; in nv50_audio_disable()
741 mutex_lock(&drm->audio.lock); in nv50_audio_disable()
742 if (nv_encoder->audio.enabled) { in nv50_audio_disable()
743 nv_encoder->audio.enabled = false; in nv50_audio_disable()
744 nvif_outp_hda_eld(&nv_encoder->outp, nv_crtc->index, NULL, 0); in nv50_audio_disable()
746 mutex_unlock(&drm->audio.lock); in nv50_audio_disable()
748 nv50_audio_component_eld_notify(drm->audio.component, outp->or.id, nv_crtc->index); in nv50_audio_disable()
756 struct nouveau_drm *drm = nouveau_drm(encoder->dev); in nv50_audio_enable()
758 struct nvif_outp *outp = &nv_encoder->outp; in nv50_audio_enable()
760 if (!nv50_audio_supported(encoder) || !nv_connector->base.display_info.has_audio) in nv50_audio_enable()
763 mutex_lock(&drm->audio.lock); in nv50_audio_enable()
765 nvif_outp_hda_eld(&nv_encoder->outp, nv_crtc->index, nv_connector->base.eld, in nv50_audio_enable()
766 drm_eld_size(nv_connector->base.eld)); in nv50_audio_enable()
767 nv_encoder->audio.enabled = true; in nv50_audio_enable()
769 mutex_unlock(&drm->audio.lock); in nv50_audio_enable()
771 nv50_audio_component_eld_notify(drm->audio.component, outp->or.id, nv_crtc->index); in nv50_audio_enable()
782 struct nouveau_drm *drm = nouveau_drm(encoder->dev); in nv50_hdmi_enable()
784 struct drm_hdmi_info *hdmi = &nv_connector->base.display_info.hdmi; in nv50_hdmi_enable()
789 const u8 data_len = __member_size(args->data); in nv50_hdmi_enable()
792 max_ac_packet = mode->htotal - mode->hdisplay; in nv50_hdmi_enable()
793 max_ac_packet -= rekey; in nv50_hdmi_enable()
794 max_ac_packet -= 18; /* constant from tegra */ in nv50_hdmi_enable()
797 if (nv_encoder->i2c && hdmi->scdc.scrambling.supported) { in nv50_hdmi_enable()
798 const bool high_tmds_clock_ratio = mode->clock > 340000; in nv50_hdmi_enable()
801 ret = drm_scdc_readb(nv_encoder->i2c, SCDC_TMDS_CONFIG, &scdc); in nv50_hdmi_enable()
808 if (high_tmds_clock_ratio || hdmi->scdc.scrambling.low_rates) in nv50_hdmi_enable()
813 ret = drm_scdc_writeb(nv_encoder->i2c, SCDC_TMDS_CONFIG, scdc); in nv50_hdmi_enable()
819 ret = nvif_outp_hdmi(&nv_encoder->outp, nv_crtc->index, true, max_ac_packet, rekey, in nv50_hdmi_enable()
820 mode->clock, hdmi->scdc.supported, hdmi->scdc.scrambling.supported, in nv50_hdmi_enable()
821 hdmi->scdc.scrambling.low_rates); in nv50_hdmi_enable()
826 args->version = 0; in nv50_hdmi_enable()
827 args->head = nv_crtc->index; in nv50_hdmi_enable()
829 if (!drm_hdmi_avi_infoframe_from_display_mode(&infoframe.avi, &nv_connector->base, mode)) { in nv50_hdmi_enable()
830 drm_hdmi_avi_infoframe_quant_range(&infoframe.avi, &nv_connector->base, mode, in nv50_hdmi_enable()
833 size = hdmi_infoframe_pack(&infoframe, args->data, data_len); in nv50_hdmi_enable()
838 nvif_outp_infoframe(&nv_encoder->outp, NVIF_OUTP_INFOFRAME_V0_AVI, args, size); in nv50_hdmi_enable()
841 memset(args->data, 0, data_len); in nv50_hdmi_enable()
843 &nv_connector->base, mode)) in nv50_hdmi_enable()
844 size = hdmi_infoframe_pack(&infoframe, args->data, data_len); in nv50_hdmi_enable()
848 nvif_outp_infoframe(&nv_encoder->outp, NVIF_OUTP_INFOFRAME_V0_VSI, args, size); in nv50_hdmi_enable()
850 nv_encoder->hdmi.enabled = true; in nv50_hdmi_enable()
857 #define nv50_mstc(p) container_of((p), struct nv50_mstc, connector)
863 struct drm_connector connector; member
885 if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) in nv50_real_outp()
889 if (!msto->mstc) in nv50_real_outp()
891 return msto->mstc->mstm->outp; in nv50_real_outp()
900 struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev); in nv50_msto_cleanup()
902 drm_atomic_get_mst_payload_state(new_mst_state, msto->mstc->port); in nv50_msto_cleanup()
906 drm_atomic_get_mst_payload_state(old_mst_state, msto->mstc->port); in nv50_msto_cleanup()
907 struct nv50_mstc *mstc = msto->mstc; in nv50_msto_cleanup()
908 struct nv50_mstm *mstm = mstc->mstm; in nv50_msto_cleanup()
910 NV_ATOMIC(drm, "%s: msto cleanup\n", msto->encoder.name); in nv50_msto_cleanup()
912 if (msto->disabled) { in nv50_msto_cleanup()
913 if (msto->head->func->display_id) { in nv50_msto_cleanup()
914 nvif_outp_dp_mst_id_put(&mstm->outp->outp, msto->display_id); in nv50_msto_cleanup()
915 msto->display_id = 0; in nv50_msto_cleanup()
918 msto->mstc = NULL; in nv50_msto_cleanup()
919 msto->disabled = false; in nv50_msto_cleanup()
921 } else if (msto->enabled) { in nv50_msto_cleanup()
923 msto->enabled = false; in nv50_msto_cleanup()
933 struct nouveau_drm *drm = nouveau_drm(msto->encoder.dev); in nv50_msto_prepare()
934 struct nv50_mstc *mstc = msto->mstc; in nv50_msto_prepare()
935 struct nv50_mstm *mstm = mstc->mstm; in nv50_msto_prepare()
939 NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name); in nv50_msto_prepare()
941 payload = drm_atomic_get_mst_payload_state(mst_state, mstc->port); in nv50_msto_prepare()
943 if (msto->disabled) { in nv50_msto_prepare()
945 nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index, 0, 0, 0, 0); in nv50_msto_prepare()
948 if (msto->enabled) in nv50_msto_prepare()
953 nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index, in nv50_msto_prepare()
954 payload->vc_start_slot, payload->time_slots, in nv50_msto_prepare()
955 payload->pbn, in nv50_msto_prepare()
956 payload->time_slots * dfixed_trunc(mst_state->pbn_div)); in nv50_msto_prepare()
958 nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index, 0, 0, 0, 0); in nv50_msto_prepare()
967 struct drm_atomic_state *state = crtc_state->state; in nv50_msto_atomic_check()
968 struct drm_connector *connector = conn_state->connector; in nv50_msto_atomic_check() local
970 struct nv50_mstc *mstc = nv50_mstc(connector); in nv50_msto_atomic_check()
971 struct nv50_mstm *mstm = mstc->mstm; in nv50_msto_atomic_check()
977 mstc->native); in nv50_msto_atomic_check()
986 * remains the same and avoid recalculating it, as the connector's bpc in nv50_msto_atomic_check()
989 if (!state->duplicated) { in nv50_msto_atomic_check()
990 const int clock = crtc_state->adjusted_mode.clock; in nv50_msto_atomic_check()
992 asyh->or.bpc = connector->display_info.bpc; in nv50_msto_atomic_check()
993 asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, asyh->or.bpc * 3 << 4); in nv50_msto_atomic_check()
996 mst_state = drm_atomic_get_mst_topology_state(state, &mstm->mgr); in nv50_msto_atomic_check()
1000 if (!mst_state->pbn_div.full) { in nv50_msto_atomic_check()
1001 struct nouveau_encoder *outp = mstc->mstm->outp; in nv50_msto_atomic_check()
1003 mst_state->pbn_div = drm_dp_get_vc_payload_bw(outp->dp.link_bw, outp->dp.link_nr); in nv50_msto_atomic_check()
1006 slots = drm_dp_atomic_find_time_slots(state, &mstm->mgr, mstc->port, asyh->dp.pbn); in nv50_msto_atomic_check()
1010 asyh->dp.tu = slots; in nv50_msto_atomic_check()
1030 struct nv50_head *head = msto->head; in nv50_msto_atomic_enable()
1032 nv50_head_atom(drm_atomic_get_new_crtc_state(state, &head->base.base)); in nv50_msto_atomic_enable()
1035 struct drm_connector *connector; in nv50_msto_atomic_enable() local
1039 drm_connector_list_iter_begin(encoder->dev, &conn_iter); in nv50_msto_atomic_enable()
1040 drm_for_each_connector_iter(connector, &conn_iter) { in nv50_msto_atomic_enable()
1041 if (connector->state->best_encoder == &msto->encoder) { in nv50_msto_atomic_enable()
1042 mstc = nv50_mstc(connector); in nv50_msto_atomic_enable()
1043 mstm = mstc->mstm; in nv50_msto_atomic_enable()
1052 if (!mstm->links++) { in nv50_msto_atomic_enable()
1053 nvif_outp_acquire_sor(&mstm->outp->outp, false /*TODO: MST audio... */); in nv50_msto_atomic_enable()
1054 nouveau_dp_train(mstm->outp, true, 0, 0); in nv50_msto_atomic_enable()
1057 if (head->func->display_id) { in nv50_msto_atomic_enable()
1058 if (!WARN_ON(nvif_outp_dp_mst_id_get(&mstm->outp->outp, &msto->display_id))) in nv50_msto_atomic_enable()
1059 head->func->display_id(head, msto->display_id); in nv50_msto_atomic_enable()
1062 if (mstm->outp->outp.or.link & 1) in nv50_msto_atomic_enable()
1067 mstm->outp->update(mstm->outp, head->base.index, asyh, proto, in nv50_msto_atomic_enable()
1068 nv50_dp_bpc_to_depth(asyh->or.bpc)); in nv50_msto_atomic_enable()
1070 msto->mstc = mstc; in nv50_msto_atomic_enable()
1071 msto->enabled = true; in nv50_msto_atomic_enable()
1072 mstm->modified = true; in nv50_msto_atomic_enable()
1079 struct nv50_mstc *mstc = msto->mstc; in nv50_msto_atomic_disable()
1080 struct nv50_mstm *mstm = mstc->mstm; in nv50_msto_atomic_disable()
1082 if (msto->head->func->display_id) in nv50_msto_atomic_disable()
1083 msto->head->func->display_id(msto->head, 0); in nv50_msto_atomic_disable()
1085 mstm->outp->update(mstm->outp, msto->head->base.index, NULL, 0, 0); in nv50_msto_atomic_disable()
1086 mstm->modified = true; in nv50_msto_atomic_disable()
1087 if (!--mstm->links) in nv50_msto_atomic_disable()
1088 mstm->disabled = true; in nv50_msto_atomic_disable()
1089 msto->disabled = true; in nv50_msto_atomic_disable()
1103 drm_encoder_cleanup(&msto->encoder); in nv50_msto_destroy()
1120 return ERR_PTR(-ENOMEM); in nv50_msto_new()
1122 ret = drm_encoder_init(dev, &msto->encoder, &nv50_msto, in nv50_msto_new()
1123 DRM_MODE_ENCODER_DPMST, "mst-%d", id); in nv50_msto_new()
1129 drm_encoder_helper_add(&msto->encoder, &nv50_msto_help); in nv50_msto_new()
1130 msto->encoder.possible_crtcs = drm_crtc_mask(&head->base.base); in nv50_msto_new()
1131 msto->head = head; in nv50_msto_new()
1136 nv50_mstc_atomic_best_encoder(struct drm_connector *connector, in nv50_mstc_atomic_best_encoder() argument
1140 connector); in nv50_mstc_atomic_best_encoder()
1141 struct nv50_mstc *mstc = nv50_mstc(connector); in nv50_mstc_atomic_best_encoder()
1142 struct drm_crtc *crtc = connector_state->crtc; in nv50_mstc_atomic_best_encoder()
1144 if (!(mstc->mstm->outp->dcb->heads & drm_crtc_mask(crtc))) in nv50_mstc_atomic_best_encoder()
1147 return &nv50_head(crtc)->msto->encoder; in nv50_mstc_atomic_best_encoder()
1151 nv50_mstc_mode_valid(struct drm_connector *connector, in nv50_mstc_mode_valid() argument
1154 struct nv50_mstc *mstc = nv50_mstc(connector); in nv50_mstc_mode_valid()
1155 struct nouveau_encoder *outp = mstc->mstm->outp; in nv50_mstc_mode_valid()
1165 nv50_mstc_get_modes(struct drm_connector *connector) in nv50_mstc_get_modes() argument
1167 struct nv50_mstc *mstc = nv50_mstc(connector); in nv50_mstc_get_modes()
1170 mstc->edid = drm_dp_mst_get_edid(&mstc->connector, mstc->port->mgr, mstc->port); in nv50_mstc_get_modes()
1171 drm_connector_update_edid_property(&mstc->connector, mstc->edid); in nv50_mstc_get_modes()
1172 if (mstc->edid) in nv50_mstc_get_modes()
1173 ret = drm_add_edid_modes(&mstc->connector, mstc->edid); in nv50_mstc_get_modes()
1181 if (connector->display_info.bpc) in nv50_mstc_get_modes()
1182 connector->display_info.bpc = in nv50_mstc_get_modes()
1183 clamp(connector->display_info.bpc, 6U, 8U); in nv50_mstc_get_modes()
1185 connector->display_info.bpc = 8; in nv50_mstc_get_modes()
1187 if (mstc->native) in nv50_mstc_get_modes()
1188 drm_mode_destroy(mstc->connector.dev, mstc->native); in nv50_mstc_get_modes()
1189 mstc->native = nouveau_conn_native_mode(&mstc->connector); in nv50_mstc_get_modes()
1194 nv50_mstc_atomic_check(struct drm_connector *connector, in nv50_mstc_atomic_check() argument
1197 struct nv50_mstc *mstc = nv50_mstc(connector); in nv50_mstc_atomic_check()
1198 struct drm_dp_mst_topology_mgr *mgr = &mstc->mstm->mgr; in nv50_mstc_atomic_check()
1200 return drm_dp_atomic_release_time_slots(state, mgr, mstc->port); in nv50_mstc_atomic_check()
1204 nv50_mstc_detect(struct drm_connector *connector, in nv50_mstc_detect() argument
1207 struct nv50_mstc *mstc = nv50_mstc(connector); in nv50_mstc_detect()
1210 if (drm_connector_is_unregistered(connector)) in nv50_mstc_detect()
1213 ret = pm_runtime_get_sync(connector->dev->dev); in nv50_mstc_detect()
1214 if (ret < 0 && ret != -EACCES) { in nv50_mstc_detect()
1215 pm_runtime_put_autosuspend(connector->dev->dev); in nv50_mstc_detect()
1219 ret = drm_dp_mst_detect_port(connector, ctx, mstc->port->mgr, in nv50_mstc_detect()
1220 mstc->port); in nv50_mstc_detect()
1225 pm_runtime_mark_last_busy(connector->dev->dev); in nv50_mstc_detect()
1226 pm_runtime_put_autosuspend(connector->dev->dev); in nv50_mstc_detect()
1240 nv50_mstc_destroy(struct drm_connector *connector) in nv50_mstc_destroy() argument
1242 struct nv50_mstc *mstc = nv50_mstc(connector); in nv50_mstc_destroy()
1244 drm_connector_cleanup(&mstc->connector); in nv50_mstc_destroy()
1245 drm_dp_mst_put_port_malloc(mstc->port); in nv50_mstc_destroy()
1265 struct drm_device *dev = mstm->outp->base.base.dev; in nv50_mstc_new()
1271 return -ENOMEM; in nv50_mstc_new()
1272 mstc->mstm = mstm; in nv50_mstc_new()
1273 mstc->port = port; in nv50_mstc_new()
1275 ret = drm_connector_dynamic_init(dev, &mstc->connector, &nv50_mstc, in nv50_mstc_new()
1283 drm_connector_helper_add(&mstc->connector, &nv50_mstc_help); in nv50_mstc_new()
1285 mstc->connector.funcs->reset(&mstc->connector); in nv50_mstc_new()
1286 nouveau_conn_attach_properties(&mstc->connector); in nv50_mstc_new()
1289 if (!(mstm->outp->dcb->heads & drm_crtc_mask(crtc))) in nv50_mstc_new()
1292 drm_connector_attach_encoder(&mstc->connector, in nv50_mstc_new()
1293 &nv50_head(crtc)->msto->encoder); in nv50_mstc_new()
1296 drm_object_attach_property(&mstc->connector.base, dev->mode_config.path_property, 0); in nv50_mstc_new()
1297 drm_object_attach_property(&mstc->connector.base, dev->mode_config.tile_property, 0); in nv50_mstc_new()
1298 drm_connector_set_path_property(&mstc->connector, path); in nv50_mstc_new()
1308 struct nouveau_drm *drm = nouveau_drm(mstm->outp->base.base.dev); in nv50_mstm_cleanup()
1311 NV_ATOMIC(drm, "%s: mstm cleanup\n", mstm->outp->base.base.name); in nv50_mstm_cleanup()
1312 drm_dp_check_act_status(&mstm->mgr); in nv50_mstm_cleanup()
1314 drm_for_each_encoder(encoder, mstm->outp->base.base.dev) { in nv50_mstm_cleanup()
1315 if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) { in nv50_mstm_cleanup()
1317 struct nv50_mstc *mstc = msto->mstc; in nv50_mstm_cleanup()
1318 if (mstc && mstc->mstm == mstm) in nv50_mstm_cleanup()
1319 nv50_msto_cleanup(state, mst_state, &mstm->mgr, msto); in nv50_mstm_cleanup()
1323 if (mstm->disabled) { in nv50_mstm_cleanup()
1324 nouveau_dp_power_down(mstm->outp); in nv50_mstm_cleanup()
1325 nvif_outp_release(&mstm->outp->outp); in nv50_mstm_cleanup()
1326 mstm->disabled = false; in nv50_mstm_cleanup()
1329 mstm->modified = false; in nv50_mstm_cleanup()
1337 struct nouveau_drm *drm = nouveau_drm(mstm->outp->base.base.dev); in nv50_mstm_prepare()
1340 NV_ATOMIC(drm, "%s: mstm prepare\n", mstm->outp->base.base.name); in nv50_mstm_prepare()
1343 drm_for_each_encoder(encoder, mstm->outp->base.base.dev) { in nv50_mstm_prepare()
1344 if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) { in nv50_mstm_prepare()
1346 struct nv50_mstc *mstc = msto->mstc; in nv50_mstm_prepare()
1347 if (mstc && mstc->mstm == mstm && msto->disabled) in nv50_mstm_prepare()
1348 nv50_msto_prepare(state, mst_state, &mstm->mgr, msto); in nv50_mstm_prepare()
1355 drm_for_each_encoder(encoder, mstm->outp->base.base.dev) { in nv50_mstm_prepare()
1356 if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) { in nv50_mstm_prepare()
1358 struct nv50_mstc *mstc = msto->mstc; in nv50_mstm_prepare()
1359 if (mstc && mstc->mstm == mstm && !msto->disabled) in nv50_mstm_prepare()
1360 nv50_msto_prepare(state, mst_state, &mstm->mgr, msto); in nv50_mstm_prepare()
1377 return &mstc->connector; in nv50_mstm_add_connector()
1390 struct drm_dp_aux *aux = &nv_connector->aux; in nv50_mstm_service()
1404 drm_dp_mst_hpd_irq_handle_event(&mstm->mgr, esi, ack, &handled); in nv50_mstm_service()
1415 drm_dp_mst_hpd_irq_send_new_request(&mstm->mgr); in nv50_mstm_service()
1420 nv_connector->base.name, rc); in nv50_mstm_service()
1428 mstm->is_mst = false; in nv50_mstm_remove()
1429 drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, false); in nv50_mstm_remove()
1435 struct nv50_mstm *mstm = outp->dp.mstm; in nv50_mstm_detect()
1439 if (!mstm || !mstm->can_mst) in nv50_mstm_detect()
1442 aux = mstm->mgr.aux; in nv50_mstm_detect()
1452 ret = drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, true); in nv50_mstm_detect()
1456 mstm->is_mst = true; in nv50_mstm_detect()
1463 struct nv50_mstm *mstm = outp->dp.mstm; in nv50_mstm_fini()
1468 /* Don't change the MST state of this connector until we've finished in nv50_mstm_fini()
1470 * path to protect mstm->is_mst without potentially deadlocking in nv50_mstm_fini()
1472 mutex_lock(&outp->dp.hpd_irq_lock); in nv50_mstm_fini()
1473 mstm->suspended = true; in nv50_mstm_fini()
1474 mutex_unlock(&outp->dp.hpd_irq_lock); in nv50_mstm_fini()
1476 if (mstm->is_mst) in nv50_mstm_fini()
1477 drm_dp_mst_topology_mgr_suspend(&mstm->mgr); in nv50_mstm_fini()
1483 struct nv50_mstm *mstm = outp->dp.mstm; in nv50_mstm_init()
1489 if (mstm->is_mst) { in nv50_mstm_init()
1490 ret = drm_dp_mst_topology_mgr_resume(&mstm->mgr, !runtime); in nv50_mstm_init()
1491 if (ret == -1) in nv50_mstm_init()
1495 mutex_lock(&outp->dp.hpd_irq_lock); in nv50_mstm_init()
1496 mstm->suspended = false; in nv50_mstm_init()
1497 mutex_unlock(&outp->dp.hpd_irq_lock); in nv50_mstm_init()
1499 if (ret == -1) in nv50_mstm_init()
1500 drm_kms_helper_hotplug_event(mstm->mgr.dev); in nv50_mstm_init()
1508 drm_dp_mst_topology_mgr_destroy(&mstm->mgr); in nv50_mstm_del()
1518 const int max_payloads = hweight8(outp->dcb->heads); in nv50_mstm_new()
1519 struct drm_device *dev = outp->base.base.dev; in nv50_mstm_new()
1524 return -ENOMEM; in nv50_mstm_new()
1525 mstm->outp = outp; in nv50_mstm_new()
1526 mstm->mgr.cbs = &nv50_mstm; in nv50_mstm_new()
1528 ret = drm_dp_mst_topology_mgr_init(&mstm->mgr, dev, aux, aux_max, in nv50_mstm_new()
1543 struct nv50_disp *disp = nv50_disp(nv_encoder->base.base.dev); in nv50_sor_update()
1544 struct nv50_core *core = disp->core; in nv50_sor_update()
1547 nv_encoder->ctrl &= ~BIT(head); in nv50_sor_update()
1548 if (NVDEF_TEST(nv_encoder->ctrl, NV507D, SOR_SET_CONTROL, OWNER, ==, NONE)) in nv50_sor_update()
1549 nv_encoder->ctrl = 0; in nv50_sor_update()
1551 nv_encoder->ctrl |= NVVAL(NV507D, SOR_SET_CONTROL, PROTOCOL, proto); in nv50_sor_update()
1552 nv_encoder->ctrl |= BIT(head); in nv50_sor_update()
1553 asyh->or.depth = depth; in nv50_sor_update()
1556 core->func->sor->ctrl(core, nv_encoder->outp.or.id, nv_encoder->ctrl, asyh); in nv50_sor_update()
1559 /* TODO: Should we extend this to PWM-only backlights?
1568 struct nv50_head *head = nv50_head(nv_encoder->crtc); in nv50_sor_atomic_disable()
1571 struct nouveau_drm *drm = nouveau_drm(nv_encoder->base.base.dev); in nv50_sor_atomic_disable()
1572 struct nouveau_backlight *backlight = nv_connector->backlight; in nv50_sor_atomic_disable()
1573 struct drm_dp_aux *aux = &nv_connector->aux; in nv50_sor_atomic_disable()
1576 if (backlight && backlight->uses_dpcd) { in nv50_sor_atomic_disable()
1577 ret = drm_edp_backlight_disable(aux, &backlight->edp_info); in nv50_sor_atomic_disable()
1579 NV_ERROR(drm, "Failed to disable backlight on [CONNECTOR:%d:%s]: %d\n", in nv50_sor_atomic_disable()
1580 nv_connector->base.base.id, nv_connector->base.name, ret); in nv50_sor_atomic_disable()
1584 if (nv_encoder->dcb->type == DCB_OUTPUT_TMDS && nv_encoder->hdmi.enabled) { in nv50_sor_atomic_disable()
1585 nvif_outp_hdmi(&nv_encoder->outp, head->base.index, in nv50_sor_atomic_disable()
1587 nv_encoder->hdmi.enabled = false; in nv50_sor_atomic_disable()
1590 if (nv_encoder->dcb->type == DCB_OUTPUT_DP) in nv50_sor_atomic_disable()
1593 if (head->func->display_id) in nv50_sor_atomic_disable()
1594 head->func->display_id(head, 0); in nv50_sor_atomic_disable()
1596 nv_encoder->update(nv_encoder, head->base.index, NULL, 0, 0); in nv50_sor_atomic_disable()
1597 nv50_audio_disable(encoder, &head->base); in nv50_sor_atomic_disable()
1598 nv_encoder->crtc = NULL; in nv50_sor_atomic_disable()
1611 bool enhancedFraming = outp->dp.dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP; in nv50_sor_dp_watermark_sst()
1612 u64 minRate = outp->dp.link_bw * 1000; in nv50_sor_dp_watermark_sst()
1624 unsigned surfaceWidth = asyh->mode.h.blanks - asyh->mode.h.blanke; in nv50_sor_dp_watermark_sst()
1625 unsigned rasterWidth = asyh->mode.h.active; in nv50_sor_dp_watermark_sst()
1626 unsigned depth = asyh->or.bpc * 3; in nv50_sor_dp_watermark_sst()
1628 u64 pixelClockHz = asyh->mode.clock * 1000; in nv50_sor_dp_watermark_sst()
1630 u32 numLanesPerLink = outp->dp.link_nr; in nv50_sor_dp_watermark_sst()
1638 if (outp->outp.info.dp.increased_wm) { in nv50_sor_dp_watermark_sst()
1643 if ((pixelClockHz * depth) >= (8 * minRate * outp->dp.link_nr * DSC_FACTOR)) in nv50_sor_dp_watermark_sst()
1653 ((pixelClockHz * depth) < div_u64(8 * minRate * outp->dp.link_nr * DSC_FACTOR, 64))) in nv50_sor_dp_watermark_sst()
1665 ratioF = div_u64(ratioF, 8 * (u64) minRate * outp->dp.link_nr); in nv50_sor_dp_watermark_sst()
1670 watermarkF = div_u64(ratioF * tuSize * (PrecisionFactor - ratioF), PrecisionFactor); in nv50_sor_dp_watermark_sst()
1676 numSymbolsPerLine = div_u64(surfaceWidth * depth, 8 * outp->dp.link_nr * DSC_FACTOR); in nv50_sor_dp_watermark_sst()
1699 PixelSteeringBits = remain ? div_u64((numLanesPerLink - remain) * depth, DSC_FACTOR) : 0; in nv50_sor_dp_watermark_sst()
1706 if (WARN_ON(MinHBlank > rasterWidth - surfaceWidth)) in nv50_sor_dp_watermark_sst()
1709 // Bug 702290 - Active Width should be greater than 60 in nv50_sor_dp_watermark_sst()
1714 …hblank_symbols = (s32)(div_u64((u64)(rasterWidth - surfaceWidth - MinHBlank) * minRate, pixelClock… in nv50_sor_dp_watermark_sst()
1717 hblank_symbols -= 1; //Stuffer latency to send BS in nv50_sor_dp_watermark_sst()
1718 hblank_symbols -= 3; //SPKT latency to send data to stuffer in nv50_sor_dp_watermark_sst()
1720 hblank_symbols -= numLanesPerLink == 1 ? 9 : numLanesPerLink == 2 ? 6 : 3; in nv50_sor_dp_watermark_sst()
1725 …nk = ((SetRasterBlankEnd.X + SetRasterSize.Width - SetRasterBlankStart.X - 40) * link_clk / pclk) … in nv50_sor_dp_watermark_sst()
1733 vblank_symbols = (s32)((div_u64((u64)(surfaceWidth - 40) * minRate, pixelClockHz))) - 1; in nv50_sor_dp_watermark_sst()
1735 vblank_symbols -= numLanesPerLink == 1 ? 39 : numLanesPerLink == 2 ? 21 : 12; in nv50_sor_dp_watermark_sst()
1740 return nvif_outp_dp_sst(&outp->outp, head->base.index, waterMark, hBlankSym, vBlankSym); in nv50_sor_dp_watermark_sst()
1749 nv50_head_atom(drm_atomic_get_new_crtc_state(state, &nv_crtc->base)); in nv50_sor_atomic_enable()
1750 struct drm_display_mode *mode = &asyh->state.adjusted_mode; in nv50_sor_atomic_enable()
1751 struct nv50_disp *disp = nv50_disp(encoder->dev); in nv50_sor_atomic_enable()
1752 struct nv50_head *head = nv50_head(&nv_crtc->base); in nv50_sor_atomic_enable()
1753 struct nvif_outp *outp = &nv_encoder->outp; in nv50_sor_atomic_enable()
1754 struct drm_device *dev = encoder->dev; in nv50_sor_atomic_enable()
1760 struct nvbios *bios = &drm->vbios; in nv50_sor_atomic_enable()
1766 nv_encoder->crtc = &nv_crtc->base; in nv50_sor_atomic_enable()
1768 if ((disp->disp->object.oclass == GT214_DISP || in nv50_sor_atomic_enable()
1769 disp->disp->object.oclass >= GF110_DISP) && in nv50_sor_atomic_enable()
1770 nv_encoder->dcb->type != DCB_OUTPUT_LVDS && in nv50_sor_atomic_enable()
1771 nv_connector->base.display_info.has_audio) in nv50_sor_atomic_enable()
1777 switch (nv_encoder->dcb->type) { in nv50_sor_atomic_enable()
1779 if (disp->disp->object.oclass != NV50_DISP && in nv50_sor_atomic_enable()
1780 nv_connector->base.display_info.is_hdmi) in nv50_sor_atomic_enable()
1783 if (nv_encoder->outp.or.link & 1) { in nv50_sor_atomic_enable()
1785 /* Only enable dual-link if: in nv50_sor_atomic_enable()
1786 * - Need to (i.e. rate > 165MHz) in nv50_sor_atomic_enable()
1787 * - DCB says we can in nv50_sor_atomic_enable()
1788 * - Not an HDMI monitor, since there's no dual-link in nv50_sor_atomic_enable()
1791 if (mode->clock >= 165000 && in nv50_sor_atomic_enable()
1792 nv_encoder->dcb->duallink_possible && in nv50_sor_atomic_enable()
1793 !nv_connector->base.display_info.is_hdmi) in nv50_sor_atomic_enable()
1802 if (bios->fp_no_ddc) { in nv50_sor_atomic_enable()
1803 lvds_dual = bios->fp.dual_link; in nv50_sor_atomic_enable()
1804 lvds_8bpc = bios->fp.if_is_24bit; in nv50_sor_atomic_enable()
1806 if (nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) { in nv50_sor_atomic_enable()
1807 if (((u8 *)nv_connector->edid)[121] == 2) in nv50_sor_atomic_enable()
1810 if (mode->clock >= bios->fp.duallink_transition_clk) { in nv50_sor_atomic_enable()
1815 if (bios->fp.strapless_is_24bit & 2) in nv50_sor_atomic_enable()
1818 if (bios->fp.strapless_is_24bit & 1) in nv50_sor_atomic_enable()
1822 if (asyh->or.bpc == 8) in nv50_sor_atomic_enable()
1826 nvif_outp_lvds(&nv_encoder->outp, lvds_dual, lvds_8bpc); in nv50_sor_atomic_enable()
1829 nouveau_dp_train(nv_encoder, false, mode->clock, asyh->or.bpc); in nv50_sor_atomic_enable()
1831 depth = nv50_dp_bpc_to_depth(asyh->or.bpc); in nv50_sor_atomic_enable()
1833 if (nv_encoder->outp.or.link & 1) in nv50_sor_atomic_enable()
1839 backlight = nv_connector->backlight; in nv50_sor_atomic_enable()
1840 if (backlight && backlight->uses_dpcd) in nv50_sor_atomic_enable()
1841 drm_edp_backlight_enable(&nv_connector->aux, &backlight->edp_info, in nv50_sor_atomic_enable()
1842 backlight->dev->props.brightness); in nv50_sor_atomic_enable()
1851 if (head->func->display_id) in nv50_sor_atomic_enable()
1852 head->func->display_id(head, BIT(nv_encoder->outp.id)); in nv50_sor_atomic_enable()
1854 nv_encoder->update(nv_encoder, nv_crtc->index, asyh, proto, depth); in nv50_sor_atomic_enable()
1869 nv50_mstm_del(&nv_encoder->dp.mstm); in nv50_sor_destroy()
1872 if (nv_encoder->dcb->type == DCB_OUTPUT_DP) in nv50_sor_destroy()
1873 mutex_destroy(&nv_encoder->dp.hpd_irq_lock); in nv50_sor_destroy()
1875 nvif_outp_dtor(&nv_encoder->outp); in nv50_sor_destroy()
1887 struct drm_connector *connector = &nv_encoder->conn->base; in nv50_sor_create() local
1888 struct nouveau_connector *nv_connector = nouveau_connector(connector); in nv50_sor_create()
1889 struct nouveau_drm *drm = nouveau_drm(connector->dev); in nv50_sor_create()
1892 struct dcb_output *dcbe = nv_encoder->dcb; in nv50_sor_create()
1893 struct nv50_disp *disp = nv50_disp(connector->dev); in nv50_sor_create()
1896 switch (dcbe->type) { in nv50_sor_create()
1905 nv_encoder->update = nv50_sor_update; in nv50_sor_create()
1908 drm_encoder_init(connector->dev, encoder, &nv50_sor_func, type, in nv50_sor_create()
1909 "sor-%04x-%04x", dcbe->hasht, dcbe->hashm); in nv50_sor_create()
1912 drm_connector_attach_encoder(connector, encoder); in nv50_sor_create()
1914 disp->core->func->sor->get_caps(disp, nv_encoder, ffs(dcbe->or) - 1); in nv50_sor_create()
1917 if (dcbe->type == DCB_OUTPUT_DP) { in nv50_sor_create()
1918 mutex_init(&nv_encoder->dp.hpd_irq_lock); in nv50_sor_create()
1920 if (disp->disp->object.oclass < GF110_DISP) { in nv50_sor_create()
1921 /* HW has no support for address-only in nv50_sor_create()
1923 * use custom I2C-over-AUX code. in nv50_sor_create()
1927 aux = nvkm_i2c_aux_find(i2c, dcbe->i2c_index); in nv50_sor_create()
1929 return -EINVAL; in nv50_sor_create()
1931 nv_encoder->i2c = &aux->i2c; in nv50_sor_create()
1933 nv_encoder->i2c = &nv_connector->aux.ddc; in nv50_sor_create()
1936 if (nv_connector->type != DCB_CONNECTOR_eDP && nv_encoder->outp.info.dp.mst) { in nv50_sor_create()
1937 ret = nv50_mstm_new(nv_encoder, &nv_connector->aux, in nv50_sor_create()
1938 16, nv_connector->base.base.id, in nv50_sor_create()
1939 &nv_encoder->dp.mstm); in nv50_sor_create()
1944 if (nv_encoder->outp.info.ddc != NVIF_OUTP_DDC_INVALID) { in nv50_sor_create()
1946 nvkm_i2c_bus_find(i2c, dcbe->i2c_index); in nv50_sor_create()
1948 nv_encoder->i2c = &bus->i2c; in nv50_sor_create()
1965 crtc_state->adjusted_mode.clock *= 2; in nv50_pior_atomic_check()
1973 struct nv50_core *core = nv50_disp(encoder->dev)->core; in nv50_pior_atomic_disable()
1976 core->func->pior->ctrl(core, nv_encoder->outp.or.id, ctrl, NULL); in nv50_pior_atomic_disable()
1977 nv_encoder->crtc = NULL; in nv50_pior_atomic_disable()
1986 nv50_head_atom(drm_atomic_get_new_crtc_state(state, &nv_crtc->base)); in nv50_pior_atomic_enable()
1987 struct nv50_core *core = nv50_disp(encoder->dev)->core; in nv50_pior_atomic_enable()
1990 switch (nv_crtc->index) { in nv50_pior_atomic_enable()
1998 switch (asyh->or.bpc) { in nv50_pior_atomic_enable()
1999 case 10: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_30_444; break; in nv50_pior_atomic_enable()
2000 case 8: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_24_444; break; in nv50_pior_atomic_enable()
2001 case 6: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_18_444; break; in nv50_pior_atomic_enable()
2002 default: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_DEFAULT; break; in nv50_pior_atomic_enable()
2005 if (!nvif_outp_acquired(&nv_encoder->outp)) in nv50_pior_atomic_enable()
2006 nvif_outp_acquire_pior(&nv_encoder->outp); in nv50_pior_atomic_enable()
2008 switch (nv_encoder->dcb->type) { in nv50_pior_atomic_enable()
2014 nouveau_dp_train(nv_encoder, false, asyh->state.adjusted_mode.clock, 6); in nv50_pior_atomic_enable()
2021 core->func->pior->ctrl(core, nv_encoder->outp.or.id, ctrl, asyh); in nv50_pior_atomic_enable()
2022 nv_encoder->crtc = &nv_crtc->base; in nv50_pior_atomic_enable()
2037 nvif_outp_dtor(&nv_encoder->outp); in nv50_pior_destroy()
2041 mutex_destroy(&nv_encoder->dp.hpd_irq_lock); in nv50_pior_destroy()
2053 struct drm_connector *connector = &nv_encoder->conn->base; in nv50_pior_create() local
2054 struct drm_device *dev = connector->dev; in nv50_pior_create()
2062 struct dcb_output *dcbe = nv_encoder->dcb; in nv50_pior_create()
2065 switch (dcbe->type) { in nv50_pior_create()
2067 bus = nvkm_i2c_bus_find(i2c, nv_encoder->outp.info.ddc); in nv50_pior_create()
2068 ddc = bus ? &bus->i2c : NULL; in nv50_pior_create()
2072 aux = nvkm_i2c_aux_find(i2c, nv_encoder->outp.info.dp.aux); in nv50_pior_create()
2073 ddc = aux ? &aux->i2c : NULL; in nv50_pior_create()
2077 return -ENODEV; in nv50_pior_create()
2080 nv_encoder->i2c = ddc; in nv50_pior_create()
2082 mutex_init(&nv_encoder->dp.hpd_irq_lock); in nv50_pior_create()
2085 drm_encoder_init(connector->dev, encoder, &nv50_pior_func, type, in nv50_pior_create()
2086 "pior-%04x-%04x", dcbe->hasht, dcbe->hashm); in nv50_pior_create()
2089 drm_connector_attach_encoder(connector, encoder); in nv50_pior_create()
2091 disp->core->func->pior->get_caps(disp, nv_encoder, ffs(dcbe->or) - 1); in nv50_pior_create()
2106 struct nouveau_drm *drm = nouveau_drm(state->dev); in nv50_disp_atomic_commit_core()
2107 struct nv50_disp *disp = nv50_disp(drm->dev); in nv50_disp_atomic_commit_core()
2109 struct nv50_core *core = disp->core; in nv50_disp_atomic_commit_core()
2118 if (mstm->modified) in nv50_disp_atomic_commit_core()
2122 core->func->ntfy_init(disp->sync, NV50_DISP_CORE_NTFY); in nv50_disp_atomic_commit_core()
2123 core->func->update(core, interlock, true); in nv50_disp_atomic_commit_core()
2124 if (core->func->ntfy_wait_done(disp->sync, NV50_DISP_CORE_NTFY, in nv50_disp_atomic_commit_core()
2125 disp->core->chan.base.device)) in nv50_disp_atomic_commit_core()
2130 if (mstm->modified) in nv50_disp_atomic_commit_core()
2134 list_for_each_entry(outp, &atom->outp, head) { in nv50_disp_atomic_commit_core()
2135 if (outp->encoder->encoder_type != DRM_MODE_ENCODER_DPMST) { in nv50_disp_atomic_commit_core()
2136 struct nouveau_encoder *nv_encoder = nouveau_encoder(outp->encoder); in nv50_disp_atomic_commit_core()
2138 if (outp->enabled) { in nv50_disp_atomic_commit_core()
2139 nv50_audio_enable(outp->encoder, nouveau_crtc(nv_encoder->crtc), in nv50_disp_atomic_commit_core()
2140 nv_encoder->conn, NULL, NULL); in nv50_disp_atomic_commit_core()
2141 outp->enabled = outp->disabled = false; in nv50_disp_atomic_commit_core()
2143 if (outp->disabled) { in nv50_disp_atomic_commit_core()
2144 nvif_outp_release(&nv_encoder->outp); in nv50_disp_atomic_commit_core()
2145 outp->disabled = false; in nv50_disp_atomic_commit_core()
2161 if (interlock[wndw->interlock.type] & wndw->interlock.data) { in nv50_disp_atomic_commit_wndw()
2162 if (wndw->func->update) in nv50_disp_atomic_commit_wndw()
2163 wndw->func->update(wndw, interlock); in nv50_disp_atomic_commit_wndw()
2171 struct drm_device *dev = state->dev; in nv50_disp_atomic_commit_tail()
2179 struct nv50_core *core = disp->core; in nv50_disp_atomic_commit_tail()
2185 NV_ATOMIC(drm, "commit %d %d\n", atom->lock_core, atom->flush_disable); in nv50_disp_atomic_commit_tail()
2193 if (atom->lock_core) in nv50_disp_atomic_commit_tail()
2194 mutex_lock(&disp->mutex); in nv50_disp_atomic_commit_tail()
2201 NV_ATOMIC(drm, "%s: clr %04x (set %04x)\n", crtc->name, in nv50_disp_atomic_commit_tail()
2202 asyh->clr.mask, asyh->set.mask); in nv50_disp_atomic_commit_tail()
2204 if (old_crtc_state->active && !new_crtc_state->active) { in nv50_disp_atomic_commit_tail()
2205 pm_runtime_put_noidle(dev->dev); in nv50_disp_atomic_commit_tail()
2209 if (asyh->clr.mask) { in nv50_disp_atomic_commit_tail()
2210 nv50_head_flush_clr(head, asyh, atom->flush_disable); in nv50_disp_atomic_commit_tail()
2220 NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", plane->name, in nv50_disp_atomic_commit_tail()
2221 asyw->clr.mask, asyw->set.mask); in nv50_disp_atomic_commit_tail()
2222 if (!asyw->clr.mask) in nv50_disp_atomic_commit_tail()
2225 nv50_wndw_flush_clr(wndw, interlock, atom->flush_disable, asyw); in nv50_disp_atomic_commit_tail()
2229 list_for_each_entry(outp, &atom->outp, head) { in nv50_disp_atomic_commit_tail()
2233 encoder = outp->encoder; in nv50_disp_atomic_commit_tail()
2234 help = encoder->helper_private; in nv50_disp_atomic_commit_tail()
2236 NV_ATOMIC(drm, "%s: clr %02x (set %02x)\n", encoder->name, in nv50_disp_atomic_commit_tail()
2237 outp->clr.mask, outp->set.mask); in nv50_disp_atomic_commit_tail()
2239 if (outp->clr.mask) { in nv50_disp_atomic_commit_tail()
2240 help->atomic_disable(encoder, state); in nv50_disp_atomic_commit_tail()
2241 outp->disabled = true; in nv50_disp_atomic_commit_tail()
2248 if (atom->flush_disable) { in nv50_disp_atomic_commit_tail()
2262 list_for_each_entry(outp, &atom->outp, head) { in nv50_disp_atomic_commit_tail()
2266 encoder = outp->encoder; in nv50_disp_atomic_commit_tail()
2267 help = encoder->helper_private; in nv50_disp_atomic_commit_tail()
2269 NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", encoder->name, in nv50_disp_atomic_commit_tail()
2270 outp->set.mask, outp->clr.mask); in nv50_disp_atomic_commit_tail()
2272 if (outp->set.mask) { in nv50_disp_atomic_commit_tail()
2273 help->atomic_enable(encoder, state); in nv50_disp_atomic_commit_tail()
2274 outp->enabled = true; in nv50_disp_atomic_commit_tail()
2284 NV_ATOMIC(drm, "%s: set %04x (clr %04x)\n", crtc->name, in nv50_disp_atomic_commit_tail()
2285 asyh->set.mask, asyh->clr.mask); in nv50_disp_atomic_commit_tail()
2287 if (asyh->set.mask) { in nv50_disp_atomic_commit_tail()
2292 if (new_crtc_state->active) { in nv50_disp_atomic_commit_tail()
2293 if (!old_crtc_state->active) { in nv50_disp_atomic_commit_tail()
2295 pm_runtime_get_noresume(dev->dev); in nv50_disp_atomic_commit_tail()
2297 if (new_crtc_state->event) in nv50_disp_atomic_commit_tail()
2302 /* Update window->head assignment. in nv50_disp_atomic_commit_tail()
2308 * supports non-fixed mappings). in nv50_disp_atomic_commit_tail()
2310 if (core->assign_windows) { in nv50_disp_atomic_commit_tail()
2311 core->func->wndw.owner(core); in nv50_disp_atomic_commit_tail()
2313 core->assign_windows = false; in nv50_disp_atomic_commit_tail()
2335 NV_ATOMIC(drm, "%s: set %04x (clr %04x)\n", crtc->name, in nv50_disp_atomic_commit_tail()
2336 asyh->set.mask, asyh->clr.mask); in nv50_disp_atomic_commit_tail()
2338 if (asyh->set.mask) { in nv50_disp_atomic_commit_tail()
2349 NV_ATOMIC(drm, "%s: set %02x (clr %02x)\n", plane->name, in nv50_disp_atomic_commit_tail()
2350 asyw->set.mask, asyw->clr.mask); in nv50_disp_atomic_commit_tail()
2351 if ( !asyw->set.mask && in nv50_disp_atomic_commit_tail()
2352 (!asyw->clr.mask || atom->flush_disable)) in nv50_disp_atomic_commit_tail()
2365 !atom->state.legacy_cursor_update) in nv50_disp_atomic_commit_tail()
2368 disp->core->func->update(disp->core, interlock, false); in nv50_disp_atomic_commit_tail()
2371 if (atom->lock_core) in nv50_disp_atomic_commit_tail()
2372 mutex_unlock(&disp->mutex); in nv50_disp_atomic_commit_tail()
2374 list_for_each_entry_safe(outp, outt, &atom->outp, head) { in nv50_disp_atomic_commit_tail()
2375 list_del(&outp->head); in nv50_disp_atomic_commit_tail()
2385 NV_ERROR(drm, "%s: timeout\n", plane->name); in nv50_disp_atomic_commit_tail()
2389 if (new_crtc_state->event) { in nv50_disp_atomic_commit_tail()
2392 if (new_crtc_state->active) in nv50_disp_atomic_commit_tail()
2394 spin_lock_irqsave(&crtc->dev->event_lock, flags); in nv50_disp_atomic_commit_tail()
2395 drm_crtc_send_vblank_event(crtc, new_crtc_state->event); in nv50_disp_atomic_commit_tail()
2396 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); in nv50_disp_atomic_commit_tail()
2398 new_crtc_state->event = NULL; in nv50_disp_atomic_commit_tail()
2399 if (new_crtc_state->active) in nv50_disp_atomic_commit_tail()
2414 pm_runtime_mark_last_busy(dev->dev); in nv50_disp_atomic_commit_tail()
2415 pm_runtime_put_autosuspend(dev->dev); in nv50_disp_atomic_commit_tail()
2434 ret = pm_runtime_get_sync(dev->dev); in nv50_disp_atomic_commit()
2435 if (ret < 0 && ret != -EACCES) { in nv50_disp_atomic_commit()
2436 pm_runtime_put_autosuspend(dev->dev); in nv50_disp_atomic_commit()
2444 INIT_WORK(&state->commit_work, nv50_disp_atomic_commit_work); in nv50_disp_atomic_commit()
2464 if (asyw->set.image) in nv50_disp_atomic_commit()
2474 pm_runtime_get_noresume(dev->dev); in nv50_disp_atomic_commit()
2477 queue_work(system_unbound_wq, &state->commit_work); in nv50_disp_atomic_commit()
2485 pm_runtime_put_autosuspend(dev->dev); in nv50_disp_atomic_commit()
2494 list_for_each_entry(outp, &atom->outp, head) { in nv50_disp_outp_atomic_add()
2495 if (outp->encoder == encoder) in nv50_disp_outp_atomic_add()
2501 return ERR_PTR(-ENOMEM); in nv50_disp_outp_atomic_add()
2503 list_add(&outp->head, &atom->outp); in nv50_disp_outp_atomic_add()
2504 outp->encoder = encoder; in nv50_disp_outp_atomic_add()
2512 struct drm_encoder *encoder = old_connector_state->best_encoder; in nv50_disp_outp_atomic_check_clr()
2517 if (!(crtc = old_connector_state->crtc)) in nv50_disp_outp_atomic_check_clr()
2520 old_crtc_state = drm_atomic_get_old_crtc_state(&atom->state, crtc); in nv50_disp_outp_atomic_check_clr()
2521 new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc); in nv50_disp_outp_atomic_check_clr()
2522 if (old_crtc_state->active && drm_atomic_crtc_needs_modeset(new_crtc_state)) { in nv50_disp_outp_atomic_check_clr()
2527 if (outp->encoder->encoder_type == DRM_MODE_ENCODER_DPMST || in nv50_disp_outp_atomic_check_clr()
2528 nouveau_encoder(outp->encoder)->dcb->type == DCB_OUTPUT_DP) in nv50_disp_outp_atomic_check_clr()
2529 atom->flush_disable = true; in nv50_disp_outp_atomic_check_clr()
2530 outp->clr.ctrl = true; in nv50_disp_outp_atomic_check_clr()
2531 atom->lock_core = true; in nv50_disp_outp_atomic_check_clr()
2541 struct drm_encoder *encoder = connector_state->best_encoder; in nv50_disp_outp_atomic_check_set()
2546 if (!(crtc = connector_state->crtc)) in nv50_disp_outp_atomic_check_set()
2549 new_crtc_state = drm_atomic_get_new_crtc_state(&atom->state, crtc); in nv50_disp_outp_atomic_check_set()
2550 if (new_crtc_state->active && drm_atomic_crtc_needs_modeset(new_crtc_state)) { in nv50_disp_outp_atomic_check_set()
2555 outp->set.ctrl = true; in nv50_disp_outp_atomic_check_set()
2556 atom->lock_core = true; in nv50_disp_outp_atomic_check_set()
2566 struct nv50_core *core = nv50_disp(dev)->core; in nv50_disp_atomic_check()
2568 struct drm_connector *connector; in nv50_disp_atomic_check() local
2575 if (core->assign_windows && core->func->head->static_wndw_map) { in nv50_disp_atomic_check()
2584 core->func->head->static_wndw_map(head, asyh); in nv50_disp_atomic_check()
2588 /* We need to handle colour management on a per-plane basis. */ in nv50_disp_atomic_check()
2590 if (new_crtc_state->color_mgmt_changed) { in nv50_disp_atomic_check()
2601 for_each_oldnew_connector_in_state(state, connector, old_connector_state, new_connector_state, i) { in nv50_disp_atomic_check()
2626 list_for_each_entry_safe(outp, outt, &atom->outp, head) { in nv50_disp_atomic_state_clear()
2627 list_del(&outp->head); in nv50_disp_atomic_state_clear()
2638 drm_atomic_state_default_release(&atom->state); in nv50_disp_atomic_state_free()
2647 drm_atomic_state_init(dev, &atom->state) < 0) { in nv50_disp_atomic_state_alloc()
2651 INIT_LIST_HEAD(&atom->outp); in nv50_disp_atomic_state_alloc()
2652 return &atom->state; in nv50_disp_atomic_state_alloc()
2680 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { in nv50_display_fini()
2681 if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) in nv50_display_fini()
2685 if (!runtime && !drm->headless) in nv50_display_fini()
2686 cancel_work_sync(&drm->hpd_work); in nv50_display_fini()
2697 const u32 encoder_mask = drm_encoder_mask(&outp->base.base); in nv50_display_read_hw_or_state()
2703 switch (outp->dcb->type) { in nv50_display_read_hw_or_state()
2705 ret = nvif_outp_inherit_tmds(&outp->outp, &proto); in nv50_display_read_hw_or_state()
2708 ret = nvif_outp_inherit_dp(&outp->outp, &proto); in nv50_display_read_hw_or_state()
2711 ret = nvif_outp_inherit_lvds(&outp->outp, &proto); in nv50_display_read_hw_or_state()
2714 ret = nvif_outp_inherit_rgb_crt(&outp->outp, &proto); in nv50_display_read_hw_or_state()
2718 outp->base.base.name); in nv50_display_read_hw_or_state()
2729 if (crtc->index != head_idx) in nv50_display_read_hw_or_state()
2732 armh = nv50_head_atom(crtc->state); in nv50_display_read_hw_or_state()
2739 /* Figure out which connector is being used by this encoder */ in nv50_display_read_hw_or_state()
2742 if (nouveau_connector(conn)->index == outp->dcb->connector) { in nv50_display_read_hw_or_state()
2751 armh->state.encoder_mask = encoder_mask; in nv50_display_read_hw_or_state()
2752 armh->state.connector_mask = drm_connector_mask(conn); in nv50_display_read_hw_or_state()
2753 armh->state.active = true; in nv50_display_read_hw_or_state()
2754 armh->state.enable = true; in nv50_display_read_hw_or_state()
2755 pm_runtime_get_noresume(dev->dev); in nv50_display_read_hw_or_state()
2757 outp->crtc = crtc; in nv50_display_read_hw_or_state()
2758 outp->ctrl = NVVAL(NV507D, SOR_SET_CONTROL, PROTOCOL, proto) | BIT(crtc->index); in nv50_display_read_hw_or_state()
2761 conn->state->crtc = crtc; in nv50_display_read_hw_or_state()
2762 conn->state->best_encoder = &outp->base.base; in nv50_display_read_hw_or_state()
2769 struct drm_device *dev = drm->dev; in nv50_display_read_hw_state()
2778 if (encoder->encoder_type == DRM_MODE_ENCODER_DPMST) in nv50_display_read_hw_state()
2790 struct nv50_core *core = nv50_disp(dev)->core; in nv50_display_init()
2794 core->func->init(core); in nv50_display_init()
2796 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { in nv50_display_init()
2797 if (encoder->encoder_type != DRM_MODE_ENCODER_DPMST) { in nv50_display_init()
2817 nvif_object_unmap(&disp->caps); in nv50_display_destroy()
2818 nvif_object_dtor(&disp->caps); in nv50_display_destroy()
2819 nv50_core_del(&disp->core); in nv50_display_destroy()
2821 nouveau_bo_unpin_del(&disp->sync); in nv50_display_destroy()
2823 nouveau_display(dev)->priv = NULL; in nv50_display_destroy()
2831 struct drm_connector *connector, *tmp; in nv50_display_create() local
2838 return -ENOMEM; in nv50_display_create()
2840 mutex_init(&disp->mutex); in nv50_display_create()
2842 nouveau_display(dev)->priv = disp; in nv50_display_create()
2843 nouveau_display(dev)->dtor = nv50_display_destroy; in nv50_display_create()
2844 nouveau_display(dev)->init = nv50_display_init; in nv50_display_create()
2845 nouveau_display(dev)->fini = nv50_display_fini; in nv50_display_create()
2846 disp->disp = &nouveau_display(dev)->disp; in nv50_display_create()
2847 dev->mode_config.funcs = &nv50_disp_func; in nv50_display_create()
2848 dev->mode_config.helper_private = &nv50_disp_helper_func; in nv50_display_create()
2849 dev->mode_config.quirk_addfb_prefer_xbgr_30bpp = true; in nv50_display_create()
2850 dev->mode_config.normalize_zpos = true; in nv50_display_create()
2853 ret = nouveau_bo_new_map(&drm->client, NOUVEAU_GEM_DOMAIN_VRAM, PAGE_SIZE, &disp->sync); in nv50_display_create()
2858 ret = nv50_core_new(drm, &disp->core); in nv50_display_create()
2862 disp->core->func->init(disp->core); in nv50_display_create()
2863 if (disp->core->func->caps_init) { in nv50_display_create()
2864 ret = disp->core->func->caps_init(drm, disp); in nv50_display_create()
2870 if (disp->disp->object.oclass >= GB202_DISP) in nv50_display_create()
2871 nouveau_display(dev)->format_modifiers = wndwca7e_modifiers; in nv50_display_create()
2872 else if (disp->disp->object.oclass >= TU102_DISP) in nv50_display_create()
2873 nouveau_display(dev)->format_modifiers = wndwc57e_modifiers; in nv50_display_create()
2875 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_FERMI) in nv50_display_create()
2876 nouveau_display(dev)->format_modifiers = disp90xx_modifiers; in nv50_display_create()
2878 nouveau_display(dev)->format_modifiers = disp50xx_modifiers; in nv50_display_create()
2885 * But until then, just limit cursors to 128x128 - which is small enough to avoid ever using in nv50_display_create()
2888 if (disp->disp->object.oclass >= GM107_DISP) { in nv50_display_create()
2889 dev->mode_config.cursor_width = 256; in nv50_display_create()
2890 dev->mode_config.cursor_height = 256; in nv50_display_create()
2891 } else if (disp->disp->object.oclass >= GK104_DISP) { in nv50_display_create()
2892 dev->mode_config.cursor_width = 128; in nv50_display_create()
2893 dev->mode_config.cursor_height = 128; in nv50_display_create()
2895 dev->mode_config.cursor_width = 64; in nv50_display_create()
2896 dev->mode_config.cursor_height = 64; in nv50_display_create()
2899 /* create encoder/connector objects based on VBIOS DCB table */ in nv50_display_create()
2900 for_each_set_bit(i, &disp->disp->outp_mask, sizeof(disp->disp->outp_mask) * 8) { in nv50_display_create()
2907 ret = nvif_outp_ctor(disp->disp, "kmsOutp", i, &outp->outp); in nv50_display_create()
2913 connector = nouveau_connector_create(dev, outp->outp.info.conn); in nv50_display_create()
2914 if (IS_ERR(connector)) { in nv50_display_create()
2915 nvif_outp_dtor(&outp->outp); in nv50_display_create()
2920 outp->base.base.possible_crtcs = outp->outp.info.heads; in nv50_display_create()
2921 outp->base.base.possible_clones = 0; in nv50_display_create()
2922 outp->conn = nouveau_connector(connector); in nv50_display_create()
2924 outp->dcb = kzalloc(sizeof(*outp->dcb), GFP_KERNEL); in nv50_display_create()
2925 if (!outp->dcb) in nv50_display_create()
2928 switch (outp->outp.info.proto) { in nv50_display_create()
2930 outp->dcb->type = DCB_OUTPUT_ANALOG; in nv50_display_create()
2931 outp->dcb->crtconf.maxfreq = outp->outp.info.rgb_crt.freq_max; in nv50_display_create()
2934 outp->dcb->type = DCB_OUTPUT_TMDS; in nv50_display_create()
2935 outp->dcb->duallink_possible = outp->outp.info.tmds.dual; in nv50_display_create()
2938 outp->dcb->type = DCB_OUTPUT_LVDS; in nv50_display_create()
2939 outp->dcb->lvdsconf.use_acpi_for_edid = outp->outp.info.lvds.acpi_edid; in nv50_display_create()
2942 outp->dcb->type = DCB_OUTPUT_DP; in nv50_display_create()
2943 outp->dcb->dpconf.link_nr = outp->outp.info.dp.link_nr; in nv50_display_create()
2944 outp->dcb->dpconf.link_bw = outp->outp.info.dp.link_bw; in nv50_display_create()
2945 if (outp->outp.info.dp.mst) in nv50_display_create()
2953 outp->dcb->heads = outp->outp.info.heads; in nv50_display_create()
2954 outp->dcb->connector = outp->outp.info.conn; in nv50_display_create()
2955 outp->dcb->i2c_index = outp->outp.info.ddc; in nv50_display_create()
2957 switch (outp->outp.info.type) { in nv50_display_create()
2968 i, outp->outp.info.type, outp->outp.info.proto, ret); in nv50_display_create()
2973 list_for_each_entry_safe(connector, tmp, &dev->mode_config.connector_list, head) { in nv50_display_create()
2974 if (connector->possible_encoders) in nv50_display_create()
2978 connector->name); in nv50_display_create()
2979 connector->funcs->destroy(connector); in nv50_display_create()
2983 for_each_set_bit(i, &disp->disp->head_mask, sizeof(disp->disp->head_mask) * 8) { in nv50_display_create()
2993 head->msto = nv50_msto_new(dev, head, i); in nv50_display_create()
2994 if (IS_ERR(head->msto)) { in nv50_display_create()
2995 ret = PTR_ERR(head->msto); in nv50_display_create()
2996 head->msto = NULL; in nv50_display_create()
3010 head->msto->encoder.possible_crtcs = disp->disp->head_mask; in nv50_display_create()
3014 /* Disable vblank irqs aggressively for power-saving, safe on nv50+ */ in nv50_display_create()
3015 dev->vblank_disable_immediate = true; in nv50_display_create()
3030 * Log2(block height) ----------------------------+ *
3031 * Page Kind ----------------------------------+ | *
3032 * Gob Height/Page Kind Generation ------+ | | *
3033 * Sector layout -------+ | | | *
3034 * Compression ------+ | | | | */
3059 * Log2(block height) ----------------------------+ *
3060 * Page Kind ----------------------------------+ | *
3061 * Gob Height/Page Kind Generation ------+ | | *
3062 * Sector layout -------+ | | | *
3063 * Compression ------+ | | | | */