Lines Matching +full:low +full:-
1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
11 <value name="TILE_4X4" value="1"/> <!-- "normal" case for textures -->
12 <value name="TILE_32X32" value="2"/> <!-- only used in GMEM -->
13 <value name="TILE_4X2" value="3"/> <!-- only used for CrCb -->
60 <!-- seems to be no NORM variants for 32bit.. -->
106 <!--
111 -->
137 <value name="TFMT_A8_UNORM" value="0x2c"/> <!-- GL_ALPHA -->
139 <value name="TFMT_L8_A8_UNORM" value="0x2f"/> <!-- GL_LUMINANCE_ALPHA -->
141 <!--
143 to float16, float32.. but they seem to use non-standard swizzle too..
149 -->
151 <value name="TFMT_8_UNORM" value="0x30"/> <!-- GL_LUMINANCE -->
173 <!-- TFMT_FLOAT_16_16_16 -->
194 <!-- TFMT_32_32_32_FLOAT -->
242 <value name="RB_R16G16B16A16_FLOAT" value="0x1b"/> <!-- GL_HALF_FLOAT_OES -->
263 <value name="RB_R32G32B32A32_FLOAT" value="0x33"/> <!-- GL_FLOAT -->
559 <!-- RBBM registers -->
594 <!-- used in fw CP_WAIT_FOR_IDLE, similar to NQWAIT_UNTIL on a2xx: -->
631 <!--
635 -->
744 <!-- CP registers -->
752 <!-- see a3xx_snapshot_cp_meq().. looks like the way to dump queue between pfp and pm4 -->
771 <!-- these I guess or either SP or HLSQ since related to shader core setup: -->
780 <!-- GRAS registers -->
794 <!-- set when gl_FragCoord.z is enabled in frag shader: -->
797 <!-- set when frag shader writes z (so early z test disabled: -->
799 <bitfield name="NUM_USER_CLIP_PLANES" low="26" high="28" type="uint"/>
802 <bitfield name="HORZ" low="0" high="9" type="uint"/>
803 <bitfield name="VERT" low="10" high="19" type="uint"/>
812 <bitfield name="MIN" low="0" high="15" type="ufixed" radix="4"/>
813 <bitfield name="MAX" low="16" high="31" type="ufixed" radix="4"/>
817 <bitfield name="VAL" low="0" high="23" type="fixed" radix="20"/>
818 <doc>range of -8.0 to 8.0</doc>
821 <doc>range of -512.0 to 512.0</doc>
827 <bitfield name="LINEHALFWIDTH" low="3" high="10" radix="2" type="fixed"/>
831 <!-- complete wild-ass-guess for sizes of these bitfields.. -->
832 <bitfield name="RENDER_MODE" low="4" high="7" type="a3xx_render_mode"/>
833 <bitfield name="MSAA_SAMPLES" low="8" high="11" type="a3xx_msaa_samples"/>
834 <bitfield name="RASTER_MODE" low="12" high="15"/>
842 <!-- RB registers -->
844 <!-- guess on the # of bits here.. -->
847 RENDER_MODE is RB_RESOLVE_PASS for gmem->mem, otherwise RB_RENDER_PASS
849 <bitfield name="RENDER_MODE" low="8" high="10" type="a3xx_render_mode"/>
850 <bitfield name="MRT" low="12" high="13" type="uint">
851 <doc>render targets - 1</doc>
860 <!-- set when gl_FrontFacing is accessed in frag shader: -->
862 <bitfield name="BIN_WIDTH" low="4" high="11" shr="5" type="uint"/>
864 <!--
867 -->
869 <bitfield name="COORD_MASK" low="14" high="17" type="hex"/>
873 <bitfield name="ALPHA_TEST_FUNC" low="24" high="26" type="adreno_compare_func"/>
879 <bitfield name="SAMPLES" low="12" high="15" type="a3xx_msaa_samples"/>
880 <bitfield name="SAMPLE_MASK" low="16" high="31" type="hex"/>
883 <bitfield name="UINT" low="8" high="15" type="hex"/>
884 <bitfield name="FLOAT" low="16" high="31" type="float"/>
889 <!-- both these bits seem to get set when enabling GL_BLEND.. -->
892 <bitfield name="ROP_CODE" low="8" high="11" type="a3xx_rop_code"/>
893 <bitfield name="DITHER_MODE" low="12" high="13" type="adreno_rb_dither_mode"/>
894 <bitfield name="COMPONENT_ENABLE" low="24" high="27" type="hex"/>
897 <bitfield name="COLOR_FORMAT" low="0" high="5" type="a3xx_color_fmt"/>
898 <bitfield name="COLOR_TILE_MODE" low="6" high="7" type="a3xx_tile_mode"/>
899 <bitfield name="COLOR_SWAP" low="10" high="11" type="a3xx_color_swap"/>
905 <bitfield name="COLOR_BUF_PITCH" low="17" high="31" shr="5" type="uint"/>
909 <bitfield name="COLOR_BUF_BASE" low="4" high="31" shr="5" type="hex"/>
912 <bitfield name="RGB_SRC_FACTOR" low="0" high="4" type="adreno_rb_blend_factor"/>
913 <bitfield name="RGB_BLEND_OPCODE" low="5" high="7" type="a3xx_rb_blend_opcode"/>
914 <bitfield name="RGB_DEST_FACTOR" low="8" high="12" type="adreno_rb_blend_factor"/>
915 <bitfield name="ALPHA_SRC_FACTOR" low="16" high="20" type="adreno_rb_blend_factor"/>
916 <bitfield name="ALPHA_BLEND_OPCODE" low="21" high="23" type="a3xx_rb_blend_opcode"/>
917 <bitfield name="ALPHA_DEST_FACTOR" low="24" high="28" type="adreno_rb_blend_factor"/>
923 <bitfield name="UINT" low="0" high="7" type="hex"/>
924 <bitfield name="FLOAT" low="16" high="31" type="float"/>
927 <bitfield name="UINT" low="0" high="7" type="hex"/>
928 <bitfield name="FLOAT" low="16" high="31" type="float"/>
931 <bitfield name="UINT" low="0" high="7" type="hex"/>
932 <bitfield name="FLOAT" low="16" high="31" type="float"/>
935 <bitfield name="UINT" low="0" high="7" type="hex"/>
936 <bitfield name="FLOAT" low="16" high="31" type="float"/>
944 <!-- not sure # of bits -->
945 <bitfield name="MSAA_RESOLVE" low="0" high="1" type="a3xx_msaa_samples"/>
947 <bitfield name="MODE" low="4" high="6" type="adreno_rb_copy_control_mode"/>
949 <bitfield name="FASTCLEAR" low="8" high="11" type="hex"/>
950 <bitfield name="DEPTH32_RESOLVE" pos="12" type="boolean"/> <!-- enabled on a Z32F copy -->
951 <bitfield name="GMEM_BASE" low="14" high="31" shr="14" type="hex"/>
954 <bitfield name="BASE" low="4" high="31" shr="5" type="hex"/>
958 <!-- not actually sure about max pitch... -->
959 <bitfield name="PITCH" low="0" high="31" shr="5" type="uint"/>
962 <bitfield name="TILE" low="0" high="1" type="a3xx_tile_mode"/>
963 <bitfield name="FORMAT" low="2" high="7" type="a3xx_color_fmt"/>
964 <bitfield name="SWAP" low="8" high="9" type="a3xx_color_swap"/>
965 <bitfield name="DITHER_MODE" low="10" high="11" type="adreno_rb_dither_mode"/>
966 <bitfield name="COMPONENT_ENABLE" low="14" high="17" type="hex"/>
967 <bitfield name="ENDIAN" low="18" high="20" type="adreno_rb_surface_endian"/>
970 <!--
973 -->
978 <bitfield name="ZFUNC" low="4" high="6" type="adreno_compare_func"/>
987 <bitfield name="DEPTH_FORMAT" low="0" high="1" type="adreno_rb_depth_format"/>
994 <bitfield name="DEPTH_BASE" low="11" high="31" shr="12" type="hex"/>
1005 <!--
1010 -->
1012 <bitfield name="FUNC" low="8" high="10" type="adreno_compare_func"/>
1013 <bitfield name="FAIL" low="11" high="13" type="adreno_stencil_op"/>
1014 <bitfield name="ZPASS" low="14" high="16" type="adreno_stencil_op"/>
1015 <bitfield name="ZFAIL" low="17" high="19" type="adreno_stencil_op"/>
1016 <bitfield name="FUNC_BF" low="20" high="22" type="adreno_compare_func"/>
1017 <bitfield name="FAIL_BF" low="23" high="25" type="adreno_stencil_op"/>
1018 <bitfield name="ZPASS_BF" low="26" high="28" type="adreno_stencil_op"/>
1019 <bitfield name="ZFAIL_BF" low="29" high="31" type="adreno_stencil_op"/>
1026 <bitfield name="STENCIL_BASE" low="11" high="31" shr="12" type="hex"/>
1033 <!-- VSC == visibility stream c?? -->
1040 <bitfield name="X" low="0" high="15" type="uint"/>
1041 <bitfield name="Y" low="16" high="31" type="uint"/>
1051 <!-- PC registers -->
1064 <bitfield name="SIZE" low="16" high="21" type="uint"/>
1066 N is some sort of slot # between 0..(SIZE-1). In case
1069 <bitfield name="N" low="22" high="26" type="uint"/>
1074 STRIDE_IN_VPC: ALIGN(next_outloc - 8, 4) / 4
1078 <bitfield name="STRIDE_IN_VPC" low="0" high="4" type="uint"/>
1079 <bitfield name="POLYMODE_FRONT_PTYPE" low="5" high="7" type="adreno_pa_su_sc_draw"/>
1080 <bitfield name="POLYMODE_BACK_PTYPE" low="8" high="10" type="adreno_pa_su_sc_draw"/>
1084 <!-- PSIZE bit set if gl_PointSize written: -->
1089 <!-- HLSQ registers -->
1091 <bitfield name="CONSTLENGTH" low="0" high="9" type="uint"/>
1092 <bitfield name="CONSTSTARTOFFSET" low="12" high="20" type="uint"/>
1093 <bitfield name="INSTRLENGTH" low="24" high="31" type="uint"/>
1096 <!-- are these a3xx_regid?? -->
1097 <bitfield name="STARTENTRY" low="0" high="8"/>
1098 <bitfield name="ENDENTRY" low="16" high="24"/>
1102 <bitfield name="FSTHREADSIZE" low="4" high="5" type="a3xx_threadsize"/>
1107 <bitfield name="CYCLETIMEOUTLIMITVPC" low="12" high="23" type="uint"/>
1117 <bitfield name="VSTHREADSIZE" low="6" high="7" type="a3xx_threadsize"/>
1119 <bitfield name="FRAGCOORDXYREGID" low="16" high="23" type="a3xx_regid"/>
1120 <bitfield name="FRAGCOORDZWREGID" low="24" high="31" type="a3xx_regid"/>
1123 <bitfield name="FACENESSREGID" low="2" high="9" type="a3xx_regid"/>
1124 <bitfield name="COVVALUEREGID" low="18" high="25" type="a3xx_regid"/>
1125 <bitfield name="PRIMALLOCTHRESHOLD" low="26" high="31" type="uint"/>
1128 <bitfield name="IJPERSPCENTERREGID" low="0" high="7" type="a3xx_regid"/>
1129 <bitfield name="IJNONPERSPCENTERREGID" low="8" high="15" type="a3xx_regid"/>
1130 <bitfield name="IJPERSPCENTROIDREGID" low="16" high="23" type="a3xx_regid"/>
1131 <bitfield name="IJNONPERSPCENTROIDREGID" low="24" high="31" type="a3xx_regid"/>
1138 <bitfield name="WORKDIM" low="0" high="1" type="uint"/>
1139 <bitfield name="LOCALSIZE0" low="2" high="11" type="uint"/>
1140 <bitfield name="LOCALSIZE1" low="12" high="21" type="uint"/>
1141 <bitfield name="LOCALSIZE2" low="22" high="31" type="uint"/>
1159 <!-- VFD registers -->
1163 slots (ie. vec4+vec3 -> 7)
1165 <bitfield name="TOTALATTRTOVS" low="0" high="17" type="uint"/>
1166 <bitfield name="PACKETSIZE" low="18" high="21" type="uint"/>
1168 <bitfield name="STRMDECINSTRCNT" low="22" high="26" type="uint"/>
1170 <bitfield name="STRMFETCHINSTRCNT" low="27" high="31" type="uint"/>
1174 <bitfield name="MAXSTORAGE" low="0" high="3" type="uint"/>
1175 <bitfield name="MAXTHRESHOLD" low="4" high="7" type="uint"/>
1176 <bitfield name="MINTHRESHOLD" low="8" high="11" type="uint"/>
1177 <bitfield name="REGID4VTX" low="16" high="23" type="a3xx_regid"/>
1178 <bitfield name="REGID4INST" low="24" high="31" type="a3xx_regid"/>
1186 <bitfield name="FETCHSIZE" low="0" high="6" type="uint"/>
1187 <bitfield name="BUFSTRIDE" low="7" high="15" type="uint"/>
1190 <bitfield name="INDEXCODE" low="18" high="23" type="uint"/>
1191 <bitfield name="STEPRATE" low="24" high="31" type="uint"/>
1197 <bitfield name="WRITEMASK" low="0" high="3" type="hex"/>
1198 <!-- not sure if this is a bit flag and another flag above it, or?? -->
1200 <bitfield name="FORMAT" low="6" high="11" type="a3xx_vtx_fmt"/>
1201 <bitfield name="REGID" low="12" high="19" type="a3xx_regid"/>
1204 <bitfield name="SWAP" low="22" high="23" type="a3xx_color_swap"/>
1205 <bitfield name="SHIFTCNT" low="24" high="28" type="uint"/>
1211 <bitfield name="REGID_THRESHOLD" low="0" high="3" type="uint"/>
1212 <!-- <bitfield name="RESERVED6" low="4" high="7" type="uint"/> -->
1213 <bitfield name="REGID_VTXCNT" low="8" high="15" type="a3xx_regid"/>
1216 <!-- VPC registers -->
1218 <bitfield name="TOTALATTR" low="0" high="8" type="uint"/>
1219 <!-- PSIZE bit set if gl_PointSize written: -->
1221 <bitfield name="THRDASSIGN" low="12" high="27" type="uint"/>
1222 <bitfield name="LMSIZE" low="28" high="31" type="uint"/>
1225 <!-- these are always seem to be set to same as TOTALATTR -->
1226 <bitfield name="NUMFPNONPOSVAR" low="8" high="15" type="uint"/>
1227 <bitfield name="NUMNONPOSVSVAR" low="16" high="23" type="uint"/>
1229 <!--
1234 -->
1237 <bitfield name="C0" low="0" high="1" type="a3xx_intp_mode"/>
1238 <bitfield name="C1" low="2" high="3" type="a3xx_intp_mode"/>
1239 <bitfield name="C2" low="4" high="5" type="a3xx_intp_mode"/>
1240 <bitfield name="C3" low="6" high="7" type="a3xx_intp_mode"/>
1241 <bitfield name="C4" low="8" high="9" type="a3xx_intp_mode"/>
1242 <bitfield name="C5" low="10" high="11" type="a3xx_intp_mode"/>
1243 <bitfield name="C6" low="12" high="13" type="a3xx_intp_mode"/>
1244 <bitfield name="C7" low="14" high="15" type="a3xx_intp_mode"/>
1245 <bitfield name="C8" low="16" high="17" type="a3xx_intp_mode"/>
1246 <bitfield name="C9" low="18" high="19" type="a3xx_intp_mode"/>
1247 <bitfield name="CA" low="20" high="21" type="a3xx_intp_mode"/>
1248 <bitfield name="CB" low="22" high="23" type="a3xx_intp_mode"/>
1249 <bitfield name="CC" low="24" high="25" type="a3xx_intp_mode"/>
1250 <bitfield name="CD" low="26" high="27" type="a3xx_intp_mode"/>
1251 <bitfield name="CE" low="28" high="29" type="a3xx_intp_mode"/>
1252 <bitfield name="CF" low="30" high="31" type="a3xx_intp_mode"/>
1257 <bitfield name="C0" low="0" high="1" type="a3xx_repl_mode"/>
1258 <bitfield name="C1" low="2" high="3" type="a3xx_repl_mode"/>
1259 <bitfield name="C2" low="4" high="5" type="a3xx_repl_mode"/>
1260 <bitfield name="C3" low="6" high="7" type="a3xx_repl_mode"/>
1261 <bitfield name="C4" low="8" high="9" type="a3xx_repl_mode"/>
1262 <bitfield name="C5" low="10" high="11" type="a3xx_repl_mode"/>
1263 <bitfield name="C6" low="12" high="13" type="a3xx_repl_mode"/>
1264 <bitfield name="C7" low="14" high="15" type="a3xx_repl_mode"/>
1265 <bitfield name="C8" low="16" high="17" type="a3xx_repl_mode"/>
1266 <bitfield name="C9" low="18" high="19" type="a3xx_repl_mode"/>
1267 <bitfield name="CA" low="20" high="21" type="a3xx_repl_mode"/>
1268 <bitfield name="CB" low="22" high="23" type="a3xx_repl_mode"/>
1269 <bitfield name="CC" low="24" high="25" type="a3xx_repl_mode"/>
1270 <bitfield name="CD" low="26" high="27" type="a3xx_repl_mode"/>
1271 <bitfield name="CE" low="28" high="29" type="a3xx_repl_mode"/>
1272 <bitfield name="CF" low="30" high="31" type="a3xx_repl_mode"/>
1278 <!-- SP registers -->
1280 <bitfield name="SHADERLENGTH" low="0" high="31" type="uint"/>
1284 <bitfield name="FIRSTEXECINSTROFFSET" low="0" high="15" type="uint"/>
1291 <bitfield name="CONSTOBJECTOFFSET" low="16" high="24" type="uint"/>
1292 <bitfield name="SHADEROBJOFFSET" low="25" high="31" type="uint"/>
1296 <!-- this bit is set during resolve pass: -->
1300 <bitfield name="SLEEPMODE" low="20" high="21" type="uint"/>
1301 <!-- L0MODE==1 when oxiliForceSpL0ModeBuffer=1 -->
1302 <bitfield name="L0MODE" low="22" high="23" type="uint"/>
1307 <!-- maybe CACHEINVALID is two bits?? -->
1319 <bitfield name="HALFREGFOOTPRINT" low="4" high="9" type="uint"/>
1320 <bitfield name="FULLREGFOOTPRINT" low="10" high="15" type="uint"/>
1329 <bitfield name="LENGTH" low="24" high="31" type="uint"/>
1332 <bitfield name="CONSTLENGTH" low="0" high="9" type="uint"/>
1333 <!--
1336 -->
1337 <bitfield name="CONSTFOOTPRINT" low="10" high="19" type="uint"/>
1338 <bitfield name="INITIALOUTSTANDING" low="24" high="30" type="uint"/>
1341 <bitfield name="POSREGID" low="0" high="7" type="a3xx_regid"/>
1342 <bitfield name="PSIZEREGID" low="8" high="15" type="a3xx_regid"/>
1344 <bitfield name="TOTALVSOUTVAR" low="20" high="24" type="uint"/>
1348 <bitfield name="A_REGID" low="0" high="7" type="a3xx_regid"/>
1350 <bitfield name="A_COMPMASK" low="9" high="12" type="hex"/>
1351 <bitfield name="B_REGID" low="16" high="23" type="a3xx_regid"/>
1353 <bitfield name="B_COMPMASK" low="25" high="28" type="hex"/>
1363 <bitfield name="OUTLOC0" low="0" high="6" type="uint"/>
1364 <bitfield name="OUTLOC1" low="8" high="14" type="uint"/>
1365 <bitfield name="OUTLOC2" low="16" high="22" type="uint"/>
1366 <bitfield name="OUTLOC3" low="24" high="30" type="uint"/>
1373 guess that is probably just re-using the same gpu buffer)
1377 <bitfield name="MEMSIZEPERITEM" low="0" high="7" shr="7">
1380 <bitfield name="HWSTACKOFFSET" low="8" high="23" type="uint"/>
1381 <bitfield name="HWSTACKSIZEPERTHREAD" low="24" high="31" type="uint"/>
1384 <bitfield name="BURSTLEN" low="0" high="4"/>
1385 <bitfield name="SHADERSTARTADDRESS" shr="5" low="5" high="31"/>
1392 <!-- maybe CACHEINVALID is two bits?? -->
1404 <bitfield name="HALFREGFOOTPRINT" low="4" high="9" type="uint"/>
1405 <bitfield name="FULLREGFOOTPRINT" low="10" high="15" type="uint"/>
1419 <bitfield name="LENGTH" low="24" high="31" type="uint"/>
1422 <bitfield name="CONSTLENGTH" low="0" high="9" type="uint"/>
1423 <bitfield name="CONSTFOOTPRINT" low="10" high="19" type="uint"/>
1424 <bitfield name="INITIALOUTSTANDING" low="20" high="23" type="uint"/>
1425 <bitfield name="HALFPRECVAROFFSET" low="24" high="30" type="uint"/>
1431 <bitfield name="MEMSIZEPERITEM" low="0" high="7" type="uint"/>
1432 <bitfield name="HWSTACKOFFSET" low="8" high="23" type="uint"/>
1433 <bitfield name="HWSTACKSIZEPERTHREAD" low="24" high="31" type="uint"/>
1436 <bitfield name="BURSTLEN" low="0" high="4"/>
1437 <bitfield name="SHADERSTARTADDRESS" shr="5" low="5" high="31"/>
1447 <bitfield name="MRT" low="0" high="1" type="uint">
1448 <doc>render targets - 1</doc>
1451 <bitfield name="DEPTH_REGID" low="8" high="15" type="a3xx_regid"/>
1455 <bitfield name="REGID" low="0" high="7" type="a3xx_regid"/>
1463 <bitfield name="MRTFORMAT" low="0" high="5" type="a3xx_color_fmt"/>
1469 <!-- TPL1 registers -->
1470 <!-- assume VS/FS_TEX_OFFSET is same -->
1472 <bitfield name="SAMPLEROFFSET" low="0" high="7" type="uint"/>
1473 <bitfield name="MEMOBJOFFSET" low="8" high="15" type="uint"/>
1474 <!-- not sure the size of this: -->
1475 <bitfield name="BASETABLEPTR" low="16" high="31" type="uint"/>
1482 <!-- VBIF registers -->
1527 <bitfield name="WIDTH" low="0" high="4" shr="5" type="uint"/>
1528 <bitfield name="HEIGHT" low="5" high="9" shr="5" type="uint"/>
1542 <bitfield name="X" low="0" high="9" type="uint"/>
1543 <bitfield name="Y" low="10" high="19" type="uint"/>
1544 <bitfield name="W" low="20" high="23" type="uint"/>
1545 <bitfield name="H" low="24" high="27" type="uint"/>
1580 <bitfield name="WIDTH" low="0" high="13" type="uint"/>
1581 <bitfield name="HEIGHT" low="14" high="27" type="uint"/>
1606 <!-- might be shifted right by 5, assuming 32byte cache line size.. -->
1607 <bitfield name="ADDR" low="0" high="27" type="hex"/>
1610 <!-- might be shifted right by 5, assuming 32byte cache line size.. -->
1611 <bitfield name="ADDR" low="0" high="27" type="hex"/>
1612 <!-- I'd assume 2 bits, for FLUSH/INVALIDATE/CLEAN? -->
1613 <bitfield name="OPCODE" low="28" high="29" type="a3xx_cache_opcode"/>
1638 <!-- this seems to be the register that CP_RUN_OPENCL writes: -->
1641 <!-- seems to be same as a2xx according to fwdump.. -->
1671 <bitfield name="XY_MAG" low="2" high="3" type="a3xx_tex_filter"/>
1672 <bitfield name="XY_MIN" low="4" high="5" type="a3xx_tex_filter"/>
1673 <bitfield name="WRAP_S" low="6" high="8" type="a3xx_tex_clamp"/>
1674 <bitfield name="WRAP_T" low="9" high="11" type="a3xx_tex_clamp"/>
1675 <bitfield name="WRAP_R" low="12" high="14" type="a3xx_tex_clamp"/>
1676 <bitfield name="ANISO" low="15" high="17" type="a3xx_tex_aniso"/>
1677 <bitfield name="COMPARE_FUNC" low="20" high="22" type="adreno_compare_func"/>
1679 <!-- UNNORM_COORDS == CLK_NORMALIZED_COORDS_FALSE -->
1683 <bitfield name="LOD_BIAS" low="0" high="10" type="fixed" radix="6"/>
1684 <bitfield name="MAX_LOD" low="12" high="21" type="ufixed" radix="6"/>
1685 <bitfield name="MIN_LOD" low="22" high="31" type="ufixed" radix="6"/>
1692 <!-- same as a2xx? -->
1713 <bitfield name="TILE_MODE" low="0" high="1" type="a3xx_tile_mode"/>
1715 <bitfield name="SWIZ_X" low="4" high="6" type="a3xx_tex_swiz"/>
1716 <bitfield name="SWIZ_Y" low="7" high="9" type="a3xx_tex_swiz"/>
1717 <bitfield name="SWIZ_Z" low="10" high="12" type="a3xx_tex_swiz"/>
1718 <bitfield name="SWIZ_W" low="13" high="15" type="a3xx_tex_swiz"/>
1719 <bitfield name="MIPLVLS" low="16" high="19" type="uint"/>
1720 <bitfield name="MSAATEX" low="20" high="21" type="a3xx_tex_msaa"/>
1721 <bitfield name="FMT" low="22" high="28" type="a3xx_tex_fmt"/>
1723 <bitfield name="TYPE" low="30" high="31" type="a3xx_tex_type"/>
1726 <bitfield name="HEIGHT" low="0" high="13" type="uint"/>
1727 <bitfield name="WIDTH" low="14" high="27" type="uint"/>
1728 <!-- minimum pitch (for mipmap levels): log2(pitchalign / 16) -->
1729 <bitfield name="PITCHALIGN" low="28" high="31" type="uint"/>
1733 <bitfield name="INDX" low="0" high="8" type="uint"/>
1735 <bitfield name="PITCH" low="12" high="29" type="uint"/>
1737 <bitfield name="SWAP" low="30" high="31" type="a3xx_color_swap"/>
1740 <!--
1744 -->
1745 <bitfield name="LAYERSZ1" low="0" high="16" shr="12" type="uint"/>
1746 <bitfield name="DEPTH" low="17" high="27" type="uint"/>
1747 <bitfield name="LAYERSZ2" low="28" high="31" shr="12" type="uint"/>