Lines Matching full:panel
30 static inline u32 msm_dp_read_link(struct msm_dp_panel_private *panel, u32 offset) in msm_dp_read_link() argument
32 return readl_relaxed(panel->link_base + offset); in msm_dp_read_link()
35 static inline void msm_dp_write_link(struct msm_dp_panel_private *panel, in msm_dp_write_link() argument
42 writel(data, panel->link_base + offset); in msm_dp_write_link()
45 static inline void msm_dp_write_p0(struct msm_dp_panel_private *panel, in msm_dp_write_p0() argument
52 writel(data, panel->p0_base + offset); in msm_dp_write_p0()
55 static inline u32 msm_dp_read_p0(struct msm_dp_panel_private *panel, in msm_dp_read_p0() argument
62 return readl_relaxed(panel->p0_base + offset); in msm_dp_read_p0()
65 static void msm_dp_panel_read_psr_cap(struct msm_dp_panel_private *panel) in msm_dp_panel_read_psr_cap() argument
70 msm_dp_panel = &panel->msm_dp_panel; in msm_dp_panel_read_psr_cap()
74 rlen = drm_dp_dpcd_read(panel->aux, DP_PSR_SUPPORT, in msm_dp_panel_read_psr_cap()
77 drm_dbg_dp(panel->drm_dev, in msm_dp_panel_read_psr_cap()
89 struct msm_dp_panel_private *panel; in msm_dp_panel_read_dpcd() local
94 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); in msm_dp_panel_read_dpcd()
96 rc = drm_dp_read_dpcd_caps(panel->aux, dpcd); in msm_dp_panel_read_dpcd()
100 msm_dp_panel->vsc_sdp_supported = drm_dp_vsc_sdp_supported(panel->aux, dpcd); in msm_dp_panel_read_dpcd()
106 link = panel->link; in msm_dp_panel_read_dpcd()
107 drm_dbg_dp(panel->drm_dev, "max_lanes=%d max_link_rate=%d\n", in msm_dp_panel_read_dpcd()
122 max_lttpr_lanes = drm_dp_lttpr_max_lane_count(panel->link->lttpr_common_caps); in msm_dp_panel_read_dpcd()
127 max_lttpr_rate = drm_dp_lttpr_max_link_rate(panel->link->lttpr_common_caps); in msm_dp_panel_read_dpcd()
131 drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor); in msm_dp_panel_read_dpcd()
132 drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate); in msm_dp_panel_read_dpcd()
133 drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes); in msm_dp_panel_read_dpcd()
138 msm_dp_panel_read_psr_cap(panel); in msm_dp_panel_read_dpcd()
169 struct msm_dp_panel_private *panel; in msm_dp_panel_read_sink_caps() local
176 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); in msm_dp_panel_read_sink_caps()
194 count = drm_dp_read_sink_count(panel->aux); in msm_dp_panel_read_sink_caps()
196 panel->link->sink_count = 0; in msm_dp_panel_read_sink_caps()
201 rc = drm_dp_read_downstream_info(panel->aux, msm_dp_panel->dpcd, in msm_dp_panel_read_sink_caps()
208 msm_dp_panel->drm_edid = drm_edid_read_ddc(connector, &panel->aux->ddc); in msm_dp_panel_read_sink_caps()
213 DRM_ERROR("panel edid read failed\n"); in msm_dp_panel_read_sink_caps()
215 if (!msm_dp_aux_is_link_connected(panel->aux)) { in msm_dp_panel_read_sink_caps()
228 struct msm_dp_panel_private *panel; in msm_dp_panel_get_mode_bpp() local
236 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); in msm_dp_panel_get_mode_bpp()
240 panel->link->test_video.test_bit_depth); in msm_dp_panel_get_mode_bpp()
271 struct msm_dp_panel_private *panel; in msm_dp_panel_handle_sink_request() local
278 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); in msm_dp_panel_handle_sink_request()
280 if (panel->link->sink_request & DP_TEST_LINK_EDID_READ) { in msm_dp_panel_handle_sink_request()
290 msm_dp_link_send_edid_checksum(panel->link, checksum); in msm_dp_panel_handle_sink_request()
291 msm_dp_link_send_test_response(panel->link); in msm_dp_panel_handle_sink_request()
298 struct msm_dp_panel_private *panel = in msm_dp_panel_tpg_enable() local
331 msm_dp_write_p0(panel, MMSS_DP_INTF_HSYNC_CTL, hsync_ctl); in msm_dp_panel_tpg_enable()
332 msm_dp_write_p0(panel, MMSS_DP_INTF_VSYNC_PERIOD_F0, vsync_period * in msm_dp_panel_tpg_enable()
334 msm_dp_write_p0(panel, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F0, v_sync_width * in msm_dp_panel_tpg_enable()
336 msm_dp_write_p0(panel, MMSS_DP_INTF_VSYNC_PERIOD_F1, 0); in msm_dp_panel_tpg_enable()
337 msm_dp_write_p0(panel, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F1, 0); in msm_dp_panel_tpg_enable()
338 msm_dp_write_p0(panel, MMSS_DP_INTF_DISPLAY_HCTL, display_hctl); in msm_dp_panel_tpg_enable()
339 msm_dp_write_p0(panel, MMSS_DP_INTF_ACTIVE_HCTL, 0); in msm_dp_panel_tpg_enable()
340 msm_dp_write_p0(panel, MMSS_INTF_DISPLAY_V_START_F0, display_v_start); in msm_dp_panel_tpg_enable()
341 msm_dp_write_p0(panel, MMSS_DP_INTF_DISPLAY_V_END_F0, display_v_end); in msm_dp_panel_tpg_enable()
342 msm_dp_write_p0(panel, MMSS_INTF_DISPLAY_V_START_F1, 0); in msm_dp_panel_tpg_enable()
343 msm_dp_write_p0(panel, MMSS_DP_INTF_DISPLAY_V_END_F1, 0); in msm_dp_panel_tpg_enable()
344 msm_dp_write_p0(panel, MMSS_DP_INTF_ACTIVE_V_START_F0, 0); in msm_dp_panel_tpg_enable()
345 msm_dp_write_p0(panel, MMSS_DP_INTF_ACTIVE_V_END_F0, 0); in msm_dp_panel_tpg_enable()
346 msm_dp_write_p0(panel, MMSS_DP_INTF_ACTIVE_V_START_F1, 0); in msm_dp_panel_tpg_enable()
347 msm_dp_write_p0(panel, MMSS_DP_INTF_ACTIVE_V_END_F1, 0); in msm_dp_panel_tpg_enable()
348 msm_dp_write_p0(panel, MMSS_DP_INTF_POLARITY_CTL, 0); in msm_dp_panel_tpg_enable()
350 msm_dp_write_p0(panel, MMSS_DP_TPG_MAIN_CONTROL, in msm_dp_panel_tpg_enable()
352 msm_dp_write_p0(panel, MMSS_DP_TPG_VIDEO_CONFIG, in msm_dp_panel_tpg_enable()
355 msm_dp_write_p0(panel, MMSS_DP_BIST_ENABLE, in msm_dp_panel_tpg_enable()
357 msm_dp_write_p0(panel, MMSS_DP_TIMING_ENGINE_EN, in msm_dp_panel_tpg_enable()
359 drm_dbg_dp(panel->drm_dev, "%s: enabled tpg\n", __func__); in msm_dp_panel_tpg_enable()
364 struct msm_dp_panel_private *panel = in msm_dp_panel_tpg_disable() local
367 msm_dp_write_p0(panel, MMSS_DP_TPG_MAIN_CONTROL, 0x0); in msm_dp_panel_tpg_disable()
368 msm_dp_write_p0(panel, MMSS_DP_BIST_ENABLE, 0x0); in msm_dp_panel_tpg_disable()
369 msm_dp_write_p0(panel, MMSS_DP_TIMING_ENGINE_EN, 0x0); in msm_dp_panel_tpg_disable()
374 struct msm_dp_panel_private *panel; in msm_dp_panel_tpg_config() local
381 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); in msm_dp_panel_tpg_config()
383 if (!panel->panel_on) { in msm_dp_panel_tpg_config()
384 drm_dbg_dp(panel->drm_dev, in msm_dp_panel_tpg_config()
385 "DP panel not enabled, handle TPG on next on\n"); in msm_dp_panel_tpg_config()
394 drm_dbg_dp(panel->drm_dev, "calling panel's tpg_enable\n"); in msm_dp_panel_tpg_config()
395 msm_dp_panel_tpg_enable(msm_dp_panel, &panel->msm_dp_panel.msm_dp_mode.drm_mode); in msm_dp_panel_tpg_config()
400 struct msm_dp_panel_private *panel = in msm_dp_panel_clear_dsc_dto() local
403 msm_dp_write_p0(panel, MMSS_DP_DSC_DTO, 0x0); in msm_dp_panel_clear_dsc_dto()
406 static void msm_dp_panel_send_vsc_sdp(struct msm_dp_panel_private *panel, struct dp_sdp *vsc_sdp) in msm_dp_panel_send_vsc_sdp() argument
414 msm_dp_write_link(panel, MMSS_DP_GENERIC0_0, header[0]); in msm_dp_panel_send_vsc_sdp()
415 msm_dp_write_link(panel, MMSS_DP_GENERIC0_1, header[1]); in msm_dp_panel_send_vsc_sdp()
420 msm_dp_write_link(panel, MMSS_DP_GENERIC0_2 + i, val); in msm_dp_panel_send_vsc_sdp()
424 static void msm_dp_panel_update_sdp(struct msm_dp_panel_private *panel) in msm_dp_panel_update_sdp() argument
426 u32 hw_revision = panel->msm_dp_panel.hw_revision; in msm_dp_panel_update_sdp()
430 msm_dp_write_link(panel, MMSS_DP_SDP_CFG3, UPDATE_SDP); in msm_dp_panel_update_sdp()
431 msm_dp_write_link(panel, MMSS_DP_SDP_CFG3, 0x0); in msm_dp_panel_update_sdp()
437 struct msm_dp_panel_private *panel = in msm_dp_panel_enable_vsc_sdp() local
441 cfg = msm_dp_read_link(panel, MMSS_DP_SDP_CFG); in msm_dp_panel_enable_vsc_sdp()
442 cfg2 = msm_dp_read_link(panel, MMSS_DP_SDP_CFG2); in msm_dp_panel_enable_vsc_sdp()
443 misc = msm_dp_read_link(panel, REG_DP_MISC1_MISC0); in msm_dp_panel_enable_vsc_sdp()
446 msm_dp_write_link(panel, MMSS_DP_SDP_CFG, cfg); in msm_dp_panel_enable_vsc_sdp()
449 msm_dp_write_link(panel, MMSS_DP_SDP_CFG2, cfg2); in msm_dp_panel_enable_vsc_sdp()
451 msm_dp_panel_send_vsc_sdp(panel, vsc_sdp); in msm_dp_panel_enable_vsc_sdp()
456 drm_dbg_dp(panel->drm_dev, "vsc sdp enable=1\n"); in msm_dp_panel_enable_vsc_sdp()
459 msm_dp_write_link(panel, REG_DP_MISC1_MISC0, misc); in msm_dp_panel_enable_vsc_sdp()
461 msm_dp_panel_update_sdp(panel); in msm_dp_panel_enable_vsc_sdp()
466 struct msm_dp_panel_private *panel = in msm_dp_panel_disable_vsc_sdp() local
470 cfg = msm_dp_read_link(panel, MMSS_DP_SDP_CFG); in msm_dp_panel_disable_vsc_sdp()
471 cfg2 = msm_dp_read_link(panel, MMSS_DP_SDP_CFG2); in msm_dp_panel_disable_vsc_sdp()
472 misc = msm_dp_read_link(panel, REG_DP_MISC1_MISC0); in msm_dp_panel_disable_vsc_sdp()
475 msm_dp_write_link(panel, MMSS_DP_SDP_CFG, cfg); in msm_dp_panel_disable_vsc_sdp()
478 msm_dp_write_link(panel, MMSS_DP_SDP_CFG2, cfg2); in msm_dp_panel_disable_vsc_sdp()
483 drm_dbg_dp(panel->drm_dev, "vsc sdp enable=0\n"); in msm_dp_panel_disable_vsc_sdp()
486 msm_dp_write_link(panel, REG_DP_MISC1_MISC0, misc); in msm_dp_panel_disable_vsc_sdp()
488 msm_dp_panel_update_sdp(panel); in msm_dp_panel_disable_vsc_sdp()
537 struct msm_dp_panel_private *panel; in msm_dp_panel_timing_cfg() local
545 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); in msm_dp_panel_timing_cfg()
546 drm_mode = &panel->msm_dp_panel.msm_dp_mode.drm_mode; in msm_dp_panel_timing_cfg()
548 drm_dbg_dp(panel->drm_dev, "width=%d hporch= %d %d %d\n", in msm_dp_panel_timing_cfg()
553 drm_dbg_dp(panel->drm_dev, "height=%d vporch= %d %d %d\n", in msm_dp_panel_timing_cfg()
576 data |= (panel->msm_dp_panel.msm_dp_mode.v_active_low << 31); in msm_dp_panel_timing_cfg()
578 data |= (panel->msm_dp_panel.msm_dp_mode.h_active_low << 15); in msm_dp_panel_timing_cfg()
588 msm_dp_write_link(panel, REG_DP_TOTAL_HOR_VER, total); in msm_dp_panel_timing_cfg()
589 msm_dp_write_link(panel, REG_DP_START_HOR_VER_FROM_SYNC, sync_start); in msm_dp_panel_timing_cfg()
590 msm_dp_write_link(panel, REG_DP_HSYNC_VSYNC_WIDTH_POLARITY, width_blanking); in msm_dp_panel_timing_cfg()
591 msm_dp_write_link(panel, REG_DP_ACTIVE_HOR_VER, msm_dp_active); in msm_dp_panel_timing_cfg()
593 reg = msm_dp_read_p0(panel, MMSS_DP_INTF_CONFIG); in msm_dp_panel_timing_cfg()
599 drm_dbg_dp(panel->drm_dev, "wide_bus_en=%d reg=%#x\n", wide_bus_en, reg); in msm_dp_panel_timing_cfg()
601 msm_dp_write_p0(panel, MMSS_DP_INTF_CONFIG, reg); in msm_dp_panel_timing_cfg()
606 panel->panel_on = true; in msm_dp_panel_timing_cfg()
614 struct msm_dp_panel_private *panel; in msm_dp_panel_init_panel_info() local
618 panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel); in msm_dp_panel_init_panel_info()
624 drm_dbg_dp(panel->drm_dev, "SET NEW RESOLUTION:\n"); in msm_dp_panel_init_panel_info()
625 drm_dbg_dp(panel->drm_dev, "%dx%d@%dfps\n", in msm_dp_panel_init_panel_info()
627 drm_dbg_dp(panel->drm_dev, in msm_dp_panel_init_panel_info()
632 drm_dbg_dp(panel->drm_dev, in msm_dp_panel_init_panel_info()
637 drm_dbg_dp(panel->drm_dev, "pixel clock (KHz)=(%d)\n", in msm_dp_panel_init_panel_info()
639 drm_dbg_dp(panel->drm_dev, "bpp = %d\n", msm_dp_panel->msm_dp_mode.bpp); in msm_dp_panel_init_panel_info()
644 drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n", in msm_dp_panel_init_panel_info()
655 struct msm_dp_panel_private *panel; in msm_dp_panel_get() local
663 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL); in msm_dp_panel_get()
664 if (!panel) in msm_dp_panel_get()
667 panel->dev = dev; in msm_dp_panel_get()
668 panel->aux = aux; in msm_dp_panel_get()
669 panel->link = link; in msm_dp_panel_get()
670 panel->link_base = link_base; in msm_dp_panel_get()
671 panel->p0_base = p0_base; in msm_dp_panel_get()
673 msm_dp_panel = &panel->msm_dp_panel; in msm_dp_panel_get()