94 	const u32 max_supported_bpp = 30, min_supported_bpp = 18;  in msm_dp_panel_get_supported_bpp()
95 	u32 bpp, data_rate_khz;  in msm_dp_panel_get_supported_bpp()  local
97 	bpp = min(mode_edid_bpp, max_supported_bpp);  in msm_dp_panel_get_supported_bpp()
103 		if (mode_pclk_khz * bpp <= data_rate_khz)  in msm_dp_panel_get_supported_bpp()
104 			return bpp;  in msm_dp_panel_get_supported_bpp()
105 		bpp -= 6;  in msm_dp_panel_get_supported_bpp()
106 	} while (bpp > min_supported_bpp);  in msm_dp_panel_get_supported_bpp()
179 	u32 bpp;  in msm_dp_panel_get_mode_bpp()  local
189 		bpp = msm_dp_link_bit_depth_to_bpp(  in msm_dp_panel_get_mode_bpp()
192 		bpp = msm_dp_panel_get_supported_bpp(msm_dp_panel, mode_edid_bpp,  in msm_dp_panel_get_mode_bpp()
195 	return bpp;  in msm_dp_panel_get_mode_bpp()
303 	vsc_sdp_data.bpc = msm_dp_mode->bpp / 3;  in msm_dp_panel_setup_vsc_sdp_yuv_420()
413 	drm_dbg_dp(panel->drm_dev, "bpp = %d\n", msm_dp_panel->msm_dp_mode.bpp);  in msm_dp_panel_init_panel_info()
415 …msm_dp_panel->msm_dp_mode.bpp = msm_dp_panel_get_mode_bpp(msm_dp_panel, msm_dp_panel->msm_dp_mode.…  in msm_dp_panel_init_panel_info()
418 	drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n",  in msm_dp_panel_init_panel_info()
419 				msm_dp_panel->msm_dp_mode.bpp);  in msm_dp_panel_init_panel_info()