148 	u32 bpp, data_rate_khz;  in msm_dp_panel_get_supported_bpp()  local
150 	bpp = min(mode_edid_bpp, max_supported_bpp);  in msm_dp_panel_get_supported_bpp()
156 		if (mode_pclk_khz * bpp <= data_rate_khz)  in msm_dp_panel_get_supported_bpp()
157 			return bpp;  in msm_dp_panel_get_supported_bpp()
158 		bpp -= 6;  in msm_dp_panel_get_supported_bpp()
159 	} while (bpp > min_supported_bpp);  in msm_dp_panel_get_supported_bpp()
229 	u32 bpp;  in msm_dp_panel_get_mode_bpp()  local
239 		bpp = msm_dp_link_bit_depth_to_bpp(  in msm_dp_panel_get_mode_bpp()
242 		bpp = msm_dp_panel_get_supported_bpp(msm_dp_panel, mode_edid_bpp,  in msm_dp_panel_get_mode_bpp()
245 	return bpp;  in msm_dp_panel_get_mode_bpp()
326 	hsync_ctl = (hsync_period << 16) |  in msm_dp_panel_tpg_enable()
328 	display_hctl = (hsync_end_x << 16) | hsync_start_x;  in msm_dp_panel_tpg_enable()
418 		val = ((vsc_sdp->db[i]) | (vsc_sdp->db[i + 1] << 8) | (vsc_sdp->db[i + 2] << 16) |  in msm_dp_panel_send_vsc_sdp()
517 	vsc_sdp_data.bpc = msm_dp_mode->bpp / 3;  in msm_dp_panel_setup_vsc_sdp_yuv_420()
563 	data <<= 16;  in msm_dp_panel_timing_cfg()
569 	data <<= 16;  in msm_dp_panel_timing_cfg()
575 	data <<= 16;  in msm_dp_panel_timing_cfg()
583 	data <<= 16;  in msm_dp_panel_timing_cfg()
639 	drm_dbg_dp(panel->drm_dev, "bpp = %d\n", msm_dp_panel->msm_dp_mode.bpp);  in msm_dp_panel_init_panel_info()
641 …msm_dp_panel->msm_dp_mode.bpp = msm_dp_panel_get_mode_bpp(msm_dp_panel, msm_dp_panel->msm_dp_mode.…  in msm_dp_panel_init_panel_info()
644 	drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n",  in msm_dp_panel_init_panel_info()
645 				msm_dp_panel->msm_dp_mode.bpp);  in msm_dp_panel_init_panel_info()