Lines Matching refs:drm_dev
114 struct drm_device *drm_dev; member
306 drm_dbg_dp(ctrl->drm_dev, "enable\n"); in msm_dp_ctrl_mainlink_enable()
329 drm_dbg_dp(ctrl->drm_dev, "disable\n"); in msm_dp_ctrl_mainlink_disable()
380 drm_dbg_dp(ctrl->drm_dev, "mainlink off\n"); in msm_dp_ctrl_push_idle()
419 drm_dbg_dp(ctrl->drm_dev, "DP_CONFIGURATION_CTRL=0x%x\n", config); in msm_dp_ctrl_config_ctrl()
459 drm_dbg_dp(ctrl->drm_dev, "misc settings = 0x%x\n", misc_val); in msm_dp_ctrl_configure_source_params()
982 drm_dbg_dp(ctrl->drm_dev, in _dp_ctrl_calc_tu()
1018 drm_dbg_dp(ctrl->drm_dev, in _dp_ctrl_calc_tu()
1213 drm_dbg_dp(ctrl->drm_dev, "TU: valid_boundary_link: %d\n", in _dp_ctrl_calc_tu()
1215 drm_dbg_dp(ctrl->drm_dev, "TU: delay_start_link: %d\n", in _dp_ctrl_calc_tu()
1217 drm_dbg_dp(ctrl->drm_dev, "TU: boundary_moderation_en: %d\n", in _dp_ctrl_calc_tu()
1219 drm_dbg_dp(ctrl->drm_dev, "TU: valid_lower_boundary_link: %d\n", in _dp_ctrl_calc_tu()
1221 drm_dbg_dp(ctrl->drm_dev, "TU: upper_boundary_count: %d\n", in _dp_ctrl_calc_tu()
1223 drm_dbg_dp(ctrl->drm_dev, "TU: lower_boundary_count: %d\n", in _dp_ctrl_calc_tu()
1225 drm_dbg_dp(ctrl->drm_dev, "TU: tu_size_minus1: %d\n", in _dp_ctrl_calc_tu()
1321 drm_dbg_dp(ctrl->drm_dev, in msm_dp_ctrl_update_phy_vx_px()
1331 drm_dbg_dp(ctrl->drm_dev, in msm_dp_ctrl_update_phy_vx_px()
1338 drm_dbg_dp(ctrl->drm_dev, in msm_dp_ctrl_update_phy_vx_px()
1351 drm_dbg_dp(ctrl->drm_dev, "sink: p|v=0x%x\n", in msm_dp_ctrl_update_phy_vx_px()
1373 drm_dbg_dp(ctrl->drm_dev, "sink: pattern=%x\n", pattern); in msm_dp_ctrl_train_pattern_set()
1396 drm_dbg_dp(ctrl->drm_dev, "hw: bit=%d train=%d\n", bit, state_bit); in msm_dp_ctrl_set_pattern_state_bit()
1495 drm_dbg_dp(ctrl->drm_dev, "new rate=0x%x\n", in msm_dp_ctrl_link_rate_down_shift()
1595 drm_dbg_dp(ctrl->drm_dev, "link training #1 on phy %d successful\n", dp_phy); in msm_dp_ctrl_link_train_1_2()
1602 drm_dbg_dp(ctrl->drm_dev, "link training #2 on phy %d successful\n", dp_phy); in msm_dp_ctrl_link_train_1_2()
1693 drm_dbg_dp(ctrl->drm_dev, "core clks already enabled\n"); in msm_dp_ctrl_core_clk_enable()
1703 drm_dbg_dp(ctrl->drm_dev, "enable core clocks \n"); in msm_dp_ctrl_core_clk_enable()
1704 drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", in msm_dp_ctrl_core_clk_enable()
1722 drm_dbg_dp(ctrl->drm_dev, "disable core clocks \n"); in msm_dp_ctrl_core_clk_disable()
1723 drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", in msm_dp_ctrl_core_clk_disable()
1737 drm_dbg_dp(ctrl->drm_dev, "links clks already enabled\n"); in msm_dp_ctrl_link_clk_enable()
1742 drm_dbg_dp(ctrl->drm_dev, "Enable core clks before link clks\n"); in msm_dp_ctrl_link_clk_enable()
1753 drm_dbg_dp(ctrl->drm_dev, "enable link clocks\n"); in msm_dp_ctrl_link_clk_enable()
1754 drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", in msm_dp_ctrl_link_clk_enable()
1772 drm_dbg_dp(ctrl->drm_dev, "disabled link clocks\n"); in msm_dp_ctrl_link_clk_disable()
1773 drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", in msm_dp_ctrl_link_clk_disable()
1797 drm_dbg_dp(ctrl->drm_dev, "link rate=%d\n", ctrl->link->link_params.rate); in msm_dp_ctrl_enable_mainlink_clocks()
1918 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", in msm_dp_ctrl_phy_init()
1932 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", in msm_dp_ctrl_phy_exit()
1985 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", in msm_dp_ctrl_deinitialize_mainlink()
2023 drm_dbg_dp(ctrl->drm_dev, "pattern: %#x\n", pattern); in msm_dp_ctrl_send_phy_pattern()
2090 drm_dbg_dp(ctrl->drm_dev, in msm_dp_ctrl_send_phy_pattern()
2102 drm_dbg_dp(ctrl->drm_dev, "request: 0x%x\n", pattern_requested); in msm_dp_ctrl_send_phy_test_pattern()
2143 drm_dbg_dp(ctrl->drm_dev, "%s: test->0x%x\n", in msm_dp_ctrl_send_phy_test_pattern()
2154 drm_dbg_dp(ctrl->drm_dev, in msm_dp_ctrl_process_phy_test_request()
2180 drm_dbg_dp(ctrl->drm_dev, "pixel clks already enabled\n"); in msm_dp_ctrl_process_phy_test_request()
2209 drm_dbg_dp(ctrl->drm_dev, "PHY_TEST_PATTERN request\n"); in msm_dp_ctrl_handle_sink_request()
2283 drm_dbg_dp(ctrl->drm_dev, in msm_dp_ctrl_on_link()
2295 drm_dbg_dp(ctrl->drm_dev, "rate=%d, num_lanes=%d, pixel_rate=%lu\n", in msm_dp_ctrl_on_link()
2444 drm_dbg_dp(ctrl->drm_dev, "mvid=0x%x, nvid=0x%x\n", mvid, nvid); in msm_dp_ctrl_config_msa()
2467 drm_dbg_dp(ctrl->drm_dev, "rate=%d, num_lanes=%d, pixel_rate=%lu\n", in msm_dp_ctrl_on_stream()
2471 drm_dbg_dp(ctrl->drm_dev, in msm_dp_ctrl_on_stream()
2490 drm_dbg_dp(ctrl->drm_dev, "pixel clks already enabled\n"); in msm_dp_ctrl_on_stream()
2530 drm_dbg_dp(ctrl->drm_dev, in msm_dp_ctrl_on_stream()
2566 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", in msm_dp_ctrl_off_link_stream()
2615 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", in msm_dp_ctrl_off()
2637 drm_dbg_dp(ctrl->drm_dev, "PSR exit done\n"); in msm_dp_ctrl_isr()
2640 drm_dbg_dp(ctrl->drm_dev, "PSR frame update done\n"); in msm_dp_ctrl_isr()
2643 drm_dbg_dp(ctrl->drm_dev, "PSR frame capture done\n"); in msm_dp_ctrl_isr()
2649 drm_dbg_dp(ctrl->drm_dev, "dp_video_ready\n"); in msm_dp_ctrl_isr()
2655 drm_dbg_dp(ctrl->drm_dev, "idle_patterns_sent\n"); in msm_dp_ctrl_isr()