Lines Matching full:rm
34 * @rm: DPU Resource Manager handle
41 struct dpu_rm *rm, in dpu_rm_init() argument
48 if (!rm || !cat || !mmio) { in dpu_rm_init()
54 memset(rm, 0, sizeof(*rm)); in dpu_rm_init()
56 rm->has_legacy_ctls = (cat->mdss_ver->core_major_ver < 5); in dpu_rm_init()
69 rm->mixer_blks[lm->id - LM_0] = &hw->base; in dpu_rm_init()
83 rm->merge_3d_blks[merge_3d->id - MERGE_3D_0] = &hw->base; in dpu_rm_init()
98 hw->merge_3d = to_dpu_hw_merge_3d(rm->merge_3d_blks[pp->merge_3d - MERGE_3D_0]); in dpu_rm_init()
99 rm->pingpong_blks[pp->id - PINGPONG_0] = &hw->base; in dpu_rm_init()
112 rm->hw_intf[intf->id - INTF_0] = hw; in dpu_rm_init()
125 rm->hw_wb[wb->id - WB_0] = hw; in dpu_rm_init()
138 rm->cwb_blks[cwb->id - CWB_0] = &hw->base; in dpu_rm_init()
151 rm->ctl_blks[ctl->id - CTL_0] = &hw->base; in dpu_rm_init()
164 rm->dspp_blks[dspp->id - DSPP_0] = &hw->base; in dpu_rm_init()
181 rm->dsc_blks[dsc->id - DSC_0] = &hw->base; in dpu_rm_init()
194 rm->hw_sspp[sspp->id - SSPP_NONE] = hw; in dpu_rm_init()
206 rm->cdm_blk = &hw->base; in dpu_rm_init()
222 * @rm: dpu resource manager handle
223 * @primary_idx: index of primary mixer in rm->mixer_blks[]
227 static int _dpu_rm_get_lm_peer(struct dpu_rm *rm, int primary_idx) in _dpu_rm_get_lm_peer() argument
231 prim_lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[primary_idx])->cap; in _dpu_rm_get_lm_peer()
238 static int _dpu_rm_reserve_cwb_mux_and_pingpongs(struct dpu_rm *rm, in _dpu_rm_reserve_cwb_mux_and_pingpongs() argument
255 for (int i = 0; i < ARRAY_SIZE(rm->mixer_blks) && in _dpu_rm_reserve_cwb_mux_and_pingpongs()
257 for (int j = 0; j < ARRAY_SIZE(rm->cwb_blks); j++) { in _dpu_rm_reserve_cwb_mux_and_pingpongs()
262 * Since the RM HW block array index is based on the HW in _dpu_rm_reserve_cwb_mux_and_pingpongs()
295 * @rm: dpu resource manager handle
298 * @lm_idx: index of proposed layer mixer in rm->mixer_blks[], function checks
302 * mixer in rm->pingpong_blks[].
304 * mixer in rm->dspp_blks[].
308 static bool _dpu_rm_check_lm_and_get_connected_blks(struct dpu_rm *rm, in _dpu_rm_check_lm_and_get_connected_blks() argument
322 lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[lm_idx])->cap; in _dpu_rm_check_lm_and_get_connected_blks()
324 if (idx < 0 || idx >= ARRAY_SIZE(rm->pingpong_blks)) { in _dpu_rm_check_lm_and_get_connected_blks()
340 if (idx < 0 || idx >= ARRAY_SIZE(rm->dspp_blks)) { in _dpu_rm_check_lm_and_get_connected_blks()
355 static int _dpu_rm_reserve_lms(struct dpu_rm *rm, in _dpu_rm_reserve_lms() argument
372 for (i = 0; i < ARRAY_SIZE(rm->mixer_blks) && in _dpu_rm_reserve_lms()
374 if (!rm->mixer_blks[i]) in _dpu_rm_reserve_lms()
380 if (!_dpu_rm_check_lm_and_get_connected_blks(rm, global_state, in _dpu_rm_reserve_lms()
390 int j = _dpu_rm_get_lm_peer(rm, i); in _dpu_rm_reserve_lms()
396 if (!rm->mixer_blks[j]) in _dpu_rm_reserve_lms()
399 if (!_dpu_rm_check_lm_and_get_connected_blks(rm, in _dpu_rm_reserve_lms()
430 struct dpu_rm *rm, in _dpu_rm_reserve_ctls() argument
439 if (rm->has_legacy_ctls) { in _dpu_rm_reserve_ctls()
453 for (j = 0; j < ARRAY_SIZE(rm->ctl_blks); j++) { in _dpu_rm_reserve_ctls()
458 if (!rm->ctl_blks[j]) in _dpu_rm_reserve_ctls()
463 ctl = to_dpu_hw_ctl(rm->ctl_blks[j]); in _dpu_rm_reserve_ctls()
517 static int _dpu_rm_dsc_alloc(struct dpu_rm *rm, in _dpu_rm_dsc_alloc() argument
527 for (dsc_idx = 0; dsc_idx < ARRAY_SIZE(rm->dsc_blks) && in _dpu_rm_dsc_alloc()
529 if (!rm->dsc_blks[dsc_idx]) in _dpu_rm_dsc_alloc()
557 static int _dpu_rm_dsc_alloc_pair(struct dpu_rm *rm, in _dpu_rm_dsc_alloc_pair() argument
567 for (dsc_idx = 0; dsc_idx < ARRAY_SIZE(rm->dsc_blks) && in _dpu_rm_dsc_alloc_pair()
569 if (!rm->dsc_blks[dsc_idx] || in _dpu_rm_dsc_alloc_pair()
570 !rm->dsc_blks[dsc_idx + 1]) in _dpu_rm_dsc_alloc_pair()
613 static int _dpu_rm_reserve_dsc(struct dpu_rm *rm, in _dpu_rm_reserve_dsc() argument
633 return _dpu_rm_dsc_alloc_pair(rm, global_state, crtc_id, top); in _dpu_rm_reserve_dsc()
635 return _dpu_rm_dsc_alloc(rm, global_state, crtc_id, top); in _dpu_rm_reserve_dsc()
640 static int _dpu_rm_reserve_cdm(struct dpu_rm *rm, in _dpu_rm_reserve_cdm() argument
646 if (!rm->cdm_blk) { in _dpu_rm_reserve_cdm()
667 struct dpu_rm *rm, in _dpu_rm_make_reservation() argument
674 ret = _dpu_rm_reserve_lms(rm, global_state, crtc_id, topology); in _dpu_rm_make_reservation()
681 ret = _dpu_rm_reserve_cwb_mux_and_pingpongs(rm, global_state, in _dpu_rm_make_reservation()
687 ret = _dpu_rm_reserve_ctls(rm, global_state, crtc_id, in _dpu_rm_make_reservation()
694 ret = _dpu_rm_reserve_dsc(rm, global_state, crtc_id, topology); in _dpu_rm_make_reservation()
699 ret = _dpu_rm_reserve_cdm(rm, global_state, crtc_id, topology->num_cdm); in _dpu_rm_make_reservation()
754 * @rm: DPU Resource Manager handle
761 struct dpu_rm *rm, in dpu_rm_reserve() argument
779 ret = _dpu_rm_make_reservation(rm, global_state, crtc->base.id, topology); in dpu_rm_reserve()
786 static struct dpu_hw_sspp *dpu_rm_try_sspp(struct dpu_rm *rm, in dpu_rm_try_sspp() argument
796 for (i = 0; i < ARRAY_SIZE(rm->hw_sspp); i++) { in dpu_rm_try_sspp()
797 if (!rm->hw_sspp[i]) in dpu_rm_try_sspp()
803 hw_sspp = rm->hw_sspp[i]; in dpu_rm_try_sspp()
823 return rm->hw_sspp[i]; in dpu_rm_try_sspp()
831 * @rm: DPU Resource Manager handle
836 struct dpu_hw_sspp *dpu_rm_reserve_sspp(struct dpu_rm *rm, in dpu_rm_reserve_sspp() argument
844 hw_sspp = dpu_rm_try_sspp(rm, global_state, crtc, reqs, SSPP_TYPE_DMA); in dpu_rm_reserve_sspp()
846 hw_sspp = dpu_rm_try_sspp(rm, global_state, crtc, reqs, SSPP_TYPE_RGB); in dpu_rm_reserve_sspp()
848 hw_sspp = dpu_rm_try_sspp(rm, global_state, crtc, reqs, SSPP_TYPE_VIG); in dpu_rm_reserve_sspp()
886 * @rm: DPU Resource Manager handle
893 int dpu_rm_get_assigned_resources(struct dpu_rm *rm, in dpu_rm_get_assigned_resources() argument
905 hw_blks = rm->pingpong_blks; in dpu_rm_get_assigned_resources()
907 max_blks = ARRAY_SIZE(rm->pingpong_blks); in dpu_rm_get_assigned_resources()
910 hw_blks = rm->mixer_blks; in dpu_rm_get_assigned_resources()
912 max_blks = ARRAY_SIZE(rm->mixer_blks); in dpu_rm_get_assigned_resources()
915 hw_blks = rm->ctl_blks; in dpu_rm_get_assigned_resources()
917 max_blks = ARRAY_SIZE(rm->ctl_blks); in dpu_rm_get_assigned_resources()
920 hw_blks = rm->dspp_blks; in dpu_rm_get_assigned_resources()
922 max_blks = ARRAY_SIZE(rm->dspp_blks); in dpu_rm_get_assigned_resources()
925 hw_blks = rm->dsc_blks; in dpu_rm_get_assigned_resources()
927 max_blks = ARRAY_SIZE(rm->dsc_blks); in dpu_rm_get_assigned_resources()
930 hw_blks = &rm->cdm_blk; in dpu_rm_get_assigned_resources()
935 hw_blks = rm->cwb_blks; in dpu_rm_get_assigned_resources()
937 max_blks = ARRAY_SIZE(rm->cwb_blks); in dpu_rm_get_assigned_resources()
940 DPU_ERROR("blk type %d not managed by rm\n", type); in dpu_rm_get_assigned_resources()
993 * dpu_rm_print_state - output the RM private state
1000 const struct dpu_rm *rm = global_state->rm; in dpu_rm_print_state() local
1006 dpu_rm_print_state_helper(p, rm->pingpong_blks[i], in dpu_rm_print_state()
1012 dpu_rm_print_state_helper(p, rm->mixer_blks[i], in dpu_rm_print_state()
1018 dpu_rm_print_state_helper(p, rm->ctl_blks[i], in dpu_rm_print_state()
1024 dpu_rm_print_state_helper(p, rm->dspp_blks[i], in dpu_rm_print_state()
1030 dpu_rm_print_state_helper(p, rm->dsc_blks[i], in dpu_rm_print_state()
1035 dpu_rm_print_state_helper(p, rm->cdm_blk, in dpu_rm_print_state()
1042 dpu_rm_print_state_helper(p, rm->hw_sspp[i] ? &rm->hw_sspp[i]->base : NULL, in dpu_rm_print_state()
1048 dpu_rm_print_state_helper(p, rm->cwb_blks[i], in dpu_rm_print_state()