Lines Matching full:dpu
250 * @dpu_kms: pointer to dpu kms structure
728 /* use only WB idx 2 instance for DPU */
754 * @dpu_kms: Pointer to dpu kms structure
1173 pr_info("dpu hardware revision:0x%x\n", core_rev);
1256 if (of_device_is_compatible(dpu_kms->pdev->dev.of_node, "qcom,sc8180x-dpu"))
1348 DRM_DEBUG("mapped dpu address space @%pK\n", dpu_kms->mmio);
1383 DRM_DEBUG("mapped dpu address space @%pK\n", dpu_kms->mmio);
1512 { .compatible = "qcom,msm8998-dpu", .data = &dpu_msm8998_cfg, },
1513 { .compatible = "qcom,qcm2290-dpu", .data = &dpu_qcm2290_cfg, },
1514 { .compatible = "qcom,sa8775p-dpu", .data = &dpu_sa8775p_cfg, },
1515 { .compatible = "qcom,sar2130p-dpu", .data = &dpu_sar2130p_cfg, },
1518 { .compatible = "qcom,sdm670-dpu", .data = &dpu_sdm670_cfg, },
1519 { .compatible = "qcom,sdm845-dpu", .data = &dpu_sdm845_cfg, },
1520 { .compatible = "qcom,sc7180-dpu", .data = &dpu_sc7180_cfg, },
1521 { .compatible = "qcom,sc7280-dpu", .data = &dpu_sc7280_cfg, },
1522 { .compatible = "qcom,sc8180x-dpu", .data = &dpu_sc8180x_cfg, },
1523 { .compatible = "qcom,sc8280xp-dpu", .data = &dpu_sc8280xp_cfg, },
1524 { .compatible = "qcom,sm6115-dpu", .data = &dpu_sm6115_cfg, },
1525 { .compatible = "qcom,sm6125-dpu", .data = &dpu_sm6125_cfg, },
1526 { .compatible = "qcom,sm6150-dpu", .data = &dpu_sm6150_cfg, },
1527 { .compatible = "qcom,sm6350-dpu", .data = &dpu_sm6350_cfg, },
1528 { .compatible = "qcom,sm6375-dpu", .data = &dpu_sm6375_cfg, },
1529 { .compatible = "qcom,sm7150-dpu", .data = &dpu_sm7150_cfg, },
1530 { .compatible = "qcom,sm8150-dpu", .data = &dpu_sm8150_cfg, },
1531 { .compatible = "qcom,sm8250-dpu", .data = &dpu_sm8250_cfg, },
1532 { .compatible = "qcom,sm8350-dpu", .data = &dpu_sm8350_cfg, },
1533 { .compatible = "qcom,sm8450-dpu", .data = &dpu_sm8450_cfg, },
1534 { .compatible = "qcom,sm8550-dpu", .data = &dpu_sm8550_cfg, },
1535 { .compatible = "qcom,sm8650-dpu", .data = &dpu_sm8650_cfg, },
1536 { .compatible = "qcom,sm8750-dpu", .data = &dpu_sm8750_cfg, },
1537 { .compatible = "qcom,x1e80100-dpu", .data = &dpu_x1e80100_cfg, },