1 /* SPDX-License-Identifier: GPL-2.0-only */
34  * @enum adreno_family: identify generation and possibly sub-generation
36  * In some cases there are distinct sub-generations within a major revision
38  * necessary sub-generation.
93 	 * @chipids: Table of matching chip-ids
134  *      -----+---------
187 	 * of gpu firmware to linux-firmware, the fw files were
189 	 * android kernel.  But linux-firmware preferred they be
210 	 * The migration to the central UBWC config db is still in flight - keep
245 	int __ret = -ETIMEDOUT;                            \
262 	WARN_ON_ONCE(gpu->info->family >= ADRENO_6XX_GEN1);  in adreno_patchid()
263 	return gpu->chip_id & 0xff;  in adreno_patchid()
268 	if (WARN_ON_ONCE(!gpu->info))  in adreno_is_revn()
270 	return gpu->info->revn == revn;  in adreno_is_revn()
275 	return gpu->gmu_is_wrapper;  in adreno_has_gmu_wrapper()
280 	if (WARN_ON_ONCE(!gpu->info))  in adreno_is_a2xx()
282 	return gpu->info->family <= ADRENO_2XX_GEN2;  in adreno_is_a2xx()
287 	if (WARN_ON_ONCE(!gpu->info))  in adreno_is_a20x()
289 	return gpu->info->family == ADRENO_2XX_GEN1;  in adreno_is_a20x()
304 	return gpu->info->chip_ids[0] == 0x03000512;  in adreno_is_a305b()
326 	return adreno_is_revn(gpu, 330);  in adreno_is_a330()
411 	return gpu->info->chip_ids[0] == 0x06020100;  in adreno_is_a621()
416 	return gpu->info->chip_ids[0] == 0x06020300;  in adreno_is_a623()
436 	return gpu->info->chip_ids[0] == 0x06030500;  in adreno_is_7c3()
451 	return gpu->info->chip_ids[0] == 0x06060300;  in adreno_is_a663()
456 	return gpu->info->chip_ids[0] == 0x06090000;  in adreno_is_a690()
461 	return gpu->info->chip_ids[0] == 0x07000200;  in adreno_is_a702()
466 	if (WARN_ON_ONCE(!gpu->info))  in adreno_is_a610_family()
482 	if (WARN_ON_ONCE(!gpu->info))  in adreno_is_a630_family()
484 	return gpu->info->family == ADRENO_6XX_GEN1;  in adreno_is_a630_family()
489 	if (WARN_ON_ONCE(!gpu->info))  in adreno_is_a660_family()
491 	return gpu->info->family == ADRENO_6XX_GEN4;  in adreno_is_a660_family()
497 	if (WARN_ON_ONCE(!gpu->info))  in adreno_is_a650_family()
499 	return gpu->info->family == ADRENO_6XX_GEN3 ||  in adreno_is_a650_family()
500 	       gpu->info->family == ADRENO_6XX_GEN4;  in adreno_is_a650_family()
505 	if (WARN_ON_ONCE(!gpu->info))  in adreno_is_a640_family()
507 	return gpu->info->family == ADRENO_6XX_GEN2;  in adreno_is_a640_family()
512 	return gpu->info->chip_ids[0] == 0x07030001;  in adreno_is_a730()
517 	return gpu->info->chip_ids[0] == 0x43050a01;  in adreno_is_a740()
522 	return gpu->info->chip_ids[0] == 0x43051401;  in adreno_is_a750()
527 	return gpu->info->chip_ids[0] == 0x43050c01;  in adreno_is_x185()
532 	if (WARN_ON_ONCE(!gpu->info))  in adreno_is_a740_family()
534 	return gpu->info->family == ADRENO_7XX_GEN2 ||  in adreno_is_a740_family()
535 	       gpu->info->family == ADRENO_7XX_GEN3;  in adreno_is_a740_family()
540 	return gpu->info->family == ADRENO_7XX_GEN3;  in adreno_is_a750_family()
545 	/* Update with non-fake (i.e. non-A702) Gen 7 GPUs */  in adreno_is_a7xx()
546 	return gpu->info->family == ADRENO_7XX_GEN1 ||  in adreno_is_a7xx()
592  * Common helper function to initialize the default address space for arm-smmu
618 /* ringbuffer helpers (the parts that are adreno specific) */
624 	OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));  in OUT_PKT0()
627 /* no-op packet: */
639 	OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));  in OUT_PKT3()
683 	return (ring->cur - ring->start) % (MSM_GPU_RINGBUFFER_SZ >> 2);  in get_wptr()
688  * REG_CP_PROTECT_REG(n) - this will block both reads and writes for _len
694  * (0x07-0x0A) the hardware will actually protect (0x04-0x07) which might
712 	readl_poll_timeout((gpu)->mmio + ((addr) << 2), val, cond, \