131 static int a6xx_crashdumper_init(struct msm_gpu *gpu,  in a6xx_crashdumper_init()  argument
134 	dumper->ptr = msm_gem_kernel_new(gpu->dev,  in a6xx_crashdumper_init()
135 		SZ_1M, MSM_BO_WC, gpu->vm,  in a6xx_crashdumper_init()
144 static int a6xx_crashdumper_run(struct msm_gpu *gpu,  in a6xx_crashdumper_run()  argument
147 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a6xx_crashdumper_run()
161 	gpu_write64(gpu, REG_A6XX_CP_CRASH_DUMP_SCRIPT_BASE, dumper->iova);  in a6xx_crashdumper_run()
163 	gpu_write(gpu, REG_A6XX_CP_CRASH_DUMP_CNTL, 1);  in a6xx_crashdumper_run()
165 	ret = gpu_poll_timeout(gpu, REG_A6XX_CP_CRASH_DUMP_STATUS, val,  in a6xx_crashdumper_run()
168 	gpu_write(gpu, REG_A6XX_CP_CRASH_DUMP_CNTL, 0);  in a6xx_crashdumper_run()
174 static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset,  in debugbus_read()  argument
179 	if (to_adreno_gpu(gpu)->info->family >= ADRENO_7XX_GEN1) {  in debugbus_read()
187 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_SEL_A, reg);  in debugbus_read()
188 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_SEL_B, reg);  in debugbus_read()
189 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_SEL_C, reg);  in debugbus_read()
190 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_SEL_D, reg);  in debugbus_read()
195 	data[0] = gpu_read(gpu, REG_A6XX_DBGC_CFG_DBGBUS_TRACE_BUF2);  in debugbus_read()
196 	data[1] = gpu_read(gpu, REG_A6XX_DBGC_CFG_DBGBUS_TRACE_BUF1);  in debugbus_read()
208 static int cx_debugbus_read(struct msm_gpu *gpu, void __iomem *cxdbg, u32 block, u32 offset,  in cx_debugbus_read()  argument
213 	if (to_adreno_gpu(gpu)->info->family >= ADRENO_7XX_GEN1) {  in cx_debugbus_read()
236 static int vbif_debugbus_read(struct msm_gpu *gpu, u32 ctrl0, u32 ctrl1,  in vbif_debugbus_read()  argument
241 	gpu_write(gpu, ctrl0, reg);  in vbif_debugbus_read()
244 		gpu_write(gpu, ctrl1, i);  in vbif_debugbus_read()
245 		data[i] = gpu_read(gpu, REG_A6XX_VBIF_TEST_BUS_OUT);  in vbif_debugbus_read()
260 static void a6xx_get_vbif_debugbus_block(struct msm_gpu *gpu,  in a6xx_get_vbif_debugbus_block()  argument
275 	clk = gpu_read(gpu, REG_A6XX_VBIF_CLKON);  in a6xx_get_vbif_debugbus_block()
278 	gpu_write(gpu, REG_A6XX_VBIF_CLKON,  in a6xx_get_vbif_debugbus_block()
282 	gpu_write(gpu, REG_A6XX_VBIF_TEST_BUS1_CTRL0, 0);  in a6xx_get_vbif_debugbus_block()
285 	gpu_write(gpu, REG_A6XX_VBIF_TEST_BUS_OUT_CTRL, 1);  in a6xx_get_vbif_debugbus_block()
290 		ptr += vbif_debugbus_read(gpu,  in a6xx_get_vbif_debugbus_block()
296 		ptr += vbif_debugbus_read(gpu,  in a6xx_get_vbif_debugbus_block()
302 	gpu_write(gpu, REG_A6XX_VBIF_TEST_BUS2_CTRL0, 0);  in a6xx_get_vbif_debugbus_block()
305 		ptr += vbif_debugbus_read(gpu,  in a6xx_get_vbif_debugbus_block()
311 	gpu_write(gpu, REG_A6XX_VBIF_CLKON, clk);  in a6xx_get_vbif_debugbus_block()
314 static void a6xx_get_debugbus_block(struct msm_gpu *gpu,  in a6xx_get_debugbus_block()  argument
329 		ptr += debugbus_read(gpu, block->id, i, ptr);  in a6xx_get_debugbus_block()
332 static void a6xx_get_cx_debugbus_block(struct msm_gpu *gpu,  in a6xx_get_cx_debugbus_block()  argument
348 		ptr += cx_debugbus_read(gpu, cxdbg, block->id, i, ptr);  in a6xx_get_cx_debugbus_block()
351 static void a6xx_get_debugbus_blocks(struct msm_gpu *gpu,  in a6xx_get_debugbus_blocks()  argument
355 		(a6xx_has_gbif(to_adreno_gpu(gpu)) ? 1 : 0);  in a6xx_get_debugbus_blocks()
357 	if (adreno_is_a650_family(to_adreno_gpu(gpu)))  in a6xx_get_debugbus_blocks()
367 			a6xx_get_debugbus_block(gpu,  in a6xx_get_debugbus_blocks()
379 		if (a6xx_has_gbif(to_adreno_gpu(gpu))) {  in a6xx_get_debugbus_blocks()
380 			a6xx_get_debugbus_block(gpu, a6xx_state,  in a6xx_get_debugbus_blocks()
388 		if (adreno_is_a650_family(to_adreno_gpu(gpu))) {  in a6xx_get_debugbus_blocks()
390 				a6xx_get_debugbus_block(gpu,  in a6xx_get_debugbus_blocks()
398 static void a7xx_get_debugbus_blocks(struct msm_gpu *gpu,  in a7xx_get_debugbus_blocks()  argument
401 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a7xx_get_debugbus_blocks()
431 			a6xx_get_debugbus_block(gpu,  in a7xx_get_debugbus_blocks()
437 			a6xx_get_debugbus_block(gpu,  in a7xx_get_debugbus_blocks()
446 static void a6xx_get_debugbus(struct msm_gpu *gpu,  in a6xx_get_debugbus()  argument
449 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a6xx_get_debugbus()
455 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_CNTLT,  in a6xx_get_debugbus()
458 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_CNTLM,  in a6xx_get_debugbus()
461 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_0, 0);  in a6xx_get_debugbus()
462 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_1, 0);  in a6xx_get_debugbus()
463 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_2, 0);  in a6xx_get_debugbus()
464 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_IVTL_3, 0);  in a6xx_get_debugbus()
466 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_BYTEL_0, 0x76543210);  in a6xx_get_debugbus()
467 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_BYTEL_1, 0xFEDCBA98);  in a6xx_get_debugbus()
469 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_0, 0);  in a6xx_get_debugbus()
470 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_1, 0);  in a6xx_get_debugbus()
471 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_2, 0);  in a6xx_get_debugbus()
472 	gpu_write(gpu, REG_A6XX_DBGC_CFG_DBGBUS_MASKL_3, 0);  in a6xx_get_debugbus()
477 	res = platform_get_resource_byname(gpu->pdev, IORESOURCE_MEM,  in a6xx_get_debugbus()
507 		a7xx_get_debugbus_blocks(gpu, a6xx_state);  in a6xx_get_debugbus()
509 		a6xx_get_debugbus_blocks(gpu, a6xx_state);  in a6xx_get_debugbus()
519 			a6xx_get_vbif_debugbus_block(gpu, a6xx_state,  in a6xx_get_debugbus()
545 				a6xx_get_cx_debugbus_block(gpu,  in a6xx_get_debugbus()
562 static void a6xx_get_dbgahb_cluster(struct msm_gpu *gpu,  in a6xx_get_dbgahb_cluster()  argument
600 	if (a6xx_crashdumper_run(gpu, dumper))  in a6xx_get_dbgahb_cluster()
608 static void a7xx_get_dbgahb_cluster(struct msm_gpu *gpu,  in a7xx_get_dbgahb_cluster()  argument
642 	if (a6xx_crashdumper_run(gpu, dumper))  in a7xx_get_dbgahb_cluster()
650 static void a6xx_get_dbgahb_clusters(struct msm_gpu *gpu,  in a6xx_get_dbgahb_clusters()  argument
666 		a6xx_get_dbgahb_cluster(gpu, a6xx_state,  in a6xx_get_dbgahb_clusters()
671 static void a7xx_get_dbgahb_clusters(struct msm_gpu *gpu,  in a7xx_get_dbgahb_clusters()  argument
675 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a7xx_get_dbgahb_clusters()
702 		a7xx_get_dbgahb_cluster(gpu, a6xx_state,  in a7xx_get_dbgahb_clusters()
708 static void a6xx_get_cluster(struct msm_gpu *gpu,  in a6xx_get_cluster()  argument
714 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a6xx_get_cluster()
760 	if (a6xx_crashdumper_run(gpu, dumper))  in a6xx_get_cluster()
768 static void a7xx_get_cluster(struct msm_gpu *gpu,  in a7xx_get_cluster()  argument
805 	if (a6xx_crashdumper_run(gpu, dumper))  in a7xx_get_cluster()
813 static void a6xx_get_clusters(struct msm_gpu *gpu,  in a6xx_get_clusters()  argument
828 		a6xx_get_cluster(gpu, a6xx_state, &a6xx_clusters[i],  in a6xx_get_clusters()
832 static void a7xx_get_clusters(struct msm_gpu *gpu,  in a7xx_get_clusters()  argument
836 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a7xx_get_clusters()
862 		a7xx_get_cluster(gpu, a6xx_state, &clusters[i],  in a7xx_get_clusters()
867 static void a6xx_get_shader_block(struct msm_gpu *gpu,  in a6xx_get_shader_block()  argument
893 	if (a6xx_crashdumper_run(gpu, dumper))  in a6xx_get_shader_block()
901 static void a7xx_get_shader_block(struct msm_gpu *gpu,  in a7xx_get_shader_block()  argument
907 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a7xx_get_shader_block()
917 		gpu_rmw(gpu, REG_A7XX_SP_DBG_CNTL, GENMASK(1, 0), 3);  in a7xx_get_shader_block()
938 	if (a6xx_crashdumper_run(gpu, dumper))  in a7xx_get_shader_block()
947 		gpu_rmw(gpu, REG_A7XX_SP_DBG_CNTL, GENMASK(1, 0), 0);  in a7xx_get_shader_block()
951 static void a6xx_get_shaders(struct msm_gpu *gpu,  in a6xx_get_shaders()  argument
966 		a6xx_get_shader_block(gpu, a6xx_state, &a6xx_shader_blocks[i],  in a6xx_get_shaders()
970 static void a7xx_get_shaders(struct msm_gpu *gpu,  in a7xx_get_shaders()  argument
974 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a7xx_get_shaders()
1000 		a7xx_get_shader_block(gpu, a6xx_state, &shader_blocks[i],  in a7xx_get_shaders()
1005 static void a6xx_get_crashdumper_hlsq_registers(struct msm_gpu *gpu,  in a6xx_get_crashdumper_hlsq_registers()  argument
1034 	if (a6xx_crashdumper_run(gpu, dumper))  in a6xx_get_crashdumper_hlsq_registers()
1043 static void a6xx_get_crashdumper_registers(struct msm_gpu *gpu,  in a6xx_get_crashdumper_registers()  argument
1055 	if (!adreno_is_a660_family(to_adreno_gpu(gpu)) &&  in a6xx_get_crashdumper_registers()
1077 	if (a6xx_crashdumper_run(gpu, dumper))  in a6xx_get_crashdumper_registers()
1085 static void a7xx_get_crashdumper_registers(struct msm_gpu *gpu,  in a7xx_get_crashdumper_registers()  argument
1114 	if (a6xx_crashdumper_run(gpu, dumper))  in a7xx_get_crashdumper_registers()
1124 static void a6xx_get_ahb_gpu_registers(struct msm_gpu *gpu,  in a6xx_get_ahb_gpu_registers()  argument
1132 	if (!adreno_is_a660_family(to_adreno_gpu(gpu)) &&  in a6xx_get_ahb_gpu_registers()
1149 			obj->data[index++] = gpu_read(gpu,  in a6xx_get_ahb_gpu_registers()
1154 static void a7xx_get_ahb_gpu_registers(struct msm_gpu *gpu,  in a7xx_get_ahb_gpu_registers()  argument
1174 			obj->data[index++] = gpu_read(gpu, regs[i] + j);  in a7xx_get_ahb_gpu_registers()
1178 static void a7xx_get_ahb_gpu_reglist(struct msm_gpu *gpu,  in a7xx_get_ahb_gpu_reglist()  argument
1184 		gpu_write(gpu, regs->sel->host_reg, regs->sel->val);  in a7xx_get_ahb_gpu_reglist()
1186 	a7xx_get_ahb_gpu_registers(gpu, a6xx_state, regs->regs, obj);  in a7xx_get_ahb_gpu_reglist()
1190 static void _a6xx_get_gmu_registers(struct msm_gpu *gpu,  in _a6xx_get_gmu_registers()  argument
1196 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in _a6xx_get_gmu_registers()
1227 static void a6xx_get_gmu_registers(struct msm_gpu *gpu,  in a6xx_get_gmu_registers()  argument
1230 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a6xx_get_gmu_registers()
1242 	_a6xx_get_gmu_registers(gpu, a6xx_state, &a6xx_gmu_reglist[0],  in a6xx_get_gmu_registers()
1244 	_a6xx_get_gmu_registers(gpu, a6xx_state, &a6xx_gmu_reglist[1],  in a6xx_get_gmu_registers()
1248 		_a6xx_get_gmu_registers(gpu, a6xx_state, &a621_gpucc_reg,  in a6xx_get_gmu_registers()
1251 		_a6xx_get_gmu_registers(gpu, a6xx_state, &a6xx_gpucc_reg,  in a6xx_get_gmu_registers()
1258 	gpu_write(gpu, REG_A6XX_GMU_AO_AHB_FENCE_CTRL, 0);  in a6xx_get_gmu_registers()
1260 	_a6xx_get_gmu_registers(gpu, a6xx_state, &a6xx_gmu_reglist[2],  in a6xx_get_gmu_registers()
1287 static void a6xx_snapshot_gmu_hfi_history(struct msm_gpu *gpu,  in a6xx_snapshot_gmu_hfi_history()  argument
1290 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a6xx_snapshot_gmu_hfi_history()
1308 static void a6xx_get_registers(struct msm_gpu *gpu,  in a6xx_get_registers()  argument
1316 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a6xx_get_registers()
1326 	a6xx_get_ahb_gpu_registers(gpu,  in a6xx_get_registers()
1331 		a6xx_get_ahb_gpu_registers(gpu,  in a6xx_get_registers()
1335 		a6xx_get_ahb_gpu_registers(gpu,  in a6xx_get_registers()
1347 			a6xx_get_ahb_gpu_registers(gpu,  in a6xx_get_registers()
1354 		a6xx_get_crashdumper_registers(gpu,  in a6xx_get_registers()
1360 		a6xx_get_crashdumper_hlsq_registers(gpu,  in a6xx_get_registers()
1368 static void a7xx_get_registers(struct msm_gpu *gpu,  in a7xx_get_registers()  argument
1372 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a7xx_get_registers()
1412 	a7xx_get_ahb_gpu_registers(gpu, a6xx_state, pre_crashdumper_regs,  in a7xx_get_registers()
1416 		a7xx_get_ahb_gpu_reglist(gpu,  in a7xx_get_registers()
1423 		a7xx_get_crashdumper_registers(gpu,  in a7xx_get_registers()
1429 static void a7xx_get_post_crashdumper_registers(struct msm_gpu *gpu,  in a7xx_get_post_crashdumper_registers()  argument
1432 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a7xx_get_post_crashdumper_registers()
1438 	a7xx_get_ahb_gpu_registers(gpu,  in a7xx_get_post_crashdumper_registers()
1443 static u32 a6xx_get_cp_roq_size(struct msm_gpu *gpu)  in a6xx_get_cp_roq_size()  argument
1446 	return gpu_read(gpu, REG_A6XX_CP_ROQ_THRESHOLDS_2) >> 14;  in a6xx_get_cp_roq_size()
1449 static u32 a7xx_get_cp_roq_size(struct msm_gpu *gpu)  in a7xx_get_cp_roq_size()  argument
1456 	gpu_write(gpu, REG_A6XX_CP_SQE_UCODE_DBG_ADDR, 0x70d3);  in a7xx_get_cp_roq_size()
1458 	return 4 * (gpu_read(gpu, REG_A6XX_CP_SQE_UCODE_DBG_DATA) >> 20);  in a7xx_get_cp_roq_size()
1462 static void a6xx_get_indexed_regs(struct msm_gpu *gpu,  in a6xx_get_indexed_regs()  argument
1472 		count = indexed->count_fn(gpu);  in a6xx_get_indexed_regs()
1480 	gpu_write(gpu, indexed->addr, 0);  in a6xx_get_indexed_regs()
1484 		obj->data[i] = gpu_read(gpu, indexed->data);  in a6xx_get_indexed_regs()
1487 static void a6xx_get_indexed_registers(struct msm_gpu *gpu,  in a6xx_get_indexed_registers()  argument
1500 		a6xx_get_indexed_regs(gpu, a6xx_state, &a6xx_indexed_reglist[i],  in a6xx_get_indexed_registers()
1503 	if (adreno_is_a650_family(to_adreno_gpu(gpu))) {  in a6xx_get_indexed_registers()
1506 		val = gpu_read(gpu, REG_A6XX_CP_CHICKEN_DBG);  in a6xx_get_indexed_registers()
1507 		gpu_write(gpu, REG_A6XX_CP_CHICKEN_DBG, val | 4);  in a6xx_get_indexed_registers()
1510 		a6xx_get_indexed_regs(gpu, a6xx_state, &a6xx_cp_mempool_indexed,  in a6xx_get_indexed_registers()
1513 		gpu_write(gpu, REG_A6XX_CP_CHICKEN_DBG, val);  in a6xx_get_indexed_registers()
1519 	mempool_size = gpu_read(gpu, REG_A6XX_CP_MEM_POOL_SIZE);  in a6xx_get_indexed_registers()
1520 	gpu_write(gpu, REG_A6XX_CP_MEM_POOL_SIZE, 0);  in a6xx_get_indexed_registers()
1523 	a6xx_get_indexed_regs(gpu, a6xx_state, &a6xx_cp_mempool_indexed,  in a6xx_get_indexed_registers()
1533 	gpu_write(gpu, REG_A6XX_CP_MEM_POOL_SIZE, mempool_size);  in a6xx_get_indexed_registers()
1538 static void a7xx_get_indexed_registers(struct msm_gpu *gpu,  in a7xx_get_indexed_registers()  argument
1541 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a7xx_get_indexed_registers()
1566 		a6xx_get_indexed_regs(gpu, a6xx_state, &indexed_regs[i],  in a7xx_get_indexed_registers()
1569 	gpu_rmw(gpu, REG_A6XX_CP_CHICKEN_DBG, 0, BIT(2));  in a7xx_get_indexed_registers()
1570 	gpu_rmw(gpu, REG_A7XX_CP_BV_CHICKEN_DBG, 0, BIT(2));  in a7xx_get_indexed_registers()
1574 		a6xx_get_indexed_regs(gpu, a6xx_state, &a7xx_cp_bv_mempool_indexed[i],  in a7xx_get_indexed_registers()
1577 	gpu_rmw(gpu, REG_A6XX_CP_CHICKEN_DBG, BIT(2), 0);  in a7xx_get_indexed_registers()
1578 	gpu_rmw(gpu, REG_A7XX_CP_BV_CHICKEN_DBG, BIT(2), 0);  in a7xx_get_indexed_registers()
1582 struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu)  in a6xx_gpu_state_get()  argument
1585 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a6xx_gpu_state_get()
1589 	bool stalled = !!(gpu_read(gpu, REG_A6XX_RBBM_STATUS3) &  in a6xx_gpu_state_get()
1598 	adreno_gpu_state_get(gpu, &a6xx_state->base);  in a6xx_gpu_state_get()
1601 		a6xx_get_gmu_registers(gpu, a6xx_state);  in a6xx_gpu_state_get()
1607 		a6xx_snapshot_gmu_hfi_history(gpu, a6xx_state);  in a6xx_gpu_state_get()
1616 		a7xx_get_indexed_registers(gpu, a6xx_state);  in a6xx_gpu_state_get()
1618 		a6xx_get_indexed_registers(gpu, a6xx_state);  in a6xx_gpu_state_get()
1626 	if (!stalled && !gpu->needs_hw_init &&  in a6xx_gpu_state_get()
1627 	    !a6xx_crashdumper_init(gpu, &_dumper)) {  in a6xx_gpu_state_get()
1632 		a7xx_get_registers(gpu, a6xx_state, dumper);  in a6xx_gpu_state_get()
1635 			a7xx_get_shaders(gpu, a6xx_state, dumper);  in a6xx_gpu_state_get()
1636 			a7xx_get_clusters(gpu, a6xx_state, dumper);  in a6xx_gpu_state_get()
1637 			a7xx_get_dbgahb_clusters(gpu, a6xx_state, dumper);  in a6xx_gpu_state_get()
1639 			msm_gem_kernel_put(dumper->bo, gpu->vm);  in a6xx_gpu_state_get()
1642 		a7xx_get_post_crashdumper_registers(gpu, a6xx_state);  in a6xx_gpu_state_get()
1644 		a6xx_get_registers(gpu, a6xx_state, dumper);  in a6xx_gpu_state_get()
1647 			a6xx_get_shaders(gpu, a6xx_state, dumper);  in a6xx_gpu_state_get()
1648 			a6xx_get_clusters(gpu, a6xx_state, dumper);  in a6xx_gpu_state_get()
1649 			a6xx_get_dbgahb_clusters(gpu, a6xx_state, dumper);  in a6xx_gpu_state_get()
1651 			msm_gem_kernel_put(dumper->bo, gpu->vm);  in a6xx_gpu_state_get()
1656 		a6xx_get_debugbus(gpu, a6xx_state);  in a6xx_gpu_state_get()
1658 	a6xx_state->gpu_initialized = !gpu->needs_hw_init;  in a6xx_gpu_state_get()
1972 void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,  in a6xx_show()  argument
1975 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);  in a6xx_show()
1985 	adreno_show(gpu, state, p);  in a6xx_show()