Lines Matching defs:a6xx_gpu
50 struct a6xx_gpu { struct
51 struct adreno_gpu base;
53 struct drm_gem_object *sqe_bo;
54 uint64_t sqe_iova;
56 struct msm_ringbuffer *cur_ring;
57 struct msm_ringbuffer *next_ring;
59 struct drm_gem_object *preempt_bo[MSM_GPU_MAX_RINGS];
60 void *preempt[MSM_GPU_MAX_RINGS];
61 uint64_t preempt_iova[MSM_GPU_MAX_RINGS];
62 struct drm_gem_object *preempt_smmu_bo[MSM_GPU_MAX_RINGS];
63 void *preempt_smmu[MSM_GPU_MAX_RINGS];
64 uint64_t preempt_smmu_iova[MSM_GPU_MAX_RINGS];
65 uint32_t last_seqno[MSM_GPU_MAX_RINGS];
67 atomic_t preempt_state;
68 spinlock_t eval_lock;
69 struct timer_list preempt_timer;
71 unsigned int preempt_level;
72 bool uses_gmem;
73 bool skip_save_restore;
75 struct drm_gem_object *preempt_postamble_bo;
76 void *preempt_postamble_ptr;
77 uint64_t preempt_postamble_iova;
101 #define to_a6xx_gpu(x) container_of(x, struct a6xx_gpu, base) argument
222 static inline void a6xx_llc_rmw(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 mask, u32 or) in a6xx_llc_rmw()
227 static inline u32 a6xx_llc_read(struct a6xx_gpu *a6xx_gpu, u32 reg) in a6xx_llc_read()
232 static inline void a6xx_llc_write(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 value) in a6xx_llc_write()
265 static inline bool a6xx_in_preempt(struct a6xx_gpu *a6xx_gpu) in a6xx_in_preempt()