Lines Matching defs:gpu

25 	struct msm_gpu *gpu = &adreno_gpu->base;
31 	timer_delete(&gpu->hangcheck_timer);
34 	kthread_queue_work(gpu->worker, &gpu->recover_work);
82 	/* This can be called from gpu state code so make sure GMU is valid */
98 	/* This can be called from gpu state code so make sure GMU is valid */
109 void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp,
112 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
179 			dev_pm_opp_set_opp(&gpu->pdev->dev, opp);
202 	dev_pm_opp_set_opp(&gpu->pdev->dev, opp);
205 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu)
207 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
990 	struct msm_gpu *gpu = &adreno_gpu->base;
1025 	a6xx_gpu_sw_reset(gpu, true);
1028 static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu)
1033 	gpu_opp = dev_pm_opp_find_freq_exact(&gpu->pdev->dev, gpu_freq, true);
1038 	a6xx_gmu_set_freq(gpu, gpu_opp, false);
1042 static void a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu)
1047 	gpu_opp = dev_pm_opp_find_freq_exact(&gpu->pdev->dev, gpu_freq, true);
1051 	dev_pm_opp_set_opp(&gpu->pdev->dev, gpu_opp);
1058 	struct msm_gpu *gpu = &adreno_gpu->base;
1090 	a6xx_gmu_set_initial_bw(gpu, gmu);
1129 	a6xx_gmu_set_initial_freq(gpu, gmu);
1228 	struct msm_gpu *gpu = &a6xx_gpu->base.base;
1243 	dev_pm_opp_set_opp(&gpu->pdev->dev, NULL);
1541 	struct msm_gpu *gpu = &adreno_gpu->base;
1545 	ret = a6xx_gmu_rpmh_arc_votes_init(&gpu->pdev->dev, gmu->gx_arc_votes,
1628 	struct msm_gpu *gpu = &adreno_gpu->base;
1649 	gmu->nr_gpu_freqs = a6xx_gmu_build_freq_table(&gpu->pdev->dev,
1659 		gmu->nr_gpu_bws = a6xx_gmu_build_bw_table(&gpu->pdev->dev,
1671 	struct msm_gpu *gpu = &adreno_gpu->base;
1693 		opp = dev_pm_opp_find_freq_exact(&gpu->pdev->dev, freq, true);
1726 	ret = qmp_send(gmu->qmp, "{class: gpu, res: acd, val: %d}", !!cmd->enable_by_level);