Lines Matching +full:dsi +full:- +full:to +full:- +full:edp

5  + MDP3 - ?? seems to be what is on geeksphone peak device
6  + MDP4 - S3 (APQ8060, touchpad), S4-pro (APQ8064, nexus4 & ifc6410)
7  + MDP5 - snapdragon 800
10 maps to which part #)
12 Plus a handful of blocks around them for HDMI/DSI/etc output.
18 But, HDMI/DSI/etc blocks seem like they can be shared across multiple
19 display controller blocks.  And I for sure don't want to have to deal
20 with N different kms devices from xf86-video-freedreno.  Plus, it
21 seems like we can do some clever tricks like use GPU to trigger
23 up gpu cmdstream to update scanout and write FLUSH register after).
27 And one or more 'struct msm_gpu' for the various different gpu sub-
31 driver, and not exposing any custom ioctls to userspace for now.)
38   plane   -> PIPE{RGBn,VGn}              \
39   crtc    -> OVLP{n} + DMA{P,S,E} (??)   |-> MDP "device"
40   encoder -> DTV/LCDC/DSI (within MDP4)  /
41   connector -> HDMI/DSI/etc              --> other device(s)
51   plane   -> PIPE{RGBn,VIGn}             \
52   crtc    -> LM (layer mixer)            |-> MDP "device"
53   encoder -> INTF                        /
54   connector -> HDMI/DSI/eDP/etc          --> other device(s)
57 than needing a different implementation for DTV, DSI, etc.  (Ie. the
60 Also unlike MDP4, with MDP5 all the IRQs for other blocks (HDMI, DSI,
64 which blocks need to be allocated to the active pipes based on fetch
70 (ie. like DT super-node.. but I don't have any snapdragon hw yet that
73 Note that so far I've not been able to get any docs on the hw, and it
74 seems that access to such docs would prevent me from working on the
76 names (I had to invent a few, since no sufficient hint was given in
82   (the mdp4/hdmi/dsi directories)
84 These files are used both for a parser tool (in the same tree) to
86 driver, and this driver with register logging enabled), as well as to