Lines Matching refs:frac

491 				      unsigned int frac, unsigned int od1,  in meson_hdmi_pll_set_params()  argument
498 if (frac) in meson_hdmi_pll_set_params()
500 0x00004000 | frac); in meson_hdmi_pll_set_params()
519 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, 0x800cb000 | frac); in meson_hdmi_pll_set_params()
542 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL2, frac); in meson_hdmi_pll_set_params()
547 if (frac < 0x10000) { in meson_hdmi_pll_set_params()
643 unsigned int frac; in meson_hdmi_pll_get_frac() local
659 frac = div_u64((u64)pll_freq * (u64)frac_max, parent_freq); in meson_hdmi_pll_get_frac()
661 if (frac_m > frac) in meson_hdmi_pll_get_frac()
663 frac -= frac_m; in meson_hdmi_pll_get_frac()
665 return min((u16)frac, (u16)(frac_max - 1)); in meson_hdmi_pll_get_frac()
670 unsigned int frac) in meson_hdmi_pll_validate_params() argument
676 if (frac >= HDMI_FRAC_MAX_GXBB) in meson_hdmi_pll_validate_params()
683 if (frac >= HDMI_FRAC_MAX_GXL) in meson_hdmi_pll_validate_params()
689 if (frac >= HDMI_FRAC_MAX_G12A) in meson_hdmi_pll_validate_params()
699 unsigned int *frac, in meson_hdmi_pll_find_params() argument
707 *frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od); in meson_hdmi_pll_find_params()
710 freq, *m, *frac, *od); in meson_hdmi_pll_find_params()
712 if (meson_hdmi_pll_validate_params(priv, *m, *frac)) in meson_hdmi_pll_find_params()
723 unsigned int od, m, frac; in meson_vclk_dmt_supported_freq() local
735 if (meson_hdmi_pll_find_params(priv, freq, &m, &frac, &od)) in meson_vclk_dmt_supported_freq()
746 unsigned int od, m, frac, od1, od2, od3; in meson_hdmi_pll_generic_set() local
748 if (meson_hdmi_pll_find_params(priv, pll_freq, &m, &frac, &od)) { in meson_hdmi_pll_generic_set()
760 pll_freq, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
762 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_hdmi_pll_generic_set()
814 unsigned int m = 0, frac = 0; in meson_vclk_set() local
831 frac = vic_alternate_clock ? 0xd02 : 0xe00; in meson_vclk_set()
835 frac = vic_alternate_clock ? 0xe8f : 0; in meson_vclk_set()
839 frac = vic_alternate_clock ? 0xa05 : 0xc00; in meson_vclk_set()
843 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_vclk_set()
849 frac = vic_alternate_clock ? 0x281 : 0x300; in meson_vclk_set()
853 frac = vic_alternate_clock ? 0x347 : 0; in meson_vclk_set()
857 frac = vic_alternate_clock ? 0x102 : 0x200; in meson_vclk_set()
861 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_vclk_set()
866 frac = vic_alternate_clock ? 0x140b4 : 0x18000; in meson_vclk_set()
870 frac = vic_alternate_clock ? 0x1a3ee : 0; in meson_vclk_set()
874 frac = vic_alternate_clock ? 0x8148 : 0x10000; in meson_vclk_set()
878 meson_hdmi_pll_set_params(priv, m, frac, od1, od2, od3); in meson_vclk_set()