Lines Matching +full:mt8173 +full:- +full:hdmi

1 // SPDX-License-Identifier: GPL-2.0-only
67 writel(readl(ddc->regs + offset) | val, ddc->regs + offset);
73 writel(readl(ddc->regs + offset) & ~val, ddc->regs + offset);
79 return (readl(ddc->regs + offset) & val) == val;
88 tmp = readl(ddc->regs + offset);
91 writel(tmp, ddc->regs + offset);
98 return (readl(ddc->regs + offset) & mask) >> shift;
108 readl_poll_timeout(ddc->regs + DDC_DDCMCTL1, val,
114 struct device *dev = ddc->adap.dev.parent;
121 sif_write_mask(ddc, DDC_DDCMD0, 0xff, 0, (msg->addr << 1) | 0x01);
129 return -ENXIO;
132 remain_count = msg->len;
133 ack_count = (msg->len - 1) / 8;
140 ack_count--;
147 DDCM_PGLEN_OFFSET, read_count - 1);
157 if (((ack_final == 1) && (temp_count != (read_count - 1))) ||
163 for (i = read_count; i >= 1; i--) {
169 shift = (i - 5) * 8;
172 shift = (i - 1) * 8;
175 msg->buf[index + i - 1] = sif_read_mask(ddc, offset,
180 remain_count -= read_count;
189 struct device *dev = ddc->adap.dev.parent;
193 sif_write_mask(ddc, DDC_DDCMD0, DDCM_DATA0, 0, msg->addr << 1);
194 sif_write_mask(ddc, DDC_DDCMD0, DDCM_DATA1, 8, msg->buf[0]);
204 return -EIO;
213 struct mtk_hdmi_ddc *ddc = adapter->algo_data;
214 struct device *dev = adapter->dev.parent;
220 return -EINVAL;
229 return -EBUSY;
239 msg->addr, msg->flags, msg->len);
241 if (msg->flags & I2C_M_RD)
271 struct device *dev = &pdev->dev;
278 return -ENOMEM;
280 ddc->clk = devm_clk_get(dev, "ddc-i2c");
281 if (IS_ERR(ddc->clk))
282 return dev_err_probe(dev, PTR_ERR(ddc->clk),
285 ddc->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem);
286 if (IS_ERR(ddc->regs))
287 return PTR_ERR(ddc->regs);
289 ret = clk_prepare_enable(ddc->clk);
293 strscpy(ddc->adap.name, "mediatek-hdmi-ddc", sizeof(ddc->adap.name));
294 ddc->adap.owner = THIS_MODULE;
295 ddc->adap.algo = &mtk_hdmi_ddc_algorithm;
296 ddc->adap.retries = 3;
297 ddc->adap.dev.of_node = dev->of_node;
298 ddc->adap.algo_data = ddc;
299 ddc->adap.dev.parent = &pdev->dev;
301 ret = i2c_add_adapter(&ddc->adap);
303 clk_disable_unprepare(ddc->clk);
309 dev_dbg(dev, "ddc->adap: %p\n", &ddc->adap);
310 dev_dbg(dev, "ddc->clk: %p\n", ddc->clk);
311 dev_dbg(dev, "physical adr: %pa, end: %pa\n", &mem->start,
312 &mem->end);
321 i2c_del_adapter(&ddc->adap);
322 clk_disable_unprepare(ddc->clk);
326 { .compatible = "mediatek,mt8173-hdmi-ddc", },
335 .name = "mediatek-hdmi-ddc",
342 MODULE_DESCRIPTION("MediaTek HDMI DDC Driver");