Lines Matching +full:mt8173 +full:- +full:disp
1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/dma-mapping.h>
50 if (info->num_planes != 1)
51 return ERR_PTR(-EINVAL);
326 .min_width = 2, /* 2-pixel align when ethdr is bypassed */
335 { .compatible = "mediatek,mt2701-mmsys",
337 { .compatible = "mediatek,mt7623-mmsys",
339 { .compatible = "mediatek,mt2712-mmsys",
341 { .compatible = "mediatek,mt8167-mmsys",
343 { .compatible = "mediatek,mt8173-mmsys",
345 { .compatible = "mediatek,mt8183-mmsys",
347 { .compatible = "mediatek,mt8186-mmsys",
349 { .compatible = "mediatek,mt8188-vdosys0",
351 { .compatible = "mediatek,mt8188-vdosys1",
353 { .compatible = "mediatek,mt8192-mmsys",
355 { .compatible = "mediatek,mt8195-mmsys",
357 { .compatible = "mediatek,mt8195-vdosys0",
359 { .compatible = "mediatek,mt8195-vdosys1",
361 { .compatible = "mediatek,mt8365-mmsys",
369 if (!strncmp(dev_name(dev), "mediatek-drm", sizeof("mediatek-drm") - 1))
379 struct device_node *phandle = dev->parent->of_node;
386 for_each_child_of_node(phandle->parent, node) {
397 drm_dev = device_find_child(&pdev->dev, NULL, mtk_drm_match);
405 if (temp_drm_priv->data->main_len)
407 else if (temp_drm_priv->data->ext_len)
409 else if (temp_drm_priv->data->third_len)
412 if (temp_drm_priv->mtk_drm_bound)
421 if (drm_priv->data->mmsys_dev_num == cnt) {
424 all_drm_priv[j]->all_drm_private[i] = all_drm_priv[i];
434 const struct mtk_mmsys_driver_data *drv_data = private->data;
437 if (drv_data->main_path)
438 for (i = 0; i < drv_data->main_len; i++)
439 if (drv_data->main_path[i] == comp_id)
442 if (drv_data->ext_path)
443 for (i = 0; i < drv_data->ext_len; i++)
444 if (drv_data->ext_path[i] == comp_id)
447 if (drv_data->third_path)
448 for (i = 0; i < drv_data->third_len; i++)
449 if (drv_data->third_path[i] == comp_id)
452 if (drv_data->num_conn_routes)
453 for (i = 0; i < drv_data->num_conn_routes; i++)
454 if (drv_data->conn_routes[i].route_ddp == comp_id)
462 struct mtk_drm_private *private = drm->dev_private;
469 return -ENODEV;
475 drm->mode_config.min_width = 64;
476 drm->mode_config.min_height = 64;
483 drm->mode_config.max_width = 4096;
484 drm->mode_config.max_height = 4096;
485 drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
486 drm->mode_config.helper_private = &mtk_drm_mode_config_helpers;
488 for (i = 0; i < private->data->mmsys_dev_num; i++) {
489 drm->dev_private = private->all_drm_private[i];
490 ret = component_bind_all(private->all_drm_private[i]->dev, drm);
492 while (--i >= 0)
493 component_unbind_all(private->all_drm_private[i]->dev, drm);
507 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
514 for (j = 0; j < private->data->mmsys_dev_num; j++) {
515 priv_n = private->all_drm_private[j];
517 if (priv_n->data->max_width)
518 drm->mode_config.max_width = priv_n->data->max_width;
520 if (priv_n->data->min_width)
521 drm->mode_config.min_width = priv_n->data->min_width;
523 if (priv_n->data->min_height)
524 drm->mode_config.min_height = priv_n->data->min_height;
526 if (i == CRTC_MAIN && priv_n->data->main_len) {
527 ret = mtk_crtc_create(drm, priv_n->data->main_path,
528 priv_n->data->main_len, j,
529 priv_n->data->conn_routes,
530 priv_n->data->num_conn_routes);
535 } else if (i == CRTC_EXT && priv_n->data->ext_len) {
536 ret = mtk_crtc_create(drm, priv_n->data->ext_path,
537 priv_n->data->ext_len, j, NULL, 0);
542 } else if (i == CRTC_THIRD && priv_n->data->third_len) {
543 ret = mtk_crtc_create(drm, priv_n->data->third_path,
544 priv_n->data->third_len, j, NULL, 0);
554 drm->mode_config.cursor_width = 512;
555 drm->mode_config.cursor_height = 512;
562 ret = -ENODEV;
563 dev_err(drm->dev, "Need at least one OVL device\n");
567 for (i = 0; i < private->data->mmsys_dev_num; i++)
568 private->all_drm_private[i]->dma_dev = dma_dev;
586 for (i = 0; i < private->data->mmsys_dev_num; i++)
587 component_unbind_all(private->all_drm_private[i]->dev, drm);
597 component_unbind_all(drm->dev, drm);
604 * not dev->dev, as drm_gem_prime_import() expects.
609 struct mtk_drm_private *private = dev->dev_private;
611 return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
642 pdev = of_find_device_by_node(private->mutex_node);
644 dev_err(dev, "Waiting for disp-mutex device %pOF\n",
645 private->mutex_node);
646 of_node_put(private->mutex_node);
647 return -EPROBE_DEFER;
650 private->mutex_dev = &pdev->dev;
651 private->mtk_drm_bound = true;
652 private->dev = dev;
663 private->drm_master = true;
664 drm->dev_private = private;
665 for (i = 0; i < private->data->mmsys_dev_num; i++)
666 private->all_drm_private[i]->drm = drm;
683 private->drm = NULL;
685 for (i = 0; i < private->data->mmsys_dev_num; i++)
686 private->all_drm_private[i]->drm = NULL;
688 for (i = 0; i < private->data->mmsys_dev_num; i++) {
690 put_device(private->all_drm_private[i]->dev);
692 put_device(private->mutex_dev);
702 if (private->drm_master) {
703 drm_dev_unregister(private->drm);
704 mtk_drm_kms_deinit(private->drm);
705 drm_dev_put(private->drm);
707 for (i = 0; i < private->data->mmsys_dev_num; i++) {
709 put_device(private->all_drm_private[i]->dev);
711 put_device(private->mutex_dev);
713 private->mtk_drm_bound = false;
714 private->drm_master = false;
715 private->drm = NULL;
724 { .compatible = "mediatek,mt8167-disp-aal",
726 { .compatible = "mediatek,mt8173-disp-aal",
728 { .compatible = "mediatek,mt8183-disp-aal",
730 { .compatible = "mediatek,mt8192-disp-aal",
732 { .compatible = "mediatek,mt8167-disp-ccorr",
734 { .compatible = "mediatek,mt8183-disp-ccorr",
736 { .compatible = "mediatek,mt8192-disp-ccorr",
738 { .compatible = "mediatek,mt2701-disp-color",
740 { .compatible = "mediatek,mt8167-disp-color",
742 { .compatible = "mediatek,mt8173-disp-color",
744 { .compatible = "mediatek,mt8167-disp-dither",
746 { .compatible = "mediatek,mt8183-disp-dither",
748 { .compatible = "mediatek,mt8195-disp-dsc",
750 { .compatible = "mediatek,mt8167-disp-gamma",
752 { .compatible = "mediatek,mt8173-disp-gamma",
754 { .compatible = "mediatek,mt8183-disp-gamma",
756 { .compatible = "mediatek,mt8195-disp-gamma",
758 { .compatible = "mediatek,mt8195-disp-merge",
760 { .compatible = "mediatek,mt2701-disp-mutex",
762 { .compatible = "mediatek,mt2712-disp-mutex",
764 { .compatible = "mediatek,mt8167-disp-mutex",
766 { .compatible = "mediatek,mt8173-disp-mutex",
768 { .compatible = "mediatek,mt8183-disp-mutex",
770 { .compatible = "mediatek,mt8186-disp-mutex",
772 { .compatible = "mediatek,mt8188-disp-mutex",
774 { .compatible = "mediatek,mt8192-disp-mutex",
776 { .compatible = "mediatek,mt8195-disp-mutex",
778 { .compatible = "mediatek,mt8365-disp-mutex",
780 { .compatible = "mediatek,mt8173-disp-od",
782 { .compatible = "mediatek,mt2701-disp-ovl",
784 { .compatible = "mediatek,mt8167-disp-ovl",
786 { .compatible = "mediatek,mt8173-disp-ovl",
788 { .compatible = "mediatek,mt8183-disp-ovl",
790 { .compatible = "mediatek,mt8192-disp-ovl",
792 { .compatible = "mediatek,mt8195-disp-ovl",
794 { .compatible = "mediatek,mt8183-disp-ovl-2l",
796 { .compatible = "mediatek,mt8192-disp-ovl-2l",
798 { .compatible = "mediatek,mt8192-disp-postmask",
800 { .compatible = "mediatek,mt2701-disp-pwm",
802 { .compatible = "mediatek,mt8167-disp-pwm",
804 { .compatible = "mediatek,mt8173-disp-pwm",
806 { .compatible = "mediatek,mt2701-disp-rdma",
808 { .compatible = "mediatek,mt8167-disp-rdma",
810 { .compatible = "mediatek,mt8173-disp-rdma",
812 { .compatible = "mediatek,mt8183-disp-rdma",
814 { .compatible = "mediatek,mt8195-disp-rdma",
816 { .compatible = "mediatek,mt8173-disp-ufoe",
818 { .compatible = "mediatek,mt8173-disp-wdma",
820 { .compatible = "mediatek,mt2701-dpi",
822 { .compatible = "mediatek,mt8167-dsi",
824 { .compatible = "mediatek,mt8173-dpi",
826 { .compatible = "mediatek,mt8183-dpi",
828 { .compatible = "mediatek,mt8186-dpi",
830 { .compatible = "mediatek,mt8188-dp-intf",
832 { .compatible = "mediatek,mt8192-dpi",
834 { .compatible = "mediatek,mt8195-dp-intf",
836 { .compatible = "mediatek,mt8195-dpi",
838 { .compatible = "mediatek,mt2701-dsi",
840 { .compatible = "mediatek,mt8173-dsi",
842 { .compatible = "mediatek,mt8183-dsi",
844 { .compatible = "mediatek,mt8186-dsi",
846 { .compatible = "mediatek,mt8188-dsi",
856 return -EINVAL;
858 *ctype = (enum mtk_ddp_comp_type)((uintptr_t)of_id->data);
873 return -ENOENT;
878 return -EINVAL;
888 return -ENODEV;
910 * mtk_drm_of_ddp_path_build_one - Build a Display HW Pipeline for a CRTC Path
911 * @dev: The mediatek-drm device
917 * on the board-specific desired display configuration; this function walks
922 * * %0 - Display HW Pipeline successfully built and validated
923 * * %-ENOENT - Display pipeline was not specified in device tree
924 * * %-EINVAL - Display pipeline built but validation failed
925 * * %-ENOMEM - Failure to allocate pipeline array to pass to the caller
931 struct device_node *next = NULL, *prev, *vdo = dev->parent->of_node;
956 * Walk through port outputs until we reach the last valid mediatek-drm component.
979 idx--;
987 if (ret == -ENODEV)
991 switch (temp_path[idx - 1]) {
1003 temp_path[idx - 1], ret);
1004 return -EINVAL;
1009 return -ENOMEM;
1036 ret = dev_err_probe(dev, -EINVAL,
1051 &data->main_path, &data->main_len);
1052 if (ret && ret != -ENODEV)
1058 &data->ext_path, &data->ext_len);
1059 if (ret && ret != -ENODEV)
1065 &data->third_path, &data->third_len);
1066 if (ret && ret != -ENODEV)
1075 struct device *dev = &pdev->dev;
1076 struct device_node *phandle = dev->parent->of_node;
1088 return -ENOMEM;
1090 private->mmsys_dev = dev->parent;
1091 if (!private->mmsys_dev) {
1093 return -ENODEV;
1098 return -ENODEV;
1100 mtk_drm_data = (struct mtk_mmsys_driver_data *)of_id->data;
1102 return -EINVAL;
1107 mtk_drm_data->mmsys_id);
1108 private->data = devm_kmemdup(dev, mtk_drm_data,
1110 if (!private->data)
1111 return -ENOMEM;
1113 ret = mtk_drm_of_ddp_path_build(dev, phandle, private->data);
1118 dev_dbg(dev, "Using hardcoded paths for MMSYS %u\n", mtk_drm_data->mmsys_id);
1119 private->data = mtk_drm_data;
1122 private->all_drm_private = devm_kmalloc_array(dev, private->data->mmsys_dev_num,
1123 sizeof(*private->all_drm_private),
1125 if (!private->all_drm_private)
1126 return -ENOMEM;
1130 ovl_adaptor = platform_device_register_data(dev, "mediatek-disp-ovl-adaptor",
1132 (void *)private->mmsys_dev,
1133 sizeof(*private->mmsys_dev));
1134 private->ddp_comp[DDP_COMPONENT_DRM_OVL_ADAPTOR].dev = &ovl_adaptor->dev;
1135 mtk_ddp_comp_init(NULL, &private->ddp_comp[DDP_COMPONENT_DRM_OVL_ADAPTOR],
1137 component_match_add(dev, &match, compare_dev, &ovl_adaptor->dev);
1140 /* Iterate over sibling DISP function blocks */
1141 for_each_child_of_node(phandle->parent, node) {
1159 if (id < 0 || id == private->data->mmsys_id) {
1160 private->mutex_node = of_node_get(node);
1161 dev_dbg(dev, "get mutex for mmsys %d", private->data->mmsys_id);
1176 private->comp_node[comp_id] = of_node_get(node);
1201 ret = mtk_ddp_comp_init(node, &private->ddp_comp[comp_id], comp_id);
1208 if (!private->mutex_node) {
1209 dev_err(dev, "Failed to find disp-mutex node\n");
1210 ret = -ENODEV;
1227 of_node_put(private->mutex_node);
1229 of_node_put(private->comp_node[i]);
1238 component_master_del(&pdev->dev, &mtk_drm_ops);
1239 pm_runtime_disable(&pdev->dev);
1240 of_node_put(private->mutex_node);
1242 of_node_put(private->comp_node[i]);
1249 drm_atomic_helper_shutdown(private->drm);
1255 struct drm_device *drm = private->drm;
1257 if (private->drm_master)
1266 struct drm_device *drm = private->drm;
1269 if (private->drm_master)
1285 .name = "mediatek-drm",