1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/mediatek/mtk-cmdq.h>
87 	if (priv->mute_support)  in mtk_merge_start_cmdq()
88 		mtk_ddp_write(cmdq_pkt, 0x0, &priv->cmdq_reg, priv->regs,  in mtk_merge_start_cmdq()
91 	mtk_ddp_write(cmdq_pkt, 1, &priv->cmdq_reg, priv->regs,  in mtk_merge_start_cmdq()
99 	if (priv->mute_support)  in mtk_merge_stop_cmdq()
100 		mtk_ddp_write(cmdq_pkt, 0x1, &priv->cmdq_reg, priv->regs,  in mtk_merge_stop_cmdq()
103 	mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs,  in mtk_merge_stop_cmdq()
106 	if (!cmdq_pkt && priv->async_clk)  in mtk_merge_stop_cmdq()
107 		reset_control_reset(priv->reset_ctl);  in mtk_merge_stop_cmdq()
114 		      &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_36);  in mtk_merge_fifo_setting()
117 			   &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_37,  in mtk_merge_fifo_setting()
121 			   &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_40,  in mtk_merge_fifo_setting()
125 			   &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CFG_41,  in mtk_merge_fifo_setting()
148 	if (priv->fifo_en) {  in mtk_merge_advance_config()
156 	mtk_ddp_write(cmdq_pkt, h << 16 | l_w, &priv->cmdq_reg, priv->regs,  in mtk_merge_advance_config()
158 	mtk_ddp_write(cmdq_pkt, h << 16 | r_w, &priv->cmdq_reg, priv->regs,  in mtk_merge_advance_config()
160 	mtk_ddp_write(cmdq_pkt, h << 16 | (l_w + r_w), &priv->cmdq_reg, priv->regs,  in mtk_merge_advance_config()
170 	mtk_ddp_write(cmdq_pkt, h << 16 | l_w, &priv->cmdq_reg, priv->regs,  in mtk_merge_advance_config()
173 		mtk_ddp_write(cmdq_pkt, h << 16 | r_w, &priv->cmdq_reg, priv->regs,  in mtk_merge_advance_config()
176 		mtk_ddp_write(cmdq_pkt, h << 16 | l_w, &priv->cmdq_reg, priv->regs,  in mtk_merge_advance_config()
183 	mtk_ddp_write(cmdq_pkt, h << 16 | l_w, &priv->cmdq_reg, priv->regs,  in mtk_merge_advance_config()
185 	mtk_ddp_write(cmdq_pkt, h << 16 | r_w, &priv->cmdq_reg, priv->regs,  in mtk_merge_advance_config()
188 	mtk_ddp_write_mask(cmdq_pkt, SWAP_MODE, &priv->cmdq_reg, priv->regs,  in mtk_merge_advance_config()
190 	mtk_ddp_write_mask(cmdq_pkt, mode, &priv->cmdq_reg, priv->regs,  in mtk_merge_advance_config()
199 	ret = clk_prepare_enable(priv->clk);  in mtk_merge_clk_enable()
205 	ret = clk_prepare_enable(priv->async_clk);  in mtk_merge_clk_enable()
207 		/* should clean up the state of priv->clk */  in mtk_merge_clk_enable()
208 		clk_disable_unprepare(priv->clk);  in mtk_merge_clk_enable()
221 	clk_disable_unprepare(priv->async_clk);  in mtk_merge_clk_disable()
222 	clk_disable_unprepare(priv->clk);  in mtk_merge_clk_disable()
229 	unsigned long rate;  in mtk_merge_mode_valid()  local
231 	rate = clk_get_rate(priv->clk);  in mtk_merge_mode_valid()
233 	/* Convert to KHz and round the number */  in mtk_merge_mode_valid()
234 	rate = (rate + 500) / 1000;  in mtk_merge_mode_valid()
236 	if (rate && mode->clock > rate) {  in mtk_merge_mode_valid()
237 		dev_dbg(dev, "invalid clock: %d (>%lu)\n", mode->clock, rate);  in mtk_merge_mode_valid()
252 	 * data rate = prefetch size / duration  in mtk_merge_mode_valid()
257 	 * Say 4K60 (CEA-861) is the maximum mode supported by the SoC  in mtk_merge_mode_valid()
258 	 * data rate = 594000K * N / 72 = 8250 (standard)  in mtk_merge_mode_valid()
262 	 * data rate = 583600 / 17 ~= 34329 > 8250 (NG)  in mtk_merge_mode_valid()
265 	 * data rate = 497760 / 77 ~= 6464 < 8250 (OK)  in mtk_merge_mode_valid()
267 	 * A non-standard 4K60 timing (clk=521280K, vbp=54)  in mtk_merge_mode_valid()
268 	 * data rate = 521280 / 54 ~= 9653 > 8250 (NG)  in mtk_merge_mode_valid()
275 	 * if the data rate requirement is too high (directly proportional to  in mtk_merge_mode_valid()
279 	rate = mode->clock / (mode->vtotal - mode->vsync_end);  in mtk_merge_mode_valid()
281 	if (rate > 8250) {  in mtk_merge_mode_valid()
282 		dev_dbg(dev, "invalid rate: %lu (>8250): " DRM_MODE_FMT "\n",  in mtk_merge_mode_valid()
283 			rate, DRM_MODE_ARG(mode));  in mtk_merge_mode_valid()
308 	struct device *dev = &pdev->dev;  in mtk_disp_merge_probe()
315 		return -ENOMEM;  in mtk_disp_merge_probe()
318 	priv->regs = devm_ioremap_resource(dev, res);  in mtk_disp_merge_probe()
319 	if (IS_ERR(priv->regs))  in mtk_disp_merge_probe()
320 		return dev_err_probe(dev, PTR_ERR(priv->regs),  in mtk_disp_merge_probe()
323 	priv->clk = devm_clk_get(dev, NULL);  in mtk_disp_merge_probe()
324 	if (IS_ERR(priv->clk))  in mtk_disp_merge_probe()
325 		return dev_err_probe(dev, PTR_ERR(priv->clk),  in mtk_disp_merge_probe()
328 	priv->async_clk = devm_clk_get_optional(dev, "merge_async");  in mtk_disp_merge_probe()
329 	if (IS_ERR(priv->async_clk))  in mtk_disp_merge_probe()
330 		return dev_err_probe(dev, PTR_ERR(priv->async_clk),  in mtk_disp_merge_probe()
333 	if (priv->async_clk) {  in mtk_disp_merge_probe()
334 		priv->reset_ctl = devm_reset_control_get_optional_exclusive(dev, NULL);  in mtk_disp_merge_probe()
335 		if (IS_ERR(priv->reset_ctl))  in mtk_disp_merge_probe()
336 			return PTR_ERR(priv->reset_ctl);  in mtk_disp_merge_probe()
340 	ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);  in mtk_disp_merge_probe()
342 		dev_dbg(dev, "get mediatek,gce-client-reg fail!\n");  in mtk_disp_merge_probe()
345 	priv->fifo_en = of_property_read_bool(dev->of_node,  in mtk_disp_merge_probe()
346 					      "mediatek,merge-fifo-en");  in mtk_disp_merge_probe()
348 	priv->mute_support = of_property_read_bool(dev->of_node,  in mtk_disp_merge_probe()
349 						   "mediatek,merge-mute");  in mtk_disp_merge_probe()
361 	component_del(&pdev->dev, &mtk_disp_merge_component_ops);  in mtk_disp_merge_remove()
365 	{ .compatible = "mediatek,mt8195-disp-merge", },
375 		.name = "mediatek-disp-merge",