1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/soc/mediatek/mtk-cmdq.h>
75 		cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys,  in mtk_ddp_write()
76 			       cmdq_reg->offset + offset, value);  in mtk_ddp_write()
88 		cmdq_pkt_write(cmdq_pkt, cmdq_reg->subsys,  in mtk_ddp_write_relaxed()
89 			       cmdq_reg->offset + offset, value);  in mtk_ddp_write_relaxed()
101 		cmdq_pkt_write_mask(cmdq_pkt, cmdq_reg->subsys,  in mtk_ddp_write_mask()
102 				    cmdq_reg->offset + offset, value, mask);  in mtk_ddp_write_mask()
118 	return clk_prepare_enable(priv->clk);  in mtk_ddp_clk_enable()
125 	clk_disable_unprepare(priv->clk);  in mtk_ddp_clk_disable()
140 			      DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) |  in mtk_dither_set_common()
141 			      DITHER_ADD_LSHIFT_R(MTK_MAX_BPC - bpc) |  in mtk_dither_set_common()
145 			      DITHER_LSB_ERR_SHIFT_B(MTK_MAX_BPC - bpc) |  in mtk_dither_set_common()
146 			      DITHER_ADD_LSHIFT_B(MTK_MAX_BPC - bpc) |  in mtk_dither_set_common()
147 			      DITHER_LSB_ERR_SHIFT_G(MTK_MAX_BPC - bpc) |  in mtk_dither_set_common()
148 			      DITHER_ADD_LSHIFT_G(MTK_MAX_BPC - bpc),  in mtk_dither_set_common()
160 	mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs, DISP_REG_DITHER_SIZE);  in mtk_dither_config()
161 	mtk_ddp_write(cmdq_pkt, DITHER_RELAY_MODE, &priv->cmdq_reg, priv->regs,  in mtk_dither_config()
163 	mtk_dither_set_common(priv->regs, &priv->cmdq_reg, bpc, DISP_REG_DITHER_CFG,  in mtk_dither_config()
171 	writel(DITHER_EN, priv->regs + DISP_REG_DITHER_EN);  in mtk_dither_start()
178 	writel_relaxed(0x0, priv->regs + DISP_REG_DITHER_EN);  in mtk_dither_stop()
186 	mtk_dither_set_common(priv->regs, &priv->cmdq_reg, bpc, cfg,  in mtk_dither_set()
197 	mtk_ddp_write_mask(cmdq_pkt, DSC_BYPASS, &priv->cmdq_reg, priv->regs,  in mtk_dsc_config()
199 	mtk_ddp_write_mask(cmdq_pkt, DSC_UFOE_SEL, &priv->cmdq_reg, priv->regs,  in mtk_dsc_config()
201 	mtk_ddp_write_mask(cmdq_pkt, DSC_DUAL_INOUT, &priv->cmdq_reg, priv->regs,  in mtk_dsc_config()
210 	mtk_ddp_write_mask(NULL, DSC_EN, &priv->cmdq_reg, priv->regs, DISP_REG_DSC_CON, DSC_EN);  in mtk_dsc_start()
217 	writel_relaxed(0x0, priv->regs + DISP_REG_DSC_CON);  in mtk_dsc_stop()
226 	mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs, DISP_REG_OD_SIZE);  in mtk_od_config()
227 	mtk_ddp_write(cmdq_pkt, OD_RELAYMODE, &priv->cmdq_reg, priv->regs, DISP_REG_OD_CFG);  in mtk_od_config()
235 	writel(1, priv->regs + DISP_REG_OD_EN);  in mtk_od_start()
244 	mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs,  in mtk_postmask_config()
246 	mtk_ddp_write(cmdq_pkt, POSTMASK_RELAY_MODE, &priv->cmdq_reg,  in mtk_postmask_config()
247 		      priv->regs, DISP_REG_POSTMASK_CFG);  in mtk_postmask_config()
254 	writel(POSTMASK_EN, priv->regs + DISP_REG_POSTMASK_EN);  in mtk_postmask_start()
261 	writel_relaxed(0x0, priv->regs + DISP_REG_POSTMASK_EN);  in mtk_postmask_stop()
268 	writel(UFO_BYPASS, priv->regs + DISP_REG_UFO_START);  in mtk_ufoe_start()
439 	[MTK_DISP_OVL_2L] = "ovl-2l",
446 	[MTK_DP_INTF] = "dp-intf",
528 		return -EINVAL;  in mtk_ddp_comp_find_in_route()
534 	return -ENODEV;  in mtk_ddp_comp_find_in_route()
570 	return -EINVAL;  in mtk_ddp_comp_get_id()
575 	struct mtk_drm_private *private = drm->dev_private;  in mtk_find_possible_crtcs()
581 	for (j = 0; j < private->data->mmsys_dev_num; j++) {  in mtk_find_possible_crtcs()
582 		priv_n = private->all_drm_private[j];  in mtk_find_possible_crtcs()
583 		data = priv_n->data;  in mtk_find_possible_crtcs()
585 		if (mtk_ddp_path_available(data->main_path, data->main_len,  in mtk_find_possible_crtcs()
586 					   priv_n->comp_node)) {  in mtk_find_possible_crtcs()
587 			if (mtk_ddp_comp_find(dev, data->main_path,  in mtk_find_possible_crtcs()
588 					      data->main_len,  in mtk_find_possible_crtcs()
589 					      priv_n->ddp_comp))  in mtk_find_possible_crtcs()
594 		if (mtk_ddp_path_available(data->ext_path, data->ext_len,  in mtk_find_possible_crtcs()
595 					   priv_n->comp_node)) {  in mtk_find_possible_crtcs()
596 			if (mtk_ddp_comp_find(dev, data->ext_path,  in mtk_find_possible_crtcs()
597 					      data->ext_len,  in mtk_find_possible_crtcs()
598 					      priv_n->ddp_comp))  in mtk_find_possible_crtcs()
603 		if (mtk_ddp_path_available(data->third_path, data->third_len,  in mtk_find_possible_crtcs()
604 					   priv_n->comp_node)) {  in mtk_find_possible_crtcs()
605 			if (mtk_ddp_comp_find(dev, data->third_path,  in mtk_find_possible_crtcs()
606 					      data->third_len,  in mtk_find_possible_crtcs()
607 					      priv_n->ddp_comp))  in mtk_find_possible_crtcs()
614 					 private->data->conn_routes,  in mtk_find_possible_crtcs()
615 					 private->data->num_conn_routes,  in mtk_find_possible_crtcs()
616 					 private->ddp_comp);  in mtk_find_possible_crtcs()
635 		return -EINVAL;  in mtk_ddp_comp_init()
639 	comp->id = comp_id;  in mtk_ddp_comp_init()
640 	comp->funcs = mtk_ddp_matches[comp_id].funcs;  in mtk_ddp_comp_init()
649 		DRM_INFO("Waiting for device %s\n", node->full_name);  in mtk_ddp_comp_init()
650 		return -EPROBE_DEFER;  in mtk_ddp_comp_init()
652 	comp->dev = &comp_pdev->dev;  in mtk_ddp_comp_init()
669 	priv = devm_kzalloc(comp->dev, sizeof(*priv), GFP_KERNEL);  in mtk_ddp_comp_init()
671 		return -ENOMEM;  in mtk_ddp_comp_init()
673 	priv->regs = of_iomap(node, 0);  in mtk_ddp_comp_init()
674 	priv->clk = of_clk_get(node, 0);  in mtk_ddp_comp_init()
675 	if (IS_ERR(priv->clk))  in mtk_ddp_comp_init()
676 		return PTR_ERR(priv->clk);  in mtk_ddp_comp_init()
679 	ret = cmdq_dev_get_client_reg(comp->dev, &priv->cmdq_reg, 0);  in mtk_ddp_comp_init()
681 		dev_dbg(comp->dev, "get mediatek,gce-client-reg fail!\n");  in mtk_ddp_comp_init()