Lines Matching defs:ldb

35 #define DRIVER_NAME "imx-ldb"
62 	struct imx_ldb *ldb;
97 	struct imx_ldb *ldb = imx_ldb_ch->ldb;
98 	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
105 			ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
107 			ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
111 			ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
114 			ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
120 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
125 	dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
126 			clk_get_rate(ldb->clk_pll[chno]), serial_clk);
127 	clk_set_rate(ldb->clk_pll[chno], serial_clk);
129 	dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
130 			clk_get_rate(ldb->clk_pll[chno]));
132 	dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
133 			clk_get_rate(ldb->clk[chno]),
135 	clk_set_rate(ldb->clk[chno], di_clk);
137 	dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
138 			clk_get_rate(ldb->clk[chno]));
141 	ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
143 		dev_err(ldb->dev,
151 	struct imx_ldb *ldb = imx_ldb_ch->ldb;
152 	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
155 	if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {
156 		dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);
161 		clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
162 		clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
164 		clk_prepare_enable(ldb->clk[0]);
165 		clk_prepare_enable(ldb->clk[1]);
167 		clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
170 	if (imx_ldb_ch == &ldb->channel[0] || dual) {
171 		ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
172 		if (mux == 0 || ldb->lvds_mux)
173 			ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
175 			ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
177 	if (imx_ldb_ch == &ldb->channel[1] || dual) {
178 		ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
179 		if (mux == 1 || ldb->lvds_mux)
180 			ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
182 			ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
185 	if (ldb->lvds_mux) {
188 		if (imx_ldb_ch == &ldb->channel[0])
189 			lvds_mux = &ldb->lvds_mux[0];
190 		else if (imx_ldb_ch == &ldb->channel[1])
191 			lvds_mux = &ldb->lvds_mux[1];
193 		regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
197 	regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
207 	struct imx_ldb *ldb = imx_ldb_ch->ldb;
208 	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
214 	if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {
215 		dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);
220 		dev_warn(ldb->dev,
224 		dev_warn(ldb->dev,
229 		dev_warn(ldb->dev,
235 		imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
236 		imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
239 		imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
244 	if (imx_ldb_ch == &ldb->channel[0] || dual) {
246 			ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
248 			ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
250 	if (imx_ldb_ch == &ldb->channel[1] || dual) {
252 			ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
254 			ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
270 	struct imx_ldb *ldb = imx_ldb_ch->ldb;
271 	int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
274 	if (imx_ldb_ch == &ldb->channel[0] || dual)
275 		ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
276 	if (imx_ldb_ch == &ldb->channel[1] || dual)
277 		ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
279 	regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
282 		clk_disable_unprepare(ldb->clk[0]);
283 		clk_disable_unprepare(ldb->clk[1]);
286 	if (ldb->lvds_mux) {
289 		if (imx_ldb_ch == &ldb->channel[0])
290 			lvds_mux = &ldb->lvds_mux[0];
291 		else if (imx_ldb_ch == &ldb->channel[1])
292 			lvds_mux = &ldb->lvds_mux[1];
294 		regmap_read(ldb->regmap, lvds_mux->reg, &mux);
298 		mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
302 	ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
304 		dev_err(ldb->dev,
353 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
358 	ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
359 	if (IS_ERR(ldb->clk[chno]))
360 		return PTR_ERR(ldb->clk[chno]);
363 	ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
365 	return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
371 	struct imx_ldb *ldb = imx_ldb_ch->ldb;
389 	ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
393 	if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
394 		ret = imx_ldb_get_clk(ldb, 1);
463  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
466  * entries (in this case fsl,imx53-ldb) need to be ordered last.
469 	{ .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
470 	{ .compatible = "fsl,imx53-ldb", .data = NULL, },
485 		if (!channel->ldb)
572 		channel->ldb = imx_ldb;