Lines Matching full:register

13 /* Register ROGUE_CR_RASTERISATION_INDIRECT */
19 /* Register ROGUE_CR_PBE_INDIRECT */
25 /* Register ROGUE_CR_PBE_PERF_INDIRECT */
31 /* Register ROGUE_CR_TPU_PERF_INDIRECT */
37 /* Register ROGUE_CR_RASTERISATION_PERF_INDIRECT */
43 /* Register ROGUE_CR_TPU_MCU_L0_PERF_INDIRECT */
49 /* Register ROGUE_CR_USC_PERF_INDIRECT */
55 /* Register ROGUE_CR_BLACKPEARL_INDIRECT */
61 /* Register ROGUE_CR_BLACKPEARL_PERF_INDIRECT */
67 /* Register ROGUE_CR_TEXAS3_PERF_INDIRECT */
73 /* Register ROGUE_CR_TEXAS_PERF_INDIRECT */
79 /* Register ROGUE_CR_BX_TU_PERF_INDIRECT */
85 /* Register ROGUE_CR_CLK_CTRL */
221 /* Register ROGUE_CR_CLK_STATUS */
335 /* Register ROGUE_CR_CORE_ID */
347 /* Register ROGUE_CR_CORE_ID */
355 /* Register ROGUE_CR_CORE_REVISION */
367 /* Register ROGUE_CR_DESIGNER_REV_FIELD1 */
373 /* Register ROGUE_CR_DESIGNER_REV_FIELD2 */
379 /* Register ROGUE_CR_CHANGESET_NUMBER */
385 /* Register ROGUE_CR_CLK_XTPLUS_CTRL */
444 /* Register ROGUE_CR_CLK_XTPLUS_STATUS */
492 /* Register ROGUE_CR_SOFT_RESET */
674 /* Register ROGUE_CR_SOFT_RESET2 */
716 /* Register ROGUE_CR_EVENT_STATUS */
830 /* Register ROGUE_CR_TIMER */
839 /* Register ROGUE_CR_TLA_STATUS */
852 /* Register ROGUE_CR_PM_PARTIAL_RENDER_ENABLE */
859 /* Register ROGUE_CR_SIDEKICK_IDLE */
884 /* Register ROGUE_CR_MARS_IDLE */
897 /* Register ROGUE_CR_VDM_CONTEXT_STORE_STATUS */
909 /* Register ROGUE_CR_VDM_CONTEXT_STORE_TASK0 */
917 /* Register ROGUE_CR_VDM_CONTEXT_STORE_TASK1 */
923 /* Register ROGUE_CR_VDM_CONTEXT_STORE_TASK2 */
931 /* Register ROGUE_CR_VDM_CONTEXT_RESUME_TASK0 */
939 /* Register ROGUE_CR_VDM_CONTEXT_RESUME_TASK1 */
945 /* Register ROGUE_CR_VDM_CONTEXT_RESUME_TASK2 */
953 /* Register ROGUE_CR_CDM_CONTEXT_STORE_STATUS */
963 /* Register ROGUE_CR_CDM_CONTEXT_PDS0 */
975 /* Register ROGUE_CR_CDM_CONTEXT_PDS1 */
1021 /* Register ROGUE_CR_CDM_TERMINATE_PDS */
1033 /* Register ROGUE_CR_CDM_TERMINATE_PDS1 */
1079 /* Register ROGUE_CR_CDM_CONTEXT_LOAD_PDS0 */
1091 /* Register ROGUE_CR_CDM_CONTEXT_LOAD_PDS1 */
1137 /* Register ROGUE_CR_MIPS_WRAPPER_CONFIG */
1161 /* Register ROGUE_CR_MIPS_ADDR_REMAP1_CONFIG1 */
1170 /* Register ROGUE_CR_MIPS_ADDR_REMAP1_CONFIG2 */
1183 /* Register ROGUE_CR_MIPS_ADDR_REMAP2_CONFIG1 */
1192 /* Register ROGUE_CR_MIPS_ADDR_REMAP2_CONFIG2 */
1205 /* Register ROGUE_CR_MIPS_ADDR_REMAP3_CONFIG1 */
1214 /* Register ROGUE_CR_MIPS_ADDR_REMAP3_CONFIG2 */
1227 /* Register ROGUE_CR_MIPS_ADDR_REMAP4_CONFIG1 */
1236 /* Register ROGUE_CR_MIPS_ADDR_REMAP4_CONFIG2 */
1249 /* Register ROGUE_CR_MIPS_ADDR_REMAP5_CONFIG1 */
1258 /* Register ROGUE_CR_MIPS_ADDR_REMAP5_CONFIG2 */
1271 /* Register ROGUE_CR_MIPS_ADDR_REMAP_UNMAPPED_STATUS */
1280 /* Register ROGUE_CR_MIPS_ADDR_REMAP_UNMAPPED_CLEAR */
1287 /* Register ROGUE_CR_MIPS_ADDR_REMAP_RANGE_CONFIG */
1316 /* Register ROGUE_CR_MIPS_ADDR_REMAP_RANGE_READ */
1325 /* Register ROGUE_CR_MIPS_ADDR_REMAP_RANGE_DATA */
1343 /* Register ROGUE_CR_MIPS_WRAPPER_IRQ_ENABLE */
1350 /* Register ROGUE_CR_MIPS_WRAPPER_IRQ_STATUS */
1357 /* Register ROGUE_CR_MIPS_WRAPPER_IRQ_CLEAR */
1364 /* Register ROGUE_CR_MIPS_WRAPPER_NMI_ENABLE */
1371 /* Register ROGUE_CR_MIPS_WRAPPER_NMI_EVENT */
1378 /* Register ROGUE_CR_MIPS_DEBUG_CONFIG */
1385 /* Register ROGUE_CR_MIPS_EXCEPTION_STATUS */
1407 /* Register ROGUE_CR_MIPS_WRAPPER_STATUS */
1413 /* Register ROGUE_CR_XPU_BROADCAST */
1419 /* Register ROGUE_CR_META_SP_MSLVDATAX */
1425 /* Register ROGUE_CR_META_SP_MSLVDATAT */
1431 /* Register ROGUE_CR_META_SP_MSLVCTRL0 */
1443 /* Register ROGUE_CR_META_SP_MSLVCTRL1 */
1478 /* Register ROGUE_CR_META_SP_MSLVHANDSHKE */
1486 /* Register ROGUE_CR_META_SP_MSLVT0KICK */
1492 /* Register ROGUE_CR_META_SP_MSLVT0KICKI */
1498 /* Register ROGUE_CR_META_SP_MSLVT1KICK */
1504 /* Register ROGUE_CR_META_SP_MSLVT1KICKI */
1510 /* Register ROGUE_CR_META_SP_MSLVT2KICK */
1516 /* Register ROGUE_CR_META_SP_MSLVT2KICKI */
1522 /* Register ROGUE_CR_META_SP_MSLVT3KICK */
1528 /* Register ROGUE_CR_META_SP_MSLVT3KICKI */
1534 /* Register ROGUE_CR_META_SP_MSLVRST */
1541 /* Register ROGUE_CR_META_SP_MSLVIRQSTATUS */
1551 /* Register ROGUE_CR_META_SP_MSLVIRQENABLE */
1561 /* Register ROGUE_CR_META_SP_MSLVIRQLEVEL */
1568 /* Register ROGUE_CR_MTS_SCHEDULE */
1601 /* Register ROGUE_CR_MTS_SCHEDULE1 */
1634 /* Register ROGUE_CR_MTS_SCHEDULE2 */
1667 /* Register ROGUE_CR_MTS_SCHEDULE3 */
1700 /* Register ROGUE_CR_MTS_SCHEDULE4 */
1733 /* Register ROGUE_CR_MTS_SCHEDULE5 */
1766 /* Register ROGUE_CR_MTS_SCHEDULE6 */
1799 /* Register ROGUE_CR_MTS_SCHEDULE7 */
1832 /* Register ROGUE_CR_MTS_BGCTX_THREAD0_DM_ASSOC */
1838 /* Register ROGUE_CR_MTS_BGCTX_THREAD1_DM_ASSOC */
1844 /* Register ROGUE_CR_MTS_INTCTX_THREAD0_DM_ASSOC */
1850 /* Register ROGUE_CR_MTS_INTCTX_THREAD1_DM_ASSOC */
1856 /* Register ROGUE_CR_MTS_GARTEN_WRAPPER_CONFIG */
1878 /* Register ROGUE_CR_MTS_DM0_INTERRUPT_ENABLE */
1884 /* Register ROGUE_CR_MTS_DM1_INTERRUPT_ENABLE */
1890 /* Register ROGUE_CR_MTS_DM2_INTERRUPT_ENABLE */
1896 /* Register ROGUE_CR_MTS_DM3_INTERRUPT_ENABLE */
1902 /* Register ROGUE_CR_MTS_DM4_INTERRUPT_ENABLE */
1908 /* Register ROGUE_CR_MTS_DM5_INTERRUPT_ENABLE */
1914 /* Register ROGUE_CR_MTS_INTCTX */
1928 /* Register ROGUE_CR_MTS_BGCTX */
1938 /* Register ROGUE_CR_MTS_BGCTX_COUNTED_SCHEDULE */
1958 /* Register ROGUE_CR_MTS_GPU_INT_STATUS */
1964 /* Register ROGUE_CR_MTS_SCHEDULE_ENABLE */
1970 /* Register ROGUE_CR_IRQ_OS0_EVENT_STATUS */
1977 /* Register ROGUE_CR_IRQ_OS0_EVENT_CLEAR */
1984 /* Register ROGUE_CR_IRQ_OS1_EVENT_STATUS */
1991 /* Register ROGUE_CR_IRQ_OS1_EVENT_CLEAR */
1998 /* Register ROGUE_CR_IRQ_OS2_EVENT_STATUS */
2005 /* Register ROGUE_CR_IRQ_OS2_EVENT_CLEAR */
2012 /* Register ROGUE_CR_IRQ_OS3_EVENT_STATUS */
2019 /* Register ROGUE_CR_IRQ_OS3_EVENT_CLEAR */
2026 /* Register ROGUE_CR_IRQ_OS4_EVENT_STATUS */
2033 /* Register ROGUE_CR_IRQ_OS4_EVENT_CLEAR */
2040 /* Register ROGUE_CR_IRQ_OS5_EVENT_STATUS */
2047 /* Register ROGUE_CR_IRQ_OS5_EVENT_CLEAR */
2054 /* Register ROGUE_CR_IRQ_OS6_EVENT_STATUS */
2061 /* Register ROGUE_CR_IRQ_OS6_EVENT_CLEAR */
2068 /* Register ROGUE_CR_IRQ_OS7_EVENT_STATUS */
2075 /* Register ROGUE_CR_IRQ_OS7_EVENT_CLEAR */
2082 /* Register ROGUE_CR_META_BOOT */
2089 /* Register ROGUE_CR_GARTEN_SLC */
2096 /* Register ROGUE_CR_PPP */
2120 /* Register ROGUE_CR_ISP_RENDER */
2150 /* Register ROGUE_CR_ISP_CTL */
2219 /* Register ROGUE_CR_ISP_STATUS */
2232 /* Register group: ROGUE_CR_ISP_XTP_RESUME, with 64 repeats */
2234 /* Register ROGUE_CR_ISP_XTP_RESUME0 */
2242 /* Register group: ROGUE_CR_ISP_XTP_STORE, with 32 repeats */
2244 /* Register ROGUE_CR_ISP_XTP_STORE0 */
2263 /* Register group: ROGUE_CR_BIF_CAT_BASE, with 8 repeats */
2265 /* Register ROGUE_CR_BIF_CAT_BASE0 */
2273 /* Register ROGUE_CR_BIF_CAT_BASE1 */
2281 /* Register ROGUE_CR_BIF_CAT_BASE2 */
2289 /* Register ROGUE_CR_BIF_CAT_BASE3 */
2297 /* Register ROGUE_CR_BIF_CAT_BASE4 */
2305 /* Register ROGUE_CR_BIF_CAT_BASE5 */
2313 /* Register ROGUE_CR_BIF_CAT_BASE6 */
2321 /* Register ROGUE_CR_BIF_CAT_BASE7 */
2329 /* Register ROGUE_CR_BIF_CAT_BASE_INDEX */
2349 /* Register ROGUE_CR_BIF_PM_CAT_BASE_VCE0 */
2363 /* Register ROGUE_CR_BIF_PM_CAT_BASE_TE0 */
2377 /* Register ROGUE_CR_BIF_PM_CAT_BASE_ALIST0 */
2391 /* Register ROGUE_CR_BIF_PM_CAT_BASE_VCE1 */
2405 /* Register ROGUE_CR_BIF_PM_CAT_BASE_TE1 */
2419 /* Register ROGUE_CR_BIF_PM_CAT_BASE_ALIST1 */
2433 /* Register ROGUE_CR_BIF_MMU_ENTRY_STATUS */
2443 /* Register ROGUE_CR_BIF_MMU_ENTRY */
2453 /* Register ROGUE_CR_BIF_CTRL_INVAL */
2469 /* Register ROGUE_CR_BIF_CTRL */
2504 /* Register ROGUE_CR_BIF_FAULT_BANK0_MMU_STATUS */
2523 /* Register ROGUE_CR_BIF_FAULT_BANK0_REQ_STATUS */
2546 /* Register ROGUE_CR_BIF_FAULT_BANK1_MMU_STATUS */
2565 /* Register ROGUE_CR_BIF_FAULT_BANK1_REQ_STATUS */
2580 /* Register ROGUE_CR_BIF_MMU_STATUS */
2603 /* Register group: ROGUE_CR_BIF_TILING_CFG, with 8 repeats */
2605 /* Register ROGUE_CR_BIF_TILING_CFG0 */
2622 /* Register ROGUE_CR_BIF_TILING_CFG1 */
2639 /* Register ROGUE_CR_BIF_TILING_CFG2 */
2656 /* Register ROGUE_CR_BIF_TILING_CFG3 */
2673 /* Register ROGUE_CR_BIF_TILING_CFG4 */
2690 /* Register ROGUE_CR_BIF_TILING_CFG5 */
2707 /* Register ROGUE_CR_BIF_TILING_CFG6 */
2724 /* Register ROGUE_CR_BIF_TILING_CFG7 */
2741 /* Register ROGUE_CR_BIF_READS_EXT_STATUS */
2749 /* Register ROGUE_CR_BIF_READS_INT_STATUS */
2757 /* Register ROGUE_CR_BIFPM_READS_INT_STATUS */
2763 /* Register ROGUE_CR_BIFPM_READS_EXT_STATUS */
2769 /* Register ROGUE_CR_BIFPM_STATUS_MMU */
2775 /* Register ROGUE_CR_BIF_STATUS_MMU */
2781 /* Register ROGUE_CR_BIF_FAULT_READ */
2789 /* Register ROGUE_CR_TEXAS_BIF_FAULT_BANK0_MMU_STATUS */
2808 /* Register ROGUE_CR_TEXAS_BIF_FAULT_BANK0_REQ_STATUS */
2823 /* Register ROGUE_CR_MCU_FENCE */
2839 /* Register group: ROGUE_CR_SCRATCH, with 16 repeats */
2841 /* Register ROGUE_CR_SCRATCH0 */
2847 /* Register ROGUE_CR_SCRATCH1 */
2853 /* Register ROGUE_CR_SCRATCH2 */
2859 /* Register ROGUE_CR_SCRATCH3 */
2865 /* Register ROGUE_CR_SCRATCH4 */
2871 /* Register ROGUE_CR_SCRATCH5 */
2877 /* Register ROGUE_CR_SCRATCH6 */
2883 /* Register ROGUE_CR_SCRATCH7 */
2889 /* Register ROGUE_CR_SCRATCH8 */
2895 /* Register ROGUE_CR_SCRATCH9 */
2901 /* Register ROGUE_CR_SCRATCH10 */
2907 /* Register ROGUE_CR_SCRATCH11 */
2913 /* Register ROGUE_CR_SCRATCH12 */
2919 /* Register ROGUE_CR_SCRATCH13 */
2925 /* Register ROGUE_CR_SCRATCH14 */
2931 /* Register ROGUE_CR_SCRATCH15 */
2937 /* Register group: ROGUE_CR_OS0_SCRATCH, with 2 repeats */
2939 /* Register ROGUE_CR_OS0_SCRATCH0 */
2945 /* Register ROGUE_CR_OS0_SCRATCH1 */
2951 /* Register ROGUE_CR_OS0_SCRATCH2 */
2957 /* Register ROGUE_CR_OS0_SCRATCH3 */
2963 /* Register group: ROGUE_CR_OS1_SCRATCH, with 2 repeats */
2965 /* Register ROGUE_CR_OS1_SCRATCH0 */
2971 /* Register ROGUE_CR_OS1_SCRATCH1 */
2977 /* Register ROGUE_CR_OS1_SCRATCH2 */
2983 /* Register ROGUE_CR_OS1_SCRATCH3 */
2989 /* Register group: ROGUE_CR_OS2_SCRATCH, with 2 repeats */
2991 /* Register ROGUE_CR_OS2_SCRATCH0 */
2997 /* Register ROGUE_CR_OS2_SCRATCH1 */
3003 /* Register ROGUE_CR_OS2_SCRATCH2 */
3009 /* Register ROGUE_CR_OS2_SCRATCH3 */
3015 /* Register group: ROGUE_CR_OS3_SCRATCH, with 2 repeats */
3017 /* Register ROGUE_CR_OS3_SCRATCH0 */
3023 /* Register ROGUE_CR_OS3_SCRATCH1 */
3029 /* Register ROGUE_CR_OS3_SCRATCH2 */
3035 /* Register ROGUE_CR_OS3_SCRATCH3 */
3041 /* Register group: ROGUE_CR_OS4_SCRATCH, with 2 repeats */
3043 /* Register ROGUE_CR_OS4_SCRATCH0 */
3049 /* Register ROGUE_CR_OS4_SCRATCH1 */
3055 /* Register ROGUE_CR_OS4_SCRATCH2 */
3061 /* Register ROGUE_CR_OS4_SCRATCH3 */
3067 /* Register group: ROGUE_CR_OS5_SCRATCH, with 2 repeats */
3069 /* Register ROGUE_CR_OS5_SCRATCH0 */
3075 /* Register ROGUE_CR_OS5_SCRATCH1 */
3081 /* Register ROGUE_CR_OS5_SCRATCH2 */
3087 /* Register ROGUE_CR_OS5_SCRATCH3 */
3093 /* Register group: ROGUE_CR_OS6_SCRATCH, with 2 repeats */
3095 /* Register ROGUE_CR_OS6_SCRATCH0 */
3101 /* Register ROGUE_CR_OS6_SCRATCH1 */
3107 /* Register ROGUE_CR_OS6_SCRATCH2 */
3113 /* Register ROGUE_CR_OS6_SCRATCH3 */
3119 /* Register group: ROGUE_CR_OS7_SCRATCH, with 2 repeats */
3121 /* Register ROGUE_CR_OS7_SCRATCH0 */
3127 /* Register ROGUE_CR_OS7_SCRATCH1 */
3133 /* Register ROGUE_CR_OS7_SCRATCH2 */
3139 /* Register ROGUE_CR_OS7_SCRATCH3 */
3145 /* Register ROGUE_CR_SPFILTER_SIGNAL_DESCR */
3153 /* Register ROGUE_CR_SPFILTER_SIGNAL_DESCR_MIN */
3161 /* Register group: ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG, with 16 repeats */
3163 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG0 */
3184 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG1 */
3205 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG2 */
3226 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG3 */
3247 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG4 */
3268 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG5 */
3289 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG6 */
3310 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG7 */
3331 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG8 */
3352 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG9 */
3373 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG10 */
3394 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG11 */
3415 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG12 */
3436 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG13 */
3457 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG14 */
3478 /* Register ROGUE_CR_FWCORE_ADDR_REMAP_CONFIG15 */
3499 /* Register ROGUE_CR_FWCORE_BOOT */
3506 /* Register ROGUE_CR_FWCORE_RESET_ADDR */
3514 /* Register ROGUE_CR_FWCORE_WRAPPER_NMI_ADDR */
3522 /* Register ROGUE_CR_FWCORE_WRAPPER_NMI_EVENT */
3529 /* Register ROGUE_CR_FWCORE_MEM_FAULT_MMU_STATUS */
3545 /* Register ROGUE_CR_FWCORE_MEM_FAULT_REQ_STATUS */
3560 /* Register ROGUE_CR_FWCORE_MEM_CTRL_INVAL */
3576 /* Register ROGUE_CR_FWCORE_MEM_MMU_STATUS */
3595 /* Register ROGUE_CR_FWCORE_MEM_READS_EXT_STATUS */
3601 /* Register ROGUE_CR_FWCORE_MEM_READS_INT_STATUS */
3607 /* Register ROGUE_CR_FWCORE_WRAPPER_FENCE */
3614 /* Register group: ROGUE_CR_FWCORE_MEM_CAT_BASE, with 8 repeats */
3616 /* Register ROGUE_CR_FWCORE_MEM_CAT_BASE0 */
3624 /* Register ROGUE_CR_FWCORE_MEM_CAT_BASE1 */
3632 /* Register ROGUE_CR_FWCORE_MEM_CAT_BASE2 */
3640 /* Register ROGUE_CR_FWCORE_MEM_CAT_BASE3 */
3648 /* Register ROGUE_CR_FWCORE_MEM_CAT_BASE4 */
3656 /* Register ROGUE_CR_FWCORE_MEM_CAT_BASE5 */
3664 /* Register ROGUE_CR_FWCORE_MEM_CAT_BASE6 */
3672 /* Register ROGUE_CR_FWCORE_MEM_CAT_BASE7 */
3680 /* Register ROGUE_CR_FWCORE_WDT_RESET */
3687 /* Register ROGUE_CR_FWCORE_WDT_CTRL */
3698 /* Register ROGUE_CR_FWCORE_WDT_COUNT */
3704 /* Register group: ROGUE_CR_FWCORE_DMI_RESERVED0, with 4 repeats */
3706 /* Register ROGUE_CR_FWCORE_DMI_RESERVED00 */
3710 /* Register ROGUE_CR_FWCORE_DMI_RESERVED01 */
3714 /* Register ROGUE_CR_FWCORE_DMI_RESERVED02 */
3718 /* Register ROGUE_CR_FWCORE_DMI_RESERVED03 */
3722 /* Register ROGUE_CR_FWCORE_DMI_DATA0 */
3726 /* Register ROGUE_CR_FWCORE_DMI_DATA1 */
3730 /* Register group: ROGUE_CR_FWCORE_DMI_RESERVED1, with 5 repeats */
3732 /* Register ROGUE_CR_FWCORE_DMI_RESERVED10 */
3736 /* Register ROGUE_CR_FWCORE_DMI_RESERVED11 */
3740 /* Register ROGUE_CR_FWCORE_DMI_RESERVED12 */
3744 /* Register ROGUE_CR_FWCORE_DMI_RESERVED13 */
3748 /* Register ROGUE_CR_FWCORE_DMI_RESERVED14 */
3752 /* Register ROGUE_CR_FWCORE_DMI_DMCONTROL */
3756 /* Register ROGUE_CR_FWCORE_DMI_DMSTATUS */
3760 /* Register group: ROGUE_CR_FWCORE_DMI_RESERVED2, with 4 repeats */
3762 /* Register ROGUE_CR_FWCORE_DMI_RESERVED20 */
3766 /* Register ROGUE_CR_FWCORE_DMI_RESERVED21 */
3770 /* Register ROGUE_CR_FWCORE_DMI_RESERVED22 */
3774 /* Register ROGUE_CR_FWCORE_DMI_RESERVED23 */
3778 /* Register ROGUE_CR_FWCORE_DMI_ABSTRACTCS */
3782 /* Register ROGUE_CR_FWCORE_DMI_COMMAND */
3786 /* Register ROGUE_CR_FWCORE_DMI_SBCS */
3790 /* Register ROGUE_CR_FWCORE_DMI_SBADDRESS0 */
3794 /* Register group: ROGUE_CR_FWCORE_DMI_RESERVED3, with 2 repeats */
3796 /* Register ROGUE_CR_FWCORE_DMI_RESERVED30 */
3800 /* Register ROGUE_CR_FWCORE_DMI_RESERVED31 */
3804 /* Register group: ROGUE_CR_FWCORE_DMI_SBDATA, with 4 repeats */
3806 /* Register ROGUE_CR_FWCORE_DMI_SBDATA0 */
3810 /* Register ROGUE_CR_FWCORE_DMI_SBDATA1 */
3814 /* Register ROGUE_CR_FWCORE_DMI_SBDATA2 */
3818 /* Register ROGUE_CR_FWCORE_DMI_SBDATA3 */
3822 /* Register ROGUE_CR_FWCORE_DMI_HALTSUM0 */
3826 /* Register ROGUE_CR_SLC_CTRL_MISC */
3858 /* Register ROGUE_CR_SLC_CTRL_FLUSH_INVAL */
3901 /* Register ROGUE_CR_SLC_STATUS0 */
3914 /* Register ROGUE_CR_SLC_CTRL_BYPASS */
4099 /* Register ROGUE_CR_SLC_STATUS1 */
4114 /* Register ROGUE_CR_SLC_IDLE */
4149 /* Register ROGUE_CR_SLC_STATUS2 */
4161 /* Register ROGUE_CR_SLC_CTRL_MISC2 */
4167 /* Register ROGUE_CR_SLC_CROSSBAR_LOAD_BALANCE */
4174 /* Register ROGUE_CR_USC_UVS0_CHECKSUM */
4180 /* Register ROGUE_CR_USC_UVS1_CHECKSUM */
4186 /* Register ROGUE_CR_USC_UVS2_CHECKSUM */
4192 /* Register ROGUE_CR_USC_UVS3_CHECKSUM */
4198 /* Register ROGUE_CR_PPP_SIGNATURE */
4204 /* Register ROGUE_CR_TE_SIGNATURE */
4210 /* Register ROGUE_CR_TE_CHECKSUM */
4216 /* Register ROGUE_CR_USC_UVB_CHECKSUM */
4222 /* Register ROGUE_CR_VCE_CHECKSUM */
4228 /* Register ROGUE_CR_ISP_PDS_CHECKSUM */
4234 /* Register ROGUE_CR_ISP_TPF_CHECKSUM */
4240 /* Register ROGUE_CR_TFPU_PLANE0_CHECKSUM */
4246 /* Register ROGUE_CR_TFPU_PLANE1_CHECKSUM */
4252 /* Register ROGUE_CR_PBE_CHECKSUM */
4258 /* Register ROGUE_CR_PDS_DOUTM_STM_SIGNATURE */
4264 /* Register ROGUE_CR_IFPU_ISP_CHECKSUM */
4270 /* Register ROGUE_CR_USC_UVS4_CHECKSUM */
4276 /* Register ROGUE_CR_USC_UVS5_CHECKSUM */
4282 /* Register ROGUE_CR_PPP_CLIP_CHECKSUM */
4288 /* Register ROGUE_CR_PERF_TA_PHASE */
4294 /* Register ROGUE_CR_PERF_3D_PHASE */
4300 /* Register ROGUE_CR_PERF_COMPUTE_PHASE */
4306 /* Register ROGUE_CR_PERF_TA_CYCLE */
4312 /* Register ROGUE_CR_PERF_3D_CYCLE */
4318 /* Register ROGUE_CR_PERF_COMPUTE_CYCLE */
4324 /* Register ROGUE_CR_PERF_TA_OR_3D_CYCLE */
4330 /* Register ROGUE_CR_PERF_INITIAL_TA_CYCLE */
4336 /* Register ROGUE_CR_PERF_SLC0_READ_STALL */
4342 /* Register ROGUE_CR_PERF_SLC0_WRITE_STALL */
4348 /* Register ROGUE_CR_PERF_SLC1_READ_STALL */
4354 /* Register ROGUE_CR_PERF_SLC1_WRITE_STALL */
4360 /* Register ROGUE_CR_PERF_SLC2_READ_STALL */
4366 /* Register ROGUE_CR_PERF_SLC2_WRITE_STALL */
4372 /* Register ROGUE_CR_PERF_SLC3_READ_STALL */
4378 /* Register ROGUE_CR_PERF_SLC3_WRITE_STALL */
4384 /* Register ROGUE_CR_PERF_3D_SPINUP */
4390 /* Register ROGUE_CR_AXI_ACE_LITE_CONFIGURATION */
4434 /* Register ROGUE_CR_POWER_ESTIMATE_RESULT */
4440 /* Register ROGUE_CR_TA_PERF */
4459 /* Register ROGUE_CR_TA_PERF_SELECT0 */
4474 /* Register ROGUE_CR_TA_PERF_SELECT1 */
4489 /* Register ROGUE_CR_TA_PERF_SELECT2 */
4504 /* Register ROGUE_CR_TA_PERF_SELECT3 */
4519 /* Register ROGUE_CR_TA_PERF_SELECTED_BITS */
4531 /* Register ROGUE_CR_TA_PERF_COUNTER_0 */
4537 /* Register ROGUE_CR_TA_PERF_COUNTER_1 */
4543 /* Register ROGUE_CR_TA_PERF_COUNTER_2 */
4549 /* Register ROGUE_CR_TA_PERF_COUNTER_3 */
4555 /* Register ROGUE_CR_RASTERISATION_PERF */
4574 /* Register ROGUE_CR_RASTERISATION_PERF_SELECT0 */
4589 /* Register ROGUE_CR_RASTERISATION_PERF_COUNTER_0 */
4595 /* Register ROGUE_CR_HUB_BIFPMCACHE_PERF */
4614 /* Register ROGUE_CR_HUB_BIFPMCACHE_PERF_SELECT0 */
4629 /* Register ROGUE_CR_HUB_BIFPMCACHE_PERF_COUNTER_0 */
4635 /* Register ROGUE_CR_TPU_MCU_L0_PERF */
4654 /* Register ROGUE_CR_TPU_MCU_L0_PERF_SELECT0 */
4669 /* Register ROGUE_CR_TPU_MCU_L0_PERF_COUNTER_0 */
4675 /* Register ROGUE_CR_USC_PERF */
4694 /* Register ROGUE_CR_USC_PERF_SELECT0 */
4709 /* Register ROGUE_CR_USC_PERF_COUNTER_0 */
4715 /* Register ROGUE_CR_JONES_IDLE */
4764 /* Register ROGUE_CR_TORNADO_PERF */
4783 /* Register ROGUE_CR_TORNADO_PERF_SELECT0 */
4798 /* Register ROGUE_CR_TORNADO_PERF_COUNTER_0 */
4804 /* Register ROGUE_CR_TEXAS_PERF */
4829 /* Register ROGUE_CR_TEXAS_PERF_SELECT0 */
4844 /* Register ROGUE_CR_TEXAS_PERF_COUNTER_0 */
4850 /* Register ROGUE_CR_JONES_PERF */
4869 /* Register ROGUE_CR_JONES_PERF_SELECT0 */
4884 /* Register ROGUE_CR_JONES_PERF_COUNTER_0 */
4890 /* Register ROGUE_CR_BLACKPEARL_PERF */
4915 /* Register ROGUE_CR_BLACKPEARL_PERF_SELECT0 */
4930 /* Register ROGUE_CR_BLACKPEARL_PERF_COUNTER_0 */
4936 /* Register ROGUE_CR_PBE_PERF */
4955 /* Register ROGUE_CR_PBE_PERF_SELECT0 */
4970 /* Register ROGUE_CR_PBE_PERF_COUNTER_0 */
4976 /* Register ROGUE_CR_OCP_REVINFO */
4987 /* Register ROGUE_CR_OCP_SYSCONFIG */
5003 /* Register ROGUE_CR_OCP_IRQSTATUS_RAW_0 */
5010 /* Register ROGUE_CR_OCP_IRQSTATUS_RAW_1 */
5017 /* Register ROGUE_CR_OCP_IRQSTATUS_RAW_2 */
5024 /* Register ROGUE_CR_OCP_IRQSTATUS_0 */
5031 /* Register ROGUE_CR_OCP_IRQSTATUS_1 */
5038 /* Register ROGUE_CR_OCP_IRQSTATUS_2 */
5045 /* Register ROGUE_CR_OCP_IRQENABLE_SET_0 */
5052 /* Register ROGUE_CR_OCP_IRQENABLE_SET_1 */
5059 /* Register ROGUE_CR_OCP_IRQENABLE_SET_2 */
5066 /* Register ROGUE_CR_OCP_IRQENABLE_CLR_0 */
5073 /* Register ROGUE_CR_OCP_IRQENABLE_CLR_1 */
5080 /* Register ROGUE_CR_OCP_IRQENABLE_CLR_2 */
5087 /* Register ROGUE_CR_OCP_IRQ_EVENT */
5151 /* Register ROGUE_CR_OCP_DEBUG_CONFIG */
5158 /* Register ROGUE_CR_OCP_DEBUG_STATUS */
5282 /* Register ROGUE_CR_BIF_TRUST */
5330 /* Register ROGUE_CR_SYS_BUS_SECURE */
5338 /* Register ROGUE_CR_FBA_FC0_CHECKSUM */
5344 /* Register ROGUE_CR_FBA_FC1_CHECKSUM */
5350 /* Register ROGUE_CR_FBA_FC2_CHECKSUM */
5356 /* Register ROGUE_CR_FBA_FC3_CHECKSUM */
5362 /* Register ROGUE_CR_CLK_CTRL2 */
5386 /* Register ROGUE_CR_CLK_STATUS2 */
5402 /* Register ROGUE_CR_RPM_SHF_FPL */
5412 /* Register ROGUE_CR_RPM_SHF_FPL_READ */
5421 /* Register ROGUE_CR_RPM_SHF_FPL_WRITE */
5430 /* Register ROGUE_CR_RPM_SHG_FPL */
5440 /* Register ROGUE_CR_RPM_SHG_FPL_READ */
5449 /* Register ROGUE_CR_RPM_SHG_FPL_WRITE */
5458 /* Register ROGUE_CR_SH_PERF */
5477 /* Register ROGUE_CR_SH_PERF_SELECT0 */
5492 /* Register ROGUE_CR_SH_PERF_COUNTER_0 */
5498 /* Register ROGUE_CR_SHF_SHG_CHECKSUM */
5504 /* Register ROGUE_CR_SHF_VERTEX_BIF_CHECKSUM */
5510 /* Register ROGUE_CR_SHF_VARY_BIF_CHECKSUM */
5516 /* Register ROGUE_CR_RPM_BIF_CHECKSUM */
5522 /* Register ROGUE_CR_SHG_BIF_CHECKSUM */
5528 /* Register ROGUE_CR_SHG_FE_BE_CHECKSUM */
5534 /* Register DPX_CR_BF_PERF */
5553 /* Register DPX_CR_BF_PERF_SELECT0 */
5568 /* Register DPX_CR_BF_PERF_COUNTER_0 */
5574 /* Register DPX_CR_BT_PERF */
5593 /* Register DPX_CR_BT_PERF_SELECT0 */
5608 /* Register DPX_CR_BT_PERF_COUNTER_0 */
5614 /* Register DPX_CR_RQ_USC_DEBUG */
5620 /* Register DPX_CR_BIF_FAULT_BANK_MMU_STATUS */
5639 /* Register DPX_CR_BIF_FAULT_BANK_REQ_STATUS */
5654 /* Register DPX_CR_BIF_MMU_STATUS */
5673 /* Register DPX_CR_RT_PERF */
5692 /* Register DPX_CR_RT_PERF_SELECT0 */
5707 /* Register DPX_CR_RT_PERF_COUNTER_0 */
5713 /* Register DPX_CR_BX_TU_PERF */
5732 /* Register DPX_CR_BX_TU_PERF_SELECT0 */
5747 /* Register DPX_CR_BX_TU_PERF_COUNTER_0 */
5753 /* Register DPX_CR_RS_PDS_RR_CHECKSUM */
5759 /* Register ROGUE_CR_MMU_CBASE_MAPPING_CONTEXT */
5765 /* Register ROGUE_CR_MMU_CBASE_MAPPING */
5773 /* Register ROGUE_CR_MMU_FAULT_STATUS */
5795 /* Register ROGUE_CR_MMU_FAULT_STATUS_META */
5817 /* Register ROGUE_CR_SLC3_CTRL_MISC */
5831 /* Register ROGUE_CR_SLC3_SCRAMBLE */
5837 /* Register ROGUE_CR_SLC3_SCRAMBLE2 */
5843 /* Register ROGUE_CR_SLC3_SCRAMBLE3 */
5849 /* Register ROGUE_CR_SLC3_SCRAMBLE4 */
5855 /* Register ROGUE_CR_SLC3_STATUS */
5867 /* Register ROGUE_CR_SLC3_IDLE */
5891 /* Register ROGUE_CR_SLC3_FAULT_STOP_STATUS */
5897 /* Register ROGUE_CR_VDM_CONTEXT_STORE_MODE */
5906 /* Register ROGUE_CR_CONTEXT_MAPPING0 */
5918 /* Register ROGUE_CR_CONTEXT_MAPPING1 */
5926 /* Register ROGUE_CR_CONTEXT_MAPPING2 */
5936 /* Register ROGUE_CR_CONTEXT_MAPPING3 */
5946 /* Register ROGUE_CR_BIF_JONES_OUTSTANDING_READ */
5952 /* Register ROGUE_CR_BIF_BLACKPEARL_OUTSTANDING_READ */
5958 /* Register ROGUE_CR_BIF_DUST_OUTSTANDING_READ */
5964 /* Register ROGUE_CR_CONTEXT_MAPPING4 */
5980 /* Register ROGUE_CR_MULTICORE_GPU */
5998 /* Register ROGUE_CR_MULTICORE_SYSTEM */
6004 /* Register ROGUE_CR_MULTICORE_FRAGMENT_CTRL_COMMON */
6014 /* Register ROGUE_CR_MULTICORE_GEOMETRY_CTRL_COMMON */
6024 /* Register ROGUE_CR_MULTICORE_COMPUTE_CTRL_COMMON */
6034 /* Register ROGUE_CR_ECC_RAM_ERR_INJ */
6053 /* Register ROGUE_CR_ECC_RAM_INIT_KICK */
6072 /* Register ROGUE_CR_ECC_RAM_INIT_DONE */
6091 /* Register ROGUE_CR_SAFETY_EVENT_ENABLE */
6116 /* Register ROGUE_CR_SAFETY_EVENT_STATUS */
6141 /* Register ROGUE_CR_SAFETY_EVENT_CLEAR */
6166 /* Register ROGUE_CR_MTS_SAFETY_EVENT_ENABLE */