300 static int hwm_pcode_read_i1(struct drm_i915_private *i915, u32 *uval)  in hwm_pcode_read_i1()  argument
307 				POWER_SETUP_SUBCOMMAND_READ_I1, 0, uval);  in hwm_pcode_read_i1()
310 static int hwm_pcode_write_i1(struct drm_i915_private *i915, u32 uval)  in hwm_pcode_write_i1()  argument
313 				  POWER_SETUP_SUBCOMMAND_WRITE_I1, 0, uval);  in hwm_pcode_write_i1()
384 	u32 uval;  in hwm_power_is_visible()  local
392 		return (hwm_pcode_read_i1(i915, &uval) ||  in hwm_power_is_visible()
393 			!(uval & POWER_SETUP_I1_WATTS)) ? 0 : 0644;  in hwm_power_is_visible()
502 	u32 uval;  in hwm_power_read()  local
515 		ret = hwm_pcode_read_i1(ddat->uncore->i915, &uval);  in hwm_power_read()
518 		if (!(uval & POWER_SETUP_I1_WATTS))  in hwm_power_read()
520 		*val = mul_u64_u32_shr(REG_FIELD_GET(POWER_SETUP_I1_DATA_MASK, uval),  in hwm_power_read()
531 	u32 uval;  in hwm_power_write()  local
537 		uval = DIV_ROUND_CLOSEST_ULL(val << POWER_SETUP_I1_SHIFT, SF_POWER);  in hwm_power_write()
538 		return hwm_pcode_write_i1(ddat->uncore->i915, uval);  in hwm_power_write()
613 	u32 uval;  in hwm_curr_is_visible()  local
617 		return (hwm_pcode_read_i1(i915, &uval) ||  in hwm_curr_is_visible()
618 			(uval & POWER_SETUP_I1_WATTS)) ? 0 : 0644;  in hwm_curr_is_visible()
628 	u32 uval;  in hwm_curr_read()  local
632 		ret = hwm_pcode_read_i1(ddat->uncore->i915, &uval);  in hwm_curr_read()
635 		if (uval & POWER_SETUP_I1_WATTS)  in hwm_curr_read()
637 		*val = mul_u64_u32_shr(REG_FIELD_GET(POWER_SETUP_I1_DATA_MASK, uval),  in hwm_curr_read()
648 	u32 uval;  in hwm_curr_write()  local
652 		uval = DIV_ROUND_CLOSEST_ULL(val << POWER_SETUP_I1_SHIFT, SF_CURR);  in hwm_curr_write()
653 		return hwm_pcode_write_i1(ddat->uncore->i915, uval);  in hwm_curr_write()