Lines Matching +full:max +full:- +full:freq
1 // SPDX-License-Identifier: MIT
26 #define CPU_LATENCY 0 /* -1 to disable pm_qos, 0 to disable cstates */
37 return -1; in cmp_u64()
49 return -1; in cmp_u32()
68 #define CS_GPR(x) GEN8_RING_CS_GPR(engine->mmio_base, x) in create_spin_counter()
76 obj = i915_gem_object_create_internal(vm->i915, 64 << 10); in create_spin_counter()
80 end = obj->base.size / sizeof(u32) - 1; in create_spin_counter()
113 loop = cs - base; in create_spin_counter()
134 GEM_BUG_ON(cs - base > end); in create_spin_counter()
151 static u8 wait_for_freq(struct intel_rps *rps, u8 freq, int timeout_ms) in wait_for_freq() argument
158 memset(history, freq, sizeof(history)); in wait_for_freq()
171 if (act == freq) in wait_for_freq()
188 static u8 rps_set_check(struct intel_rps *rps, u8 freq) in rps_set_check() argument
190 mutex_lock(&rps->lock); in rps_set_check()
192 if (wait_for(!intel_rps_set(rps, freq), 50)) { in rps_set_check()
193 mutex_unlock(&rps->lock); in rps_set_check()
196 GEM_BUG_ON(rps->last_freq != freq); in rps_set_check()
197 mutex_unlock(&rps->lock); in rps_set_check()
199 return wait_for_freq(rps, freq, 50); in rps_set_check()
222 struct intel_rps *rps = >->rps; in live_rps_clock_interval()
230 if (!intel_rps_is_enabled(rps) || GRAPHICS_VER(gt->i915) < 6) in live_rps_clock_interval()
234 return -ENOMEM; in live_rps_clock_interval()
237 saved_work = rps->work.func; in live_rps_clock_interval()
238 rps->work.func = dummy_rps_work; in live_rps_clock_interval()
241 intel_rps_disable(>->rps); in live_rps_clock_interval()
256 engine->kernel_context, in live_rps_clock_interval()
268 engine->name); in live_rps_clock_interval()
271 intel_gt_set_wedged(engine->gt); in live_rps_clock_interval()
272 err = -EIO; in live_rps_clock_interval()
276 intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL); in live_rps_clock_interval()
278 intel_uncore_write_fw(gt->uncore, GEN6_RP_CUR_UP_EI, 0); in live_rps_clock_interval()
281 intel_uncore_write_fw(gt->uncore, in live_rps_clock_interval()
283 intel_uncore_write_fw(gt->uncore, in live_rps_clock_interval()
286 intel_uncore_write_fw(gt->uncore, GEN6_RP_CONTROL, in live_rps_clock_interval()
289 if (wait_for(intel_uncore_read_fw(gt->uncore, in live_rps_clock_interval()
294 engine->name); in live_rps_clock_interval()
295 err = -ENODEV; in live_rps_clock_interval()
304 cycles_[i] = -intel_uncore_read_fw(gt->uncore, GEN6_RP_CUR_UP_EI); in live_rps_clock_interval()
309 cycles_[i] += intel_uncore_read_fw(gt->uncore, GEN6_RP_CUR_UP_EI); in live_rps_clock_interval()
322 intel_uncore_write_fw(gt->uncore, GEN6_RP_CONTROL, 0); in live_rps_clock_interval()
323 intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL); in live_rps_clock_interval()
334 engine->name, cycles, time, dt, expected, in live_rps_clock_interval()
335 gt->clock_frequency / 1000); in live_rps_clock_interval()
340 engine->name); in live_rps_clock_interval()
341 err = -EINVAL; in live_rps_clock_interval()
347 engine->name); in live_rps_clock_interval()
348 err = -EINVAL; in live_rps_clock_interval()
352 if (igt_flush_test(gt->i915)) in live_rps_clock_interval()
353 err = -EIO; in live_rps_clock_interval()
358 intel_rps_enable(>->rps); in live_rps_clock_interval()
364 rps->work.func = saved_work; in live_rps_clock_interval()
366 if (err == -ENODEV) /* skipped, don't report a fail */ in live_rps_clock_interval()
375 struct intel_rps *rps = >->rps; in live_rps_control()
393 if (IS_CHERRYVIEW(gt->i915)) /* XXX fragile PCU */ in live_rps_control()
397 return -ENOMEM; in live_rps_control()
400 saved_work = rps->work.func; in live_rps_control()
401 rps->work.func = dummy_rps_work; in live_rps_control()
408 int min, max; in live_rps_control() local
416 engine->kernel_context, in live_rps_control()
427 engine->name); in live_rps_control()
430 intel_gt_set_wedged(engine->gt); in live_rps_control()
431 err = -EIO; in live_rps_control()
435 if (rps_set_check(rps, rps->min_freq) != rps->min_freq) { in live_rps_control()
437 engine->name, rps->min_freq, read_cagf(rps)); in live_rps_control()
441 err = -EINVAL; in live_rps_control()
445 for (f = rps->min_freq + 1; f < rps->max_freq; f++) { in live_rps_control()
452 if (rps_set_check(rps, rps->min_freq) != rps->min_freq) { in live_rps_control()
454 engine->name, rps->min_freq, read_cagf(rps)); in live_rps_control()
458 err = -EINVAL; in live_rps_control()
463 max = rps_set_check(rps, limit); in live_rps_control()
467 min = rps_set_check(rps, rps->min_freq); in live_rps_control()
474 engine->name, in live_rps_control()
475 rps->min_freq, intel_gpu_freq(rps, rps->min_freq), in live_rps_control()
476 rps->max_freq, intel_gpu_freq(rps, rps->max_freq), in live_rps_control()
478 min, max, ktime_to_ns(min_dt), ktime_to_ns(max_dt)); in live_rps_control()
480 if (limit == rps->min_freq) { in live_rps_control()
482 engine->name); in live_rps_control()
484 err = -ENODEV; in live_rps_control()
488 if (igt_flush_test(gt->i915)) { in live_rps_control()
489 err = -EIO; in live_rps_control()
498 rps->work.func = saved_work; in live_rps_control()
513 min_gpu_freq = rps->min_freq; in show_pcu_config()
514 max_gpu_freq = rps->max_freq; in show_pcu_config()
521 wakeref = intel_runtime_pm_get(rps_to_uncore(rps)->rpm); in show_pcu_config()
527 snb_pcode_read(rps_to_gt(rps)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE, in show_pcu_config()
536 intel_runtime_pm_put(rps_to_uncore(rps)->rpm, wakeref); in show_pcu_config()
546 dc = READ_ONCE(*cntr) - dc; in __measure_frequency()
547 dt = ktime_get() - dt; in __measure_frequency()
552 static u64 measure_frequency_at(struct intel_rps *rps, u32 *cntr, int *freq) in measure_frequency_at() argument
557 *freq = rps_set_check(rps, *freq); in measure_frequency_at()
560 *freq = (*freq + read_cagf(rps)) / 2; in measure_frequency_at()
572 dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)); in __measure_cs_frequency()
575 dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)) - dc; in __measure_cs_frequency()
576 dt = ktime_get() - dt; in __measure_cs_frequency()
583 int *freq) in measure_cs_frequency_at() argument
588 *freq = rps_set_check(rps, *freq); in measure_cs_frequency_at()
591 *freq = (*freq + read_cagf(rps)) / 2; in measure_cs_frequency_at()
607 struct intel_rps *rps = >->rps; in live_rps_frequency_cs()
622 if (GRAPHICS_VER(gt->i915) < 8) /* for CS simplicity */ in live_rps_frequency_cs()
629 saved_work = rps->work.func; in live_rps_frequency_cs()
630 rps->work.func = dummy_rps_work; in live_rps_frequency_cs()
638 int freq; in live_rps_frequency_cs() member
639 } min, max; in live_rps_frequency_cs() local
644 engine->kernel_context->vm, false, in live_rps_frequency_cs()
660 err = rq->engine->emit_bb_start(rq, in live_rps_frequency_cs()
667 if (wait_for(intel_uncore_read(engine->uncore, CS_GPR(0)), in live_rps_frequency_cs()
670 engine->name); in live_rps_frequency_cs()
674 min.freq = rps->min_freq; in live_rps_frequency_cs()
675 min.count = measure_cs_frequency_at(rps, engine, &min.freq); in live_rps_frequency_cs()
677 max.freq = rps->max_freq; in live_rps_frequency_cs()
678 max.count = measure_cs_frequency_at(rps, engine, &max.freq); in live_rps_frequency_cs()
680 pr_info("%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n", in live_rps_frequency_cs()
681 engine->name, in live_rps_frequency_cs()
682 min.count, intel_gpu_freq(rps, min.freq), in live_rps_frequency_cs()
683 max.count, intel_gpu_freq(rps, max.freq), in live_rps_frequency_cs()
684 (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * max.count, in live_rps_frequency_cs()
685 max.freq * min.count)); in live_rps_frequency_cs()
687 if (!scaled_within(max.freq * min.count, in live_rps_frequency_cs()
688 min.freq * max.count, in live_rps_frequency_cs()
692 pr_err("%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n", in live_rps_frequency_cs()
693 engine->name, in live_rps_frequency_cs()
694 max.freq * min.count, in live_rps_frequency_cs()
695 min.freq * max.count); in live_rps_frequency_cs()
698 for (f = min.freq + 1; f <= rps->max_freq; f++) { in live_rps_frequency_cs()
707 engine->name, in live_rps_frequency_cs()
709 (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count, in live_rps_frequency_cs()
715 err = -EINTR; /* ignore error, continue on with test */ in live_rps_frequency_cs()
720 i915_gem_object_flush_map(vma->obj); in live_rps_frequency_cs()
721 i915_gem_object_unpin_map(vma->obj); in live_rps_frequency_cs()
727 if (igt_flush_test(gt->i915)) in live_rps_frequency_cs()
728 err = -EIO; in live_rps_frequency_cs()
734 rps->work.func = saved_work; in live_rps_frequency_cs()
746 struct intel_rps *rps = >->rps; in live_rps_frequency_srm()
761 if (GRAPHICS_VER(gt->i915) < 8) /* for CS simplicity */ in live_rps_frequency_srm()
768 saved_work = rps->work.func; in live_rps_frequency_srm()
769 rps->work.func = dummy_rps_work; in live_rps_frequency_srm()
777 int freq; in live_rps_frequency_srm() member
778 } min, max; in live_rps_frequency_srm() local
783 engine->kernel_context->vm, true, in live_rps_frequency_srm()
799 err = rq->engine->emit_bb_start(rq, in live_rps_frequency_srm()
808 engine->name); in live_rps_frequency_srm()
812 min.freq = rps->min_freq; in live_rps_frequency_srm()
813 min.count = measure_frequency_at(rps, cntr, &min.freq); in live_rps_frequency_srm()
815 max.freq = rps->max_freq; in live_rps_frequency_srm()
816 max.count = measure_frequency_at(rps, cntr, &max.freq); in live_rps_frequency_srm()
818 pr_info("%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n", in live_rps_frequency_srm()
819 engine->name, in live_rps_frequency_srm()
820 min.count, intel_gpu_freq(rps, min.freq), in live_rps_frequency_srm()
821 max.count, intel_gpu_freq(rps, max.freq), in live_rps_frequency_srm()
822 (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * max.count, in live_rps_frequency_srm()
823 max.freq * min.count)); in live_rps_frequency_srm()
825 if (!scaled_within(max.freq * min.count, in live_rps_frequency_srm()
826 min.freq * max.count, in live_rps_frequency_srm()
830 pr_err("%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n", in live_rps_frequency_srm()
831 engine->name, in live_rps_frequency_srm()
832 max.freq * min.count, in live_rps_frequency_srm()
833 min.freq * max.count); in live_rps_frequency_srm()
836 for (f = min.freq + 1; f <= rps->max_freq; f++) { in live_rps_frequency_srm()
845 engine->name, in live_rps_frequency_srm()
847 (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count, in live_rps_frequency_srm()
853 err = -EINTR; /* ignore error, continue on with test */ in live_rps_frequency_srm()
858 i915_gem_object_flush_map(vma->obj); in live_rps_frequency_srm()
859 i915_gem_object_unpin_map(vma->obj); in live_rps_frequency_srm()
865 if (igt_flush_test(gt->i915)) in live_rps_frequency_srm()
866 err = -EIO; in live_rps_frequency_srm()
872 rps->work.func = saved_work; in live_rps_frequency_srm()
887 GEM_BUG_ON(rps->pm_iir); in sleep_for_ei()
898 struct intel_uncore *uncore = engine->uncore; in __rps_up_interrupt()
905 rps_set_check(rps, rps->min_freq); in __rps_up_interrupt()
907 rq = igt_spinner_create_request(spin, engine->kernel_context, MI_NOOP); in __rps_up_interrupt()
916 engine->name); in __rps_up_interrupt()
918 intel_gt_set_wedged(engine->gt); in __rps_up_interrupt()
919 return -EIO; in __rps_up_interrupt()
924 engine->name); in __rps_up_interrupt()
927 return -EINVAL; in __rps_up_interrupt()
930 if (!(rps->pm_events & GEN6_PM_RP_UP_THRESHOLD)) { in __rps_up_interrupt()
932 engine->name); in __rps_up_interrupt()
934 return -EINVAL; in __rps_up_interrupt()
937 if (rps->last_freq != rps->min_freq) { in __rps_up_interrupt()
939 engine->name); in __rps_up_interrupt()
941 return -EINVAL; in __rps_up_interrupt()
945 timeout = intel_gt_pm_interval_to_ns(engine->gt, timeout); in __rps_up_interrupt()
954 if (rps->cur_freq != rps->min_freq) { in __rps_up_interrupt()
956 engine->name, intel_rps_read_actual_frequency(rps)); in __rps_up_interrupt()
957 return -EINVAL; in __rps_up_interrupt()
960 if (!(rps->pm_iir & GEN6_PM_RP_UP_THRESHOLD)) { in __rps_up_interrupt()
962 engine->name, rps->pm_iir, in __rps_up_interrupt()
966 return -EINVAL; in __rps_up_interrupt()
975 struct intel_uncore *uncore = engine->uncore; in __rps_down_interrupt()
978 rps_set_check(rps, rps->max_freq); in __rps_down_interrupt()
980 if (!(rps->pm_events & GEN6_PM_RP_DOWN_THRESHOLD)) { in __rps_down_interrupt()
982 engine->name); in __rps_down_interrupt()
983 return -EINVAL; in __rps_down_interrupt()
986 if (rps->last_freq != rps->max_freq) { in __rps_down_interrupt()
987 pr_err("%s: RPS did not program max frequency\n", in __rps_down_interrupt()
988 engine->name); in __rps_down_interrupt()
989 return -EINVAL; in __rps_down_interrupt()
993 timeout = intel_gt_pm_interval_to_ns(engine->gt, timeout); in __rps_down_interrupt()
998 if (rps->cur_freq != rps->max_freq) { in __rps_down_interrupt()
1000 engine->name, in __rps_down_interrupt()
1002 return -EINVAL; in __rps_down_interrupt()
1005 if (!(rps->pm_iir & (GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT))) { in __rps_down_interrupt()
1007 engine->name, rps->pm_iir, in __rps_down_interrupt()
1014 return -EINVAL; in __rps_down_interrupt()
1023 struct intel_rps *rps = >->rps; in live_rps_interrupt()
1036 if (!intel_rps_has_interrupts(rps) || GRAPHICS_VER(gt->i915) < 6) in live_rps_interrupt()
1041 pm_events = rps->pm_events; in live_rps_interrupt()
1044 return -ENODEV; in live_rps_interrupt()
1048 return -ENOMEM; in live_rps_interrupt()
1051 saved_work = rps->work.func; in live_rps_interrupt()
1052 rps->work.func = dummy_rps_work; in live_rps_interrupt()
1057 intel_gt_pm_wait_for_idle(engine->gt); in live_rps_interrupt()
1068 intel_gt_pm_wait_for_idle(engine->gt); in live_rps_interrupt()
1074 intel_rc6_disable(>->rc6); in live_rps_interrupt()
1078 intel_rc6_enable(>->rc6); in live_rps_interrupt()
1086 if (igt_flush_test(gt->i915)) in live_rps_interrupt()
1087 err = -EIO; in live_rps_interrupt()
1092 rps->work.func = saved_work; in live_rps_interrupt()
1104 dE = librapl_energy_uJ() - dE; in __measure_power()
1105 dt = ktime_get() - dt; in __measure_power()
1110 static u64 measure_power(struct intel_rps *rps, int *freq) in measure_power() argument
1118 *freq = (*freq + intel_rps_read_actual_frequency(rps)) / 2; in measure_power()
1125 static u64 measure_power_at(struct intel_rps *rps, int *freq) in measure_power_at() argument
1127 *freq = rps_set_check(rps, *freq); in measure_power_at()
1128 return measure_power(rps, freq); in measure_power_at()
1134 struct intel_rps *rps = >->rps; in live_rps_power()
1147 if (!intel_rps_is_enabled(rps) || GRAPHICS_VER(gt->i915) < 6) in live_rps_power()
1150 if (!librapl_supported(gt->i915)) in live_rps_power()
1154 return -ENOMEM; in live_rps_power()
1157 saved_work = rps->work.func; in live_rps_power()
1158 rps->work.func = dummy_rps_work; in live_rps_power()
1164 int freq; in live_rps_power() member
1165 } min, max; in live_rps_power() local
1173 engine->kernel_context, in live_rps_power()
1185 engine->name); in live_rps_power()
1188 intel_gt_set_wedged(engine->gt); in live_rps_power()
1189 err = -EIO; in live_rps_power()
1193 max.freq = rps->max_freq; in live_rps_power()
1194 max.power = measure_power_at(rps, &max.freq); in live_rps_power()
1196 min.freq = rps->min_freq; in live_rps_power()
1197 min.power = measure_power_at(rps, &min.freq); in live_rps_power()
1202 pr_info("%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n", in live_rps_power()
1203 engine->name, in live_rps_power()
1204 min.power, intel_gpu_freq(rps, min.freq), in live_rps_power()
1205 max.power, intel_gpu_freq(rps, max.freq)); in live_rps_power()
1207 if (10 * min.freq >= 9 * max.freq) { in live_rps_power()
1209 min.freq, intel_gpu_freq(rps, min.freq), in live_rps_power()
1210 max.freq, intel_gpu_freq(rps, max.freq)); in live_rps_power()
1214 if (11 * min.power > 10 * max.power) { in live_rps_power()
1216 engine->name); in live_rps_power()
1217 err = -EINVAL; in live_rps_power()
1221 if (igt_flush_test(gt->i915)) { in live_rps_power()
1222 err = -EIO; in live_rps_power()
1230 rps->work.func = saved_work; in live_rps_power()
1238 struct intel_rps *rps = >->rps; in live_rps_dynamic()
1251 if (!intel_rps_is_enabled(rps) || GRAPHICS_VER(gt->i915) < 6) in live_rps_dynamic()
1255 return -ENOMEM; in live_rps_dynamic()
1266 u8 freq; in live_rps_dynamic() member
1267 } min, max; in live_rps_dynamic() local
1274 rps->cur_freq = rps->min_freq; in live_rps_dynamic()
1277 intel_rc6_disable(>->rc6); in live_rps_dynamic()
1278 GEM_BUG_ON(rps->last_freq != rps->min_freq); in live_rps_dynamic()
1281 engine->kernel_context, in live_rps_dynamic()
1290 max.dt = ktime_get(); in live_rps_dynamic()
1291 max.freq = wait_for_freq(rps, rps->max_freq, 500); in live_rps_dynamic()
1292 max.dt = ktime_sub(ktime_get(), max.dt); in live_rps_dynamic()
1297 min.freq = wait_for_freq(rps, rps->min_freq, 2000); in live_rps_dynamic()
1301 engine->name, in live_rps_dynamic()
1302 max.freq, intel_gpu_freq(rps, max.freq), in live_rps_dynamic()
1303 ktime_to_ns(max.dt), in live_rps_dynamic()
1304 min.freq, intel_gpu_freq(rps, min.freq), in live_rps_dynamic()
1306 if (min.freq >= max.freq) { in live_rps_dynamic()
1308 engine->name); in live_rps_dynamic()
1309 err = -EINVAL; in live_rps_dynamic()
1313 intel_rc6_enable(>->rc6); in live_rps_dynamic()
1316 if (igt_flush_test(gt->i915)) in live_rps_dynamic()
1317 err = -EIO; in live_rps_dynamic()