16  * multiple instances of the same register share a single MMIO offset.  MCR
18  * independent values of a register per hardware unit (e.g., per-subslice,
24  * registers can be done in either a (i.e., a single write updates all
25  * instances of the register to the same value) or unicast (a write updates only
26  * one specific instance).  Reads of MCR registers always operate in a unicast
28  * Selection of a specific MCR instance for unicast operations is referred to
31  * If MCR register operations are steered toward a hardware unit that is
33  * is "terminated" by the hardware.  Terminated read operations will return a
57  * are of a "GAM" subclass that has special rules.  Thus we use a separate
134 	} else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) {  in intel_gt_mcr_init()
136 		if (IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_A0, STEP_B0) ||  in intel_gt_mcr_init()
159 		 * No need to hook up the GAM table since it has a dedicated  in intel_gt_mcr_init()
183  * internally to implement those, so we need a way for the functions in this
194  * rw_with_mcr_steering_fw - Access a register with specific MCR steering
216 	if (GRAPHICS_VER_FULL(uncore->i915) >= IP_VER(12, 70)) {  in rw_with_mcr_steering_fw()
220 		 * to unicast mode when doing writes of a specific instance.  in rw_with_mcr_steering_fw()
237 		 * from a single register instance regardless of how that bit  in rw_with_mcr_steering_fw()
238 		 * is set), but some platforms have a workaround requiring us  in rw_with_mcr_steering_fw()
242 		 * when exlicitly doing a write operation.  in rw_with_mcr_steering_fw()
274 	 * the 'multicast' bit (and only if we did a write that cleared it).  in rw_with_mcr_steering_fw()
276 	if (GRAPHICS_VER_FULL(uncore->i915) >= IP_VER(12, 70) && rw_flag == FW_REG_WRITE)  in rw_with_mcr_steering_fw()
278 	else if (GRAPHICS_VER_FULL(uncore->i915) < IP_VER(12, 70))  in rw_with_mcr_steering_fw()
319  * operation.  On MTL and beyond, a hardware lock will also be taken to
337 	 * driver threads, but also with hardware/firmware agents.  A dedicated  in intel_gt_mcr_lock()
340 	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) {  in intel_gt_mcr_lock()
361 	 * Even on platforms with a hardware lock, we'll continue to grab  in intel_gt_mcr_lock()
362 	 * a software spinlock too for lockdep purposes.  If the hardware lock  in intel_gt_mcr_lock()
395 	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) {  in intel_gt_mcr_unlock()
409  * may have left the lock in a bad state.
420 	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))  in intel_gt_mcr_lock_sanitize()
425  * intel_gt_mcr_read - read a specific instance of an MCR register
433  * Returns the value read from an MCR register after steering toward a specific
444  * intel_gt_mcr_unicast_write - write a specific instance of an MCR register
451  * Write an MCR register in unicast mode after steering toward a specific
454  * Context: Calls a function that takes and releases gt->mcr_lock
463  * intel_gt_mcr_multicast_write - write a value to all instances of an MCR register
483 	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))  in intel_gt_mcr_multicast_write()
492  * intel_gt_mcr_multicast_write_fw - write a value to all instances of an MCR register
512 	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))  in intel_gt_mcr_multicast_write_fw()
519  * intel_gt_mcr_multicast_rmw - Performs a multicast RMW operations
525  * Performs a read-modify-write on an MCR register in a multicast manner.
549  * reg_needs_read_steering - determine whether a register read requires
555  * Determines whether @reg needs explicit steering of a specific type for
558  * Returns false if @reg does not belong to a register range of the given
584  * get_nonterminated_steering - determines valid IDs for a class of MCR steering
591  * MCR class to a non-terminated instance.
629 		 * There are a lot of MCR types for which instance (0, 0)  in get_nonterminated_steering()
630 		 * will always provide a non-terminated value.  in get_nonterminated_steering()
651  *    will steer a register to a non-terminated instance
657  * This function returns a group/instance pair that is guaranteed to work for
658  * read steering of the given register. Note that a value will be returned even
684  * Reads a GT MCR register.  The read will be steered to a non-terminated
692  * Returns the value from a non-terminated instance of @reg.
718  * Reads a GT MCR register.  The read will be steered to a non-terminated
721  * Context: Calls a function that takes and releases gt->mcr_lock.
723  * Returns the value from a non-terminated instance of @reg.
776 	if (GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 70))  in intel_gt_mcr_report_steering()
781 	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) {  in intel_gt_mcr_report_steering()
792  * intel_gt_mcr_get_ss_steering - returns the group/instance steering for a SS
799  * correspond to a specific subslice/DSS ID.
834  * on GAM registers which are a bit special --- although they're MCR registers,
841  * Context: Calls a function that takes and releases gt->mcr_lock