Lines Matching +full:saturation +full:- +full:ratio
2 * Copyright © 2006-2008 Intel Corporation
30 * Integrated TV-out support for the 915GM and 945GM.
136 * ee = 00 = 10^-1 (0.mmmmmmmmm)
137 * ee = 01 = 10^-2 (0.0mmmmmmmmm)
138 * ee = 10 = 10^-3 (0.00mmmmmmmmm)
139 * ee = 11 = 10^-4 (0.000mmmmmmmmm)
142 * eee = 000 = 10^-1 (0.mmmmmmmmm)
143 * eee = 001 = 10^-2 (0.0mmmmmmmmm)
144 * eee = 010 = 10^-3 (0.00mmmmmmmmm)
145 * eee = 011 = 10^-4 (0.000mmmmmmmmm)
151 * Saturation and contrast are 8 bits, with their own representation:
152 * 8 bit field (saturation, contrast)
154 * ee = 00 = 10^-1 (0.mmmmmm)
169 * f = -f;
179 * mant = (1 << 9) - 1;
188 * s-video cable to the sky... or something.
190 * Pre-converted to appropriate hex value.
194 * PAL & NTSC values for composite & s-video connections
369 * dda2 = dda1_ideal - dda1_inc
371 * then pick a ratio for dda2 that gives the closest approximation. If
385 * These values account for -1s required.
389 .name = "NTSC-M",
394 /* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
432 .name = "NTSC-443",
437 /* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 4.43MHz */
474 .name = "NTSC-J",
480 /* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
517 .name = "PAL-M",
523 /* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
560 /* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
561 .name = "PAL-N",
605 /* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
897 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
901 __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
902 return &state->base;
935 intel_crtc_wait_for_next_vblank(to_intel_crtc(pipe_config->uapi.crtc));
953 int format = conn_state->tv.legacy_mode;
962 struct intel_display *display = to_intel_display(connector->dev);
963 const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
964 int max_dotclk = display->cdclk.max_dotclk_freq;
971 if (mode->clock > max_dotclk)
975 if (abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000) >= 1000)
984 if (tv_mode->progressive)
985 return tv_mode->nbr_end + 1;
987 return 2 * (tv_mode->nbr_end + 1);
995 mode->clock = clock / (tv_mode->oversample >> !tv_mode->progressive);
1008 mode->hdisplay =
1009 tv_mode->hblank_start - tv_mode->hblank_end;
1010 mode->hsync_start = mode->hdisplay +
1011 tv_mode->htotal - tv_mode->hblank_start;
1012 mode->hsync_end = mode->hsync_start +
1013 tv_mode->hsync_end;
1014 mode->htotal = tv_mode->htotal + 1;
1027 mode->vdisplay = intel_tv_mode_vdisplay(tv_mode);
1028 if (tv_mode->progressive) {
1029 mode->vsync_start = mode->vdisplay +
1030 tv_mode->vsync_start_f1 + 1;
1031 mode->vsync_end = mode->vsync_start +
1032 tv_mode->vsync_len;
1033 mode->vtotal = mode->vdisplay +
1034 tv_mode->vi_end_f1 + 1;
1036 mode->vsync_start = mode->vdisplay +
1037 tv_mode->vsync_start_f1 + 1 +
1038 tv_mode->vsync_start_f2 + 1;
1039 mode->vsync_end = mode->vsync_start +
1040 2 * tv_mode->vsync_len;
1041 mode->vtotal = mode->vdisplay +
1042 tv_mode->vi_end_f1 + 1 +
1043 tv_mode->vi_end_f2 + 1;
1047 mode->flags = 0;
1049 snprintf(mode->name, sizeof(mode->name),
1051 mode->hdisplay, mode->vdisplay,
1052 tv_mode->progressive ? 'p' : 'i',
1053 tv_mode->name);
1060 int hsync_start = mode->hsync_start - mode->hdisplay + right_margin;
1061 int hsync_end = mode->hsync_end - mode->hdisplay + right_margin;
1062 int new_htotal = mode->htotal * hdisplay /
1063 (mode->hdisplay - left_margin - right_margin);
1065 mode->clock = mode->clock * new_htotal / mode->htotal;
1067 mode->hdisplay = hdisplay;
1068 mode->hsync_start = hdisplay + hsync_start * new_htotal / mode->htotal;
1069 mode->hsync_end = hdisplay + hsync_end * new_htotal / mode->htotal;
1070 mode->htotal = new_htotal;
1077 int vsync_start = mode->vsync_start - mode->vdisplay + bottom_margin;
1078 int vsync_end = mode->vsync_end - mode->vdisplay + bottom_margin;
1079 int new_vtotal = mode->vtotal * vdisplay /
1080 (mode->vdisplay - top_margin - bottom_margin);
1082 mode->clock = mode->clock * new_vtotal / mode->vtotal;
1084 mode->vdisplay = vdisplay;
1085 mode->vsync_start = vdisplay + vsync_start * new_vtotal / mode->vtotal;
1086 mode->vsync_end = vdisplay + vsync_end * new_vtotal / mode->vtotal;
1087 mode->vtotal = new_vtotal;
1096 &pipe_config->hw.adjusted_mode;
1100 int hdisplay = adjusted_mode->crtc_hdisplay;
1101 int vdisplay = adjusted_mode->crtc_vdisplay;
1104 pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT);
1126 tv_mode.clock = pipe_config->port_clock;
1153 intel_tv_mode_to_mode(&mode, &tv_mode, pipe_config->port_clock);
1155 drm_dbg_kms(display->drm, "TV mode: " DRM_MODE_FMT "\n",
1159 xpos, mode.hdisplay - xsize - xpos);
1161 ypos, mode.vdisplay - ysize - ypos);
1163 adjusted_mode->crtc_clock = mode.clock;
1164 if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
1165 adjusted_mode->crtc_clock /= 2;
1168 if (display->platform.i965gm)
1169 pipe_config->mode_flags |=
1183 return tv_mode->crtc_vdisplay -
1184 conn_state->tv.margins.top -
1185 conn_state->tv.margins.bottom !=
1196 to_intel_atomic_state(pipe_config->uapi.state);
1197 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
1202 &pipe_config->hw.adjusted_mode;
1203 int hdisplay = adjusted_mode->crtc_hdisplay;
1204 int vdisplay = adjusted_mode->crtc_vdisplay;
1208 return -EINVAL;
1210 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1211 return -EINVAL;
1213 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
1214 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1216 drm_dbg_kms(display->drm, "forcing bpc to 8 for TV\n");
1217 pipe_config->pipe_bpp = 8*3;
1219 pipe_config->port_clock = tv_mode->clock;
1225 pipe_config->clock_set = true;
1227 intel_tv_mode_to_mode(adjusted_mode, tv_mode, pipe_config->port_clock);
1234 extra = adjusted_mode->crtc_vdisplay - vdisplay;
1237 drm_dbg_kms(display->drm,
1239 return -EINVAL;
1245 top = conn_state->tv.margins.top;
1246 bottom = conn_state->tv.margins.bottom;
1252 bottom = extra - top;
1254 tv_conn_state->margins.top = top;
1255 tv_conn_state->margins.bottom = bottom;
1257 tv_conn_state->bypass_vfilter = true;
1259 if (!tv_mode->progressive) {
1260 adjusted_mode->clock /= 2;
1261 adjusted_mode->crtc_clock /= 2;
1262 adjusted_mode->flags |= DRM_MODE_FLAG_INTERLACE;
1265 tv_conn_state->margins.top = conn_state->tv.margins.top;
1266 tv_conn_state->margins.bottom = conn_state->tv.margins.bottom;
1268 tv_conn_state->bypass_vfilter = false;
1271 drm_dbg_kms(display->drm, "TV mode: " DRM_MODE_FMT "\n",
1278 * time ->
1280 * dsl=vtotal-1 | |
1329 * num = cdclk * (tv_mode->oversample >> !tv_mode->progressive);
1330 * den = tv_mode->clock;
1332 * num = tv_mode->oversample >> !tv_mode->progressive;
1340 conn_state->tv.margins.left,
1341 conn_state->tv.margins.right);
1343 tv_conn_state->margins.top,
1344 tv_conn_state->margins.bottom);
1346 adjusted_mode->name[0] = '\0';
1349 if (display->platform.i965gm)
1350 pipe_config->mode_flags |=
1364 hctl1 = (tv_mode->hsync_end << TV_HSYNC_END_SHIFT) |
1365 (tv_mode->htotal << TV_HTOTAL_SHIFT);
1367 hctl2 = (tv_mode->hburst_start << 16) |
1368 (tv_mode->hburst_len << TV_HBURST_LEN_SHIFT);
1373 hctl3 = (tv_mode->hblank_start << TV_HBLANK_START_SHIFT) |
1374 (tv_mode->hblank_end << TV_HBLANK_END_SHIFT);
1376 vctl1 = (tv_mode->nbr_end << TV_NBR_END_SHIFT) |
1377 (tv_mode->vi_end_f1 << TV_VI_END_F1_SHIFT) |
1378 (tv_mode->vi_end_f2 << TV_VI_END_F2_SHIFT);
1380 vctl2 = (tv_mode->vsync_len << TV_VSYNC_LEN_SHIFT) |
1381 (tv_mode->vsync_start_f1 << TV_VSYNC_START_F1_SHIFT) |
1382 (tv_mode->vsync_start_f2 << TV_VSYNC_START_F2_SHIFT);
1384 vctl3 = (tv_mode->veq_len << TV_VEQ_LEN_SHIFT) |
1385 (tv_mode->veq_start_f1 << TV_VEQ_START_F1_SHIFT) |
1386 (tv_mode->veq_start_f2 << TV_VEQ_START_F2_SHIFT);
1388 if (tv_mode->veq_ena)
1391 vctl4 = (tv_mode->vburst_start_f1 << TV_VBURST_START_F1_SHIFT) |
1392 (tv_mode->vburst_end_f1 << TV_VBURST_END_F1_SHIFT);
1394 vctl5 = (tv_mode->vburst_start_f2 << TV_VBURST_START_F2_SHIFT) |
1395 (tv_mode->vburst_end_f2 << TV_VBURST_END_F2_SHIFT);
1397 vctl6 = (tv_mode->vburst_start_f3 << TV_VBURST_START_F3_SHIFT) |
1398 (tv_mode->vburst_end_f3 << TV_VBURST_END_F3_SHIFT);
1400 vctl7 = (tv_mode->vburst_start_f4 << TV_VBURST_START_F4_SHIFT) |
1401 (tv_mode->vburst_end_f4 << TV_VBURST_END_F4_SHIFT);
1419 (color_conversion->ry << 16) | color_conversion->gy);
1421 (color_conversion->by << 16) | color_conversion->ay);
1423 (color_conversion->ru << 16) | color_conversion->gu);
1425 (color_conversion->bu << 16) | color_conversion->au);
1427 (color_conversion->rv << 16) | color_conversion->gv);
1429 (color_conversion->bv << 16) | color_conversion->av);
1438 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
1455 switch (intel_tv->type) {
1460 video_levels = tv_mode->composite_levels;
1461 color_conversion = tv_mode->composite_color;
1462 burst_ena = tv_mode->burst_ena;
1467 if (tv_mode->burst_ena)
1475 video_levels = tv_mode->svideo_levels;
1476 color_conversion = tv_mode->svideo_color;
1477 burst_ena = tv_mode->burst_ena;
1481 tv_ctl |= TV_ENC_PIPE_SEL(crtc->pipe);
1483 switch (tv_mode->oversample) {
1498 if (tv_mode->progressive)
1500 if (tv_mode->trilevel_sync)
1502 if (tv_mode->pal_burst)
1506 if (tv_mode->dda1_inc)
1508 if (tv_mode->dda2_inc)
1510 if (tv_mode->dda3_inc)
1512 scctl1 |= tv_mode->sc_reset;
1514 scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;
1515 scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT;
1517 scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT |
1518 tv_mode->dda2_inc << TV_SCDDA2_INC_SHIFT;
1520 scctl3 = tv_mode->dda3_size << TV_SCDDA3_SIZE_SHIFT |
1521 tv_mode->dda3_inc << TV_SCDDA3_INC_SHIFT;
1524 if (display->platform.i915gm)
1542 ((video_levels->black << TV_BLACK_LEVEL_SHIFT) | (video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
1544 assert_transcoder_disabled(display, pipe_config->cpu_transcoder);
1548 if (tv_conn_state->bypass_vfilter)
1552 xsize = tv_mode->hblank_start - tv_mode->hblank_end;
1555 xpos = conn_state->tv.margins.left;
1556 ypos = tv_conn_state->margins.top;
1557 xsize -= (conn_state->tv.margins.left +
1558 conn_state->tv.margins.right);
1559 ysize -= (tv_conn_state->margins.top +
1560 tv_conn_state->margins.bottom);
1567 tv_mode->filter_table[j++]);
1570 tv_mode->filter_table[j++]);
1573 tv_mode->filter_table[j++]);
1576 tv_mode->filter_table[j++]);
1586 struct intel_display *display = to_intel_display(connector->dev);
1587 struct intel_crtc *crtc = to_intel_crtc(connector->state->crtc);
1588 struct drm_device *dev = connector->dev;
1595 if (connector->polled & DRM_CONNECTOR_POLL_HPD) {
1596 spin_lock_irq(&dev_priv->irq_lock);
1600 spin_unlock_irq(&dev_priv->irq_lock);
1609 tv_ctl |= TV_ENC_PIPE_SEL(crtc->pipe);
1626 if (display->platform.gm45)
1636 type = -1;
1638 drm_dbg_kms(display->drm, "TV detected: %x, %x\n", tv_ctl, tv_dac);
1646 drm_dbg_kms(display->drm,
1650 drm_dbg_kms(display->drm,
1651 "Detected S-Video TV connection\n");
1654 drm_dbg_kms(display->drm,
1658 drm_dbg_kms(display->drm, "Unrecognised TV connection\n");
1659 type = -1;
1670 if (connector->polled & DRM_CONNECTOR_POLL_HPD) {
1671 spin_lock_irq(&dev_priv->irq_lock);
1675 spin_unlock_irq(&dev_priv->irq_lock);
1688 const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
1692 if (intel_tv->type == DRM_MODE_CONNECTOR_Component)
1696 if (!tv_mode->component_only)
1702 if (!tv_mode->component_only)
1706 connector->state->tv.legacy_mode = i;
1714 struct intel_display *display = to_intel_display(connector->dev);
1719 drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n",
1720 connector->base.id, connector->name, force);
1726 return connector->status;
1746 intel_tv->type = type;
1752 return connector->status;
1778 return vdisplay == mode->vdisplay;
1785 mode->type = DRM_MODE_TYPE_DRIVER;
1788 mode->type |= DRM_MODE_TYPE_PREFERRED;
1794 struct intel_display *display = to_intel_display(connector->dev);
1795 const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
1802 if (input->w > 1024 &&
1803 !tv_mode->progressive &&
1804 !tv_mode->component_only)
1808 if (DISPLAY_VER(display) == 3 && input->w > 1024 &&
1809 input->h > intel_tv_mode_vdisplay(tv_mode))
1812 mode = drm_mode_create(connector->dev);
1823 intel_tv_mode_to_mode(mode, tv_mode, tv_mode->clock);
1825 drm_dbg_kms(display->drm,
1829 intel_tv_scale_mode_horiz(mode, input->w, 0, 0);
1830 intel_tv_scale_mode_vert(mode, input->h, 0, 0);
1859 if (!new_state->crtc)
1863 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
1865 if (old_state->tv.legacy_mode != new_state->tv.legacy_mode ||
1866 old_state->tv.margins.left != new_state->tv.margins.left ||
1867 old_state->tv.margins.right != new_state->tv.margins.right ||
1868 old_state->tv.margins.top != new_state->tv.margins.top ||
1869 old_state->tv.margins.bottom != new_state->tv.margins.bottom) {
1872 new_crtc_state->connectors_changed = true;
1891 struct intel_display *display = to_intel_display(connector->dev);
1892 struct drm_connector_state *conn_state = connector->state;
1897 conn_state->tv.margins.left = 54;
1898 conn_state->tv.margins.top = 36;
1899 conn_state->tv.margins.right = 46;
1900 conn_state->tv.margins.bottom = 37;
1902 conn_state->tv.legacy_mode = 0;
1912 drm_mode_create_tv_properties_legacy(display->drm, i, tv_format_names);
1914 drm_object_attach_property(&connector->base,
1915 display->drm->mode_config.legacy_tv_mode_property,
1916 conn_state->tv.legacy_mode);
1917 drm_object_attach_property(&connector->base,
1918 display->drm->mode_config.tv_left_margin_property,
1919 conn_state->tv.margins.left);
1920 drm_object_attach_property(&connector->base,
1921 display->drm->mode_config.tv_top_margin_property,
1922 conn_state->tv.margins.top);
1923 drm_object_attach_property(&connector->base,
1924 display->drm->mode_config.tv_right_margin_property,
1925 conn_state->tv.margins.right);
1926 drm_object_attach_property(&connector->base,
1927 display->drm->mode_config.tv_bottom_margin_property,
1928 conn_state->tv.margins.bottom);
1944 drm_dbg_kms(display->drm, "Integrated TV is not present.\n");
1982 intel_encoder = &intel_tv->base;
1983 connector = &intel_connector->base;
1993 * More recent chipsets favour HDMI rather than integrated S-Video.
1995 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
1996 intel_connector->base.polled = intel_connector->polled;
1998 drm_connector_init(display->drm, connector, &intel_tv_connector_funcs,
2001 drm_encoder_init(display->drm, &intel_encoder->base,
2005 intel_encoder->compute_config = intel_tv_compute_config;
2006 intel_encoder->get_config = intel_tv_get_config;
2007 intel_encoder->pre_enable = intel_tv_pre_enable;
2008 intel_encoder->enable = intel_enable_tv;
2009 intel_encoder->disable = intel_disable_tv;
2010 intel_encoder->get_hw_state = intel_tv_get_hw_state;
2011 intel_connector->get_hw_state = intel_connector_get_hw_state;
2015 intel_encoder->type = INTEL_OUTPUT_TVOUT;
2016 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
2017 intel_encoder->port = PORT_NONE;
2018 intel_encoder->pipe_mask = ~0;
2019 intel_encoder->cloneable = 0;
2020 intel_tv->type = DRM_MODE_CONNECTOR_Unknown;