2  * Copyright © 2006-2008 Intel Corporation
30  * Integrated TV-out support for the 915GM and 945GM.
136  *   ee = 00 = 10^-1 (0.mmmmmmmmm)
137  *   ee = 01 = 10^-2 (0.0mmmmmmmmm)
138  *   ee = 10 = 10^-3 (0.00mmmmmmmmm)
139  *   ee = 11 = 10^-4 (0.000mmmmmmmmm)
142  *   eee = 000 = 10^-1 (0.mmmmmmmmm)
143  *   eee = 001 = 10^-2 (0.0mmmmmmmmm)
144  *   eee = 010 = 10^-3 (0.00mmmmmmmmm)
145  *   eee = 011 = 10^-4 (0.000mmmmmmmmm)
154  *   ee = 00 = 10^-1 (0.mmmmmm)
169  *         f = -f;
179  *             mant = (1 << 9) - 1;
188  * s-video cable to the sky... or something.
190  * Pre-converted to appropriate hex value.
194  * PAL & NTSC values for composite & s-video connections
369  *  dda2 = dda1_ideal - dda1_inc
385  * These values account for -1s required.
389 		.name		= "NTSC-M",
394 		/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
432 		.name		= "NTSC-443",
437 		/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 4.43MHz */
474 		.name		= "NTSC-J",
480 		/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
517 		.name		= "PAL-M",
523 		/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
560 		/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
561 		.name	    = "PAL-N",
605 		/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
883 		u16 top, bottom;  member
897 	state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);  in intel_tv_connector_duplicate_state()
901 	__drm_atomic_helper_connector_duplicate_state(connector, &state->base);  in intel_tv_connector_duplicate_state()
902 	return &state->base;  in intel_tv_connector_duplicate_state()
935 	intel_crtc_wait_for_next_vblank(to_intel_crtc(pipe_config->uapi.crtc));  in intel_enable_tv()
953 	int format = conn_state->tv.legacy_mode;  in intel_tv_mode_find()
962 	struct intel_display *display = to_intel_display(connector->dev);  in intel_tv_mode_valid()
963 	struct drm_i915_private *i915 = to_i915(connector->dev);  in intel_tv_mode_valid()
964 	const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);  in intel_tv_mode_valid()
965 	int max_dotclk = display->cdclk.max_dotclk_freq;  in intel_tv_mode_valid()
972 	if (mode->clock > max_dotclk)  in intel_tv_mode_valid()
976 	if (abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000) >= 1000)  in intel_tv_mode_valid()
985 	if (tv_mode->progressive)  in intel_tv_mode_vdisplay()
986 		return tv_mode->nbr_end + 1;  in intel_tv_mode_vdisplay()
988 		return 2 * (tv_mode->nbr_end + 1);  in intel_tv_mode_vdisplay()
996 	mode->clock = clock / (tv_mode->oversample >> !tv_mode->progressive);  in intel_tv_mode_to_mode()
1009 	mode->hdisplay =  in intel_tv_mode_to_mode()
1010 		tv_mode->hblank_start - tv_mode->hblank_end;  in intel_tv_mode_to_mode()
1011 	mode->hsync_start = mode->hdisplay +  in intel_tv_mode_to_mode()
1012 		tv_mode->htotal - tv_mode->hblank_start;  in intel_tv_mode_to_mode()
1013 	mode->hsync_end = mode->hsync_start +  in intel_tv_mode_to_mode()
1014 		tv_mode->hsync_end;  in intel_tv_mode_to_mode()
1015 	mode->htotal = tv_mode->htotal + 1;  in intel_tv_mode_to_mode()
1028 	mode->vdisplay = intel_tv_mode_vdisplay(tv_mode);  in intel_tv_mode_to_mode()
1029 	if (tv_mode->progressive) {  in intel_tv_mode_to_mode()
1030 		mode->vsync_start = mode->vdisplay +  in intel_tv_mode_to_mode()
1031 			tv_mode->vsync_start_f1 + 1;  in intel_tv_mode_to_mode()
1032 		mode->vsync_end = mode->vsync_start +  in intel_tv_mode_to_mode()
1033 			tv_mode->vsync_len;  in intel_tv_mode_to_mode()
1034 		mode->vtotal = mode->vdisplay +  in intel_tv_mode_to_mode()
1035 			tv_mode->vi_end_f1 + 1;  in intel_tv_mode_to_mode()
1037 		mode->vsync_start = mode->vdisplay +  in intel_tv_mode_to_mode()
1038 			tv_mode->vsync_start_f1 + 1 +  in intel_tv_mode_to_mode()
1039 			tv_mode->vsync_start_f2 + 1;  in intel_tv_mode_to_mode()
1040 		mode->vsync_end = mode->vsync_start +  in intel_tv_mode_to_mode()
1041 			2 * tv_mode->vsync_len;  in intel_tv_mode_to_mode()
1042 		mode->vtotal = mode->vdisplay +  in intel_tv_mode_to_mode()
1043 			tv_mode->vi_end_f1 + 1 +  in intel_tv_mode_to_mode()
1044 			tv_mode->vi_end_f2 + 1;  in intel_tv_mode_to_mode()
1048 	mode->flags = 0;  in intel_tv_mode_to_mode()
1050 	snprintf(mode->name, sizeof(mode->name),  in intel_tv_mode_to_mode()
1052 		 mode->hdisplay, mode->vdisplay,  in intel_tv_mode_to_mode()
1053 		 tv_mode->progressive ? 'p' : 'i',  in intel_tv_mode_to_mode()
1054 		 tv_mode->name);  in intel_tv_mode_to_mode()
1061 	int hsync_start = mode->hsync_start - mode->hdisplay + right_margin;  in intel_tv_scale_mode_horiz()
1062 	int hsync_end = mode->hsync_end - mode->hdisplay + right_margin;  in intel_tv_scale_mode_horiz()
1063 	int new_htotal = mode->htotal * hdisplay /  in intel_tv_scale_mode_horiz()
1064 		(mode->hdisplay - left_margin - right_margin);  in intel_tv_scale_mode_horiz()
1066 	mode->clock = mode->clock * new_htotal / mode->htotal;  in intel_tv_scale_mode_horiz()
1068 	mode->hdisplay = hdisplay;  in intel_tv_scale_mode_horiz()
1069 	mode->hsync_start = hdisplay + hsync_start * new_htotal / mode->htotal;  in intel_tv_scale_mode_horiz()
1070 	mode->hsync_end = hdisplay + hsync_end * new_htotal / mode->htotal;  in intel_tv_scale_mode_horiz()
1071 	mode->htotal = new_htotal;  in intel_tv_scale_mode_horiz()
1078 	int vsync_start = mode->vsync_start - mode->vdisplay + bottom_margin;  in intel_tv_scale_mode_vert()
1079 	int vsync_end = mode->vsync_end - mode->vdisplay + bottom_margin;  in intel_tv_scale_mode_vert()
1080 	int new_vtotal = mode->vtotal * vdisplay /  in intel_tv_scale_mode_vert()
1081 		(mode->vdisplay - top_margin - bottom_margin);  in intel_tv_scale_mode_vert()
1083 	mode->clock = mode->clock * new_vtotal / mode->vtotal;  in intel_tv_scale_mode_vert()
1085 	mode->vdisplay = vdisplay;  in intel_tv_scale_mode_vert()
1086 	mode->vsync_start = vdisplay + vsync_start * new_vtotal / mode->vtotal;  in intel_tv_scale_mode_vert()
1087 	mode->vsync_end = vdisplay + vsync_end * new_vtotal / mode->vtotal;  in intel_tv_scale_mode_vert()
1088 	mode->vtotal = new_vtotal;  in intel_tv_scale_mode_vert()
1097 		&pipe_config->hw.adjusted_mode;  in intel_tv_get_config()
1101 	int hdisplay = adjusted_mode->crtc_hdisplay;  in intel_tv_get_config()
1102 	int vdisplay = adjusted_mode->crtc_vdisplay;  in intel_tv_get_config()
1105 	pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT);  in intel_tv_get_config()
1127 	tv_mode.clock = pipe_config->port_clock;  in intel_tv_get_config()
1154 	intel_tv_mode_to_mode(&mode, &tv_mode, pipe_config->port_clock);  in intel_tv_get_config()
1156 	drm_dbg_kms(display->drm, "TV mode: " DRM_MODE_FMT "\n",  in intel_tv_get_config()
1160 				  xpos, mode.hdisplay - xsize - xpos);  in intel_tv_get_config()
1162 				 ypos, mode.vdisplay - ysize - ypos);  in intel_tv_get_config()
1164 	adjusted_mode->crtc_clock = mode.clock;  in intel_tv_get_config()
1165 	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)  in intel_tv_get_config()
1166 		adjusted_mode->crtc_clock /= 2;  in intel_tv_get_config()
1169 	if (display->platform.i965gm)  in intel_tv_get_config()
1170 		pipe_config->mode_flags |=  in intel_tv_get_config()
1184 	return tv_mode->crtc_vdisplay -  in intel_tv_vert_scaling()
1185 		conn_state->tv.margins.top -  in intel_tv_vert_scaling()
1186 		conn_state->tv.margins.bottom !=  in intel_tv_vert_scaling()
1197 		to_intel_atomic_state(pipe_config->uapi.state);  in intel_tv_compute_config()
1198 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);  in intel_tv_compute_config()
1203 		&pipe_config->hw.adjusted_mode;  in intel_tv_compute_config()
1204 	int hdisplay = adjusted_mode->crtc_hdisplay;  in intel_tv_compute_config()
1205 	int vdisplay = adjusted_mode->crtc_vdisplay;  in intel_tv_compute_config()
1209 		return -EINVAL;  in intel_tv_compute_config()
1211 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)  in intel_tv_compute_config()
1212 		return -EINVAL;  in intel_tv_compute_config()
1214 	pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;  in intel_tv_compute_config()
1215 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;  in intel_tv_compute_config()
1217 	drm_dbg_kms(display->drm, "forcing bpc to 8 for TV\n");  in intel_tv_compute_config()
1218 	pipe_config->pipe_bpp = 8*3;  in intel_tv_compute_config()
1220 	pipe_config->port_clock = tv_mode->clock;  in intel_tv_compute_config()
1226 	pipe_config->clock_set = true;  in intel_tv_compute_config()
1228 	intel_tv_mode_to_mode(adjusted_mode, tv_mode, pipe_config->port_clock);  in intel_tv_compute_config()
1233 		int extra, top, bottom;  in intel_tv_compute_config()  local
1235 		extra = adjusted_mode->crtc_vdisplay - vdisplay;  in intel_tv_compute_config()
1238 			drm_dbg_kms(display->drm,  in intel_tv_compute_config()
1240 			return -EINVAL;  in intel_tv_compute_config()
1246 		top = conn_state->tv.margins.top;  in intel_tv_compute_config()
1247 		bottom = conn_state->tv.margins.bottom;  in intel_tv_compute_config()
1249 		if (top + bottom)  in intel_tv_compute_config()
1250 			top = extra * top / (top + bottom);  in intel_tv_compute_config()
1253 		bottom = extra - top;  in intel_tv_compute_config()
1255 		tv_conn_state->margins.top = top;  in intel_tv_compute_config()
1256 		tv_conn_state->margins.bottom = bottom;  in intel_tv_compute_config()
1258 		tv_conn_state->bypass_vfilter = true;  in intel_tv_compute_config()
1260 		if (!tv_mode->progressive) {  in intel_tv_compute_config()
1261 			adjusted_mode->clock /= 2;  in intel_tv_compute_config()
1262 			adjusted_mode->crtc_clock /= 2;  in intel_tv_compute_config()
1263 			adjusted_mode->flags |= DRM_MODE_FLAG_INTERLACE;  in intel_tv_compute_config()
1266 		tv_conn_state->margins.top = conn_state->tv.margins.top;  in intel_tv_compute_config()
1267 		tv_conn_state->margins.bottom = conn_state->tv.margins.bottom;  in intel_tv_compute_config()
1269 		tv_conn_state->bypass_vfilter = false;  in intel_tv_compute_config()
1272 	drm_dbg_kms(display->drm, "TV mode: " DRM_MODE_FMT "\n",  in intel_tv_compute_config()
1279 	 * time ->  in intel_tv_compute_config()
1281 	 * dsl=vtotal-1       |             |  in intel_tv_compute_config()
1290 	 *         | | |   bottom margin  in intel_tv_compute_config()
1298 	 * check. When the TV encoder reaches the bottom margin the  in intel_tv_compute_config()
1310 	 * Due to the variation in the actual pipe speed the scanline  in intel_tv_compute_config()
1321 	 * everywhere except during the bottom margin (there the  in intel_tv_compute_config()
1330 	 *	num = cdclk * (tv_mode->oversample >> !tv_mode->progressive);  in intel_tv_compute_config()
1331 	 *	den = tv_mode->clock;  in intel_tv_compute_config()
1333 	 *	num = tv_mode->oversample >> !tv_mode->progressive;  in intel_tv_compute_config()
1341 				  conn_state->tv.margins.left,  in intel_tv_compute_config()
1342 				  conn_state->tv.margins.right);  in intel_tv_compute_config()
1344 				 tv_conn_state->margins.top,  in intel_tv_compute_config()
1345 				 tv_conn_state->margins.bottom);  in intel_tv_compute_config()
1347 	adjusted_mode->name[0] = '\0';  in intel_tv_compute_config()
1350 	if (display->platform.i965gm)  in intel_tv_compute_config()
1351 		pipe_config->mode_flags |=  in intel_tv_compute_config()
1365 	hctl1 = (tv_mode->hsync_end << TV_HSYNC_END_SHIFT) |  in set_tv_mode_timings()
1366 		(tv_mode->htotal << TV_HTOTAL_SHIFT);  in set_tv_mode_timings()
1368 	hctl2 = (tv_mode->hburst_start << 16) |  in set_tv_mode_timings()
1369 		(tv_mode->hburst_len << TV_HBURST_LEN_SHIFT);  in set_tv_mode_timings()
1374 	hctl3 = (tv_mode->hblank_start << TV_HBLANK_START_SHIFT) |  in set_tv_mode_timings()
1375 		(tv_mode->hblank_end << TV_HBLANK_END_SHIFT);  in set_tv_mode_timings()
1377 	vctl1 = (tv_mode->nbr_end << TV_NBR_END_SHIFT) |  in set_tv_mode_timings()
1378 		(tv_mode->vi_end_f1 << TV_VI_END_F1_SHIFT) |  in set_tv_mode_timings()
1379 		(tv_mode->vi_end_f2 << TV_VI_END_F2_SHIFT);  in set_tv_mode_timings()
1381 	vctl2 = (tv_mode->vsync_len << TV_VSYNC_LEN_SHIFT) |  in set_tv_mode_timings()
1382 		(tv_mode->vsync_start_f1 << TV_VSYNC_START_F1_SHIFT) |  in set_tv_mode_timings()
1383 		(tv_mode->vsync_start_f2 << TV_VSYNC_START_F2_SHIFT);  in set_tv_mode_timings()
1385 	vctl3 = (tv_mode->veq_len << TV_VEQ_LEN_SHIFT) |  in set_tv_mode_timings()
1386 		(tv_mode->veq_start_f1 << TV_VEQ_START_F1_SHIFT) |  in set_tv_mode_timings()
1387 		(tv_mode->veq_start_f2 << TV_VEQ_START_F2_SHIFT);  in set_tv_mode_timings()
1389 	if (tv_mode->veq_ena)  in set_tv_mode_timings()
1392 	vctl4 = (tv_mode->vburst_start_f1 << TV_VBURST_START_F1_SHIFT) |  in set_tv_mode_timings()
1393 		(tv_mode->vburst_end_f1 << TV_VBURST_END_F1_SHIFT);  in set_tv_mode_timings()
1395 	vctl5 = (tv_mode->vburst_start_f2 << TV_VBURST_START_F2_SHIFT) |  in set_tv_mode_timings()
1396 		(tv_mode->vburst_end_f2 << TV_VBURST_END_F2_SHIFT);  in set_tv_mode_timings()
1398 	vctl6 = (tv_mode->vburst_start_f3 << TV_VBURST_START_F3_SHIFT) |  in set_tv_mode_timings()
1399 		(tv_mode->vburst_end_f3 << TV_VBURST_END_F3_SHIFT);  in set_tv_mode_timings()
1401 	vctl7 = (tv_mode->vburst_start_f4 << TV_VBURST_START_F4_SHIFT) |  in set_tv_mode_timings()
1402 		(tv_mode->vburst_end_f4 << TV_VBURST_END_F4_SHIFT);  in set_tv_mode_timings()
1420 		       (color_conversion->ry << 16) | color_conversion->gy);  in set_color_conversion()
1422 		       (color_conversion->by << 16) | color_conversion->ay);  in set_color_conversion()
1424 		       (color_conversion->ru << 16) | color_conversion->gu);  in set_color_conversion()
1426 		       (color_conversion->bu << 16) | color_conversion->au);  in set_color_conversion()
1428 		       (color_conversion->rv << 16) | color_conversion->gv);  in set_color_conversion()
1430 		       (color_conversion->bv << 16) | color_conversion->av);  in set_color_conversion()
1439 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);  in intel_tv_pre_enable()
1440 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);  in intel_tv_pre_enable()
1457 	switch (intel_tv->type) {  in intel_tv_pre_enable()
1462 		video_levels = tv_mode->composite_levels;  in intel_tv_pre_enable()
1463 		color_conversion = tv_mode->composite_color;  in intel_tv_pre_enable()
1464 		burst_ena = tv_mode->burst_ena;  in intel_tv_pre_enable()
1469 		if (tv_mode->burst_ena)  in intel_tv_pre_enable()
1477 		video_levels = tv_mode->svideo_levels;  in intel_tv_pre_enable()
1478 		color_conversion = tv_mode->svideo_color;  in intel_tv_pre_enable()
1479 		burst_ena = tv_mode->burst_ena;  in intel_tv_pre_enable()
1483 	tv_ctl |= TV_ENC_PIPE_SEL(crtc->pipe);  in intel_tv_pre_enable()
1485 	switch (tv_mode->oversample) {  in intel_tv_pre_enable()
1500 	if (tv_mode->progressive)  in intel_tv_pre_enable()
1502 	if (tv_mode->trilevel_sync)  in intel_tv_pre_enable()
1504 	if (tv_mode->pal_burst)  in intel_tv_pre_enable()
1508 	if (tv_mode->dda1_inc)  in intel_tv_pre_enable()
1510 	if (tv_mode->dda2_inc)  in intel_tv_pre_enable()
1512 	if (tv_mode->dda3_inc)  in intel_tv_pre_enable()
1514 	scctl1 |= tv_mode->sc_reset;  in intel_tv_pre_enable()
1516 		scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;  in intel_tv_pre_enable()
1517 	scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT;  in intel_tv_pre_enable()
1519 	scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT |  in intel_tv_pre_enable()
1520 		tv_mode->dda2_inc << TV_SCDDA2_INC_SHIFT;  in intel_tv_pre_enable()
1522 	scctl3 = tv_mode->dda3_size << TV_SCDDA3_SIZE_SHIFT |  in intel_tv_pre_enable()
1523 		tv_mode->dda3_inc << TV_SCDDA3_INC_SHIFT;  in intel_tv_pre_enable()
1526 	if (display->platform.i915gm)  in intel_tv_pre_enable()
1544 …  ((video_levels->black << TV_BLACK_LEVEL_SHIFT) | (video_levels->blank << TV_BLANK_LEVEL_SHIFT)));  in intel_tv_pre_enable()
1546 	assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);  in intel_tv_pre_enable()
1550 	if (tv_conn_state->bypass_vfilter)  in intel_tv_pre_enable()
1554 	xsize = tv_mode->hblank_start - tv_mode->hblank_end;  in intel_tv_pre_enable()
1557 	xpos = conn_state->tv.margins.left;  in intel_tv_pre_enable()
1558 	ypos = tv_conn_state->margins.top;  in intel_tv_pre_enable()
1559 	xsize -= (conn_state->tv.margins.left +  in intel_tv_pre_enable()
1560 		  conn_state->tv.margins.right);  in intel_tv_pre_enable()
1561 	ysize -= (tv_conn_state->margins.top +  in intel_tv_pre_enable()
1562 		  tv_conn_state->margins.bottom);  in intel_tv_pre_enable()
1569 			       tv_mode->filter_table[j++]);  in intel_tv_pre_enable()
1572 			       tv_mode->filter_table[j++]);  in intel_tv_pre_enable()
1575 			       tv_mode->filter_table[j++]);  in intel_tv_pre_enable()
1578 			       tv_mode->filter_table[j++]);  in intel_tv_pre_enable()
1588 	struct intel_display *display = to_intel_display(connector->dev);  in intel_tv_detect_type()
1589 	struct intel_crtc *crtc = to_intel_crtc(connector->state->crtc);  in intel_tv_detect_type()
1590 	struct drm_device *dev = connector->dev;  in intel_tv_detect_type()
1597 	if (connector->polled & DRM_CONNECTOR_POLL_HPD) {  in intel_tv_detect_type()
1598 		spin_lock_irq(&dev_priv->irq_lock);  in intel_tv_detect_type()
1602 		spin_unlock_irq(&dev_priv->irq_lock);  in intel_tv_detect_type()
1611 	tv_ctl |= TV_ENC_PIPE_SEL(crtc->pipe);  in intel_tv_detect_type()
1628 	if (display->platform.gm45)  in intel_tv_detect_type()
1638 	type = -1;  in intel_tv_detect_type()
1640 	drm_dbg_kms(display->drm, "TV detected: %x, %x\n", tv_ctl, tv_dac);  in intel_tv_detect_type()
1648 		drm_dbg_kms(display->drm,  in intel_tv_detect_type()
1652 		drm_dbg_kms(display->drm,  in intel_tv_detect_type()
1653 			    "Detected S-Video TV connection\n");  in intel_tv_detect_type()
1656 		drm_dbg_kms(display->drm,  in intel_tv_detect_type()
1660 		drm_dbg_kms(display->drm, "Unrecognised TV connection\n");  in intel_tv_detect_type()
1661 		type = -1;  in intel_tv_detect_type()
1672 	if (connector->polled & DRM_CONNECTOR_POLL_HPD) {  in intel_tv_detect_type()
1673 		spin_lock_irq(&dev_priv->irq_lock);  in intel_tv_detect_type()
1677 		spin_unlock_irq(&dev_priv->irq_lock);  in intel_tv_detect_type()
1690 	const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);  in intel_tv_find_better_format()
1694 	if (intel_tv->type == DRM_MODE_CONNECTOR_Component)  in intel_tv_find_better_format()
1698 	if (!tv_mode->component_only)  in intel_tv_find_better_format()
1704 		if (!tv_mode->component_only)  in intel_tv_find_better_format()
1708 	connector->state->tv.legacy_mode = i;  in intel_tv_find_better_format()
1716 	struct intel_display *display = to_intel_display(connector->dev);  in intel_tv_detect()
1717 	struct drm_i915_private *i915 = to_i915(connector->dev);  in intel_tv_detect()
1722 	drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n",  in intel_tv_detect()
1723 		    connector->base.id, connector->name, force);  in intel_tv_detect()
1729 		return connector->status;  in intel_tv_detect()
1749 			intel_tv->type = type;  in intel_tv_detect()
1755 		return connector->status;  in intel_tv_detect()
1781 	return vdisplay == mode->vdisplay;  in intel_tv_is_preferred_mode()
1788 	mode->type = DRM_MODE_TYPE_DRIVER;  in intel_tv_set_mode_type()
1791 		mode->type |= DRM_MODE_TYPE_PREFERRED;  in intel_tv_set_mode_type()
1797 	struct intel_display *display = to_intel_display(connector->dev);  in intel_tv_get_modes()
1798 	const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);  in intel_tv_get_modes()
1805 		if (input->w > 1024 &&  in intel_tv_get_modes()
1806 		    !tv_mode->progressive &&  in intel_tv_get_modes()
1807 		    !tv_mode->component_only)  in intel_tv_get_modes()
1811 		if (DISPLAY_VER(display) == 3 && input->w > 1024 &&  in intel_tv_get_modes()
1812 		    input->h > intel_tv_mode_vdisplay(tv_mode))  in intel_tv_get_modes()
1815 		mode = drm_mode_create(connector->dev);  in intel_tv_get_modes()
1826 		intel_tv_mode_to_mode(mode, tv_mode, tv_mode->clock);  in intel_tv_get_modes()
1828 			drm_dbg_kms(display->drm,  in intel_tv_get_modes()
1832 		intel_tv_scale_mode_horiz(mode, input->w, 0, 0);  in intel_tv_get_modes()
1833 		intel_tv_scale_mode_vert(mode, input->h, 0, 0);  in intel_tv_get_modes()
1862 	if (!new_state->crtc)  in intel_tv_atomic_check()
1866 	new_crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);  in intel_tv_atomic_check()
1868 	if (old_state->tv.legacy_mode != new_state->tv.legacy_mode ||  in intel_tv_atomic_check()
1869 	    old_state->tv.margins.left != new_state->tv.margins.left ||  in intel_tv_atomic_check()
1870 	    old_state->tv.margins.right != new_state->tv.margins.right ||  in intel_tv_atomic_check()
1871 	    old_state->tv.margins.top != new_state->tv.margins.top ||  in intel_tv_atomic_check()
1872 	    old_state->tv.margins.bottom != new_state->tv.margins.bottom) {  in intel_tv_atomic_check()
1875 		new_crtc_state->connectors_changed = true;  in intel_tv_atomic_check()
1894 	struct intel_display *display = to_intel_display(connector->dev);  in intel_tv_add_properties()
1895 	struct drm_connector_state *conn_state = connector->state;  in intel_tv_add_properties()
1900 	conn_state->tv.margins.left = 54;  in intel_tv_add_properties()
1901 	conn_state->tv.margins.top = 36;  in intel_tv_add_properties()
1902 	conn_state->tv.margins.right = 46;  in intel_tv_add_properties()
1903 	conn_state->tv.margins.bottom = 37;  in intel_tv_add_properties()
1905 	conn_state->tv.legacy_mode = 0;  in intel_tv_add_properties()
1915 	drm_mode_create_tv_properties_legacy(display->drm, i, tv_format_names);  in intel_tv_add_properties()
1917 	drm_object_attach_property(&connector->base,  in intel_tv_add_properties()
1918 				   display->drm->mode_config.legacy_tv_mode_property,  in intel_tv_add_properties()
1919 				   conn_state->tv.legacy_mode);  in intel_tv_add_properties()
1920 	drm_object_attach_property(&connector->base,  in intel_tv_add_properties()
1921 				   display->drm->mode_config.tv_left_margin_property,  in intel_tv_add_properties()
1922 				   conn_state->tv.margins.left);  in intel_tv_add_properties()
1923 	drm_object_attach_property(&connector->base,  in intel_tv_add_properties()
1924 				   display->drm->mode_config.tv_top_margin_property,  in intel_tv_add_properties()
1925 				   conn_state->tv.margins.top);  in intel_tv_add_properties()
1926 	drm_object_attach_property(&connector->base,  in intel_tv_add_properties()
1927 				   display->drm->mode_config.tv_right_margin_property,  in intel_tv_add_properties()
1928 				   conn_state->tv.margins.right);  in intel_tv_add_properties()
1929 	drm_object_attach_property(&connector->base,  in intel_tv_add_properties()
1930 				   display->drm->mode_config.tv_bottom_margin_property,  in intel_tv_add_properties()
1931 				   conn_state->tv.margins.bottom);  in intel_tv_add_properties()
1947 		drm_dbg_kms(display->drm, "Integrated TV is not present.\n");  in intel_tv_init()
1985 	intel_encoder = &intel_tv->base;  in intel_tv_init()
1986 	connector = &intel_connector->base;  in intel_tv_init()
1996 	 * More recent chipsets favour HDMI rather than integrated S-Video.  in intel_tv_init()
1998 	intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;  in intel_tv_init()
1999 	intel_connector->base.polled = intel_connector->polled;  in intel_tv_init()
2001 	drm_connector_init(display->drm, connector, &intel_tv_connector_funcs,  in intel_tv_init()
2004 	drm_encoder_init(display->drm, &intel_encoder->base,  in intel_tv_init()
2008 	intel_encoder->compute_config = intel_tv_compute_config;  in intel_tv_init()
2009 	intel_encoder->get_config = intel_tv_get_config;  in intel_tv_init()
2010 	intel_encoder->pre_enable = intel_tv_pre_enable;  in intel_tv_init()
2011 	intel_encoder->enable = intel_enable_tv;  in intel_tv_init()
2012 	intel_encoder->disable = intel_disable_tv;  in intel_tv_init()
2013 	intel_encoder->get_hw_state = intel_tv_get_hw_state;  in intel_tv_init()
2014 	intel_connector->get_hw_state = intel_connector_get_hw_state;  in intel_tv_init()
2018 	intel_encoder->type = INTEL_OUTPUT_TVOUT;  in intel_tv_init()
2019 	intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;  in intel_tv_init()
2020 	intel_encoder->port = PORT_NONE;  in intel_tv_init()
2021 	intel_encoder->pipe_mask = ~0;  in intel_tv_init()
2022 	intel_encoder->cloneable = 0;  in intel_tv_init()
2023 	intel_tv->type = DRM_MODE_CONNECTOR_Unknown;  in intel_tv_init()