Lines Matching +full:port +full:- +full:base
1 // SPDX-License-Identifier: MIT
55 struct mutex lock; /* protects the TypeC port mode */
82 [TC_PORT_TBT_ALT] = "tbt-alt",
83 [TC_PORT_DP_ALT] = "dp-alt",
95 return dig_port->tc;
103 return intel_encoder_is_tc(&dig_port->base) && tc->mode == mode;
125 return intel_encoder_is_tc(&dig_port->base) && !tc->legacy_port;
130 * platform and TC mode (legacy, DP-alt, TBT):
133 * --------------------------
135 * - TCSS/IOM access for PHY ready state.
137 * - DE/north-,south-HPD ISR access for HPD live state.
139 * POWER_DOMAIN_PORT_DDI_LANES_<port>:
140 * -----------------------------------
142 * - DE/DDI_BUF access for port enabled state.
144 * - DE/DDI_BUF access for PHY owned state.
146 * POWER_DOMAIN_AUX_USBC<TC port index>:
147 * -------------------------------------
149 * - TCSS/IOM,FIA access for PHY ready, owned and HPD live state
150 * - TCSS/PHY: block TC-cold power state for using the PHY AUX and
152 * ADLP/legacy, DP-alt modes:
153 * - TCSS/PHY: block TC-cold power state for using the PHY AUX and
157 * -------------------------
158 * ICL/DP-alt, TBT mode:
159 * - TCSS/TBT: block TC-cold power state for using the (direct or
160 * TBT DP-IN) AUX and main lanes.
163 * - TCSS/IOM,FIA access for PHY ready, owned and HPD live state
164 * - TCSS/PHY: block TC-cold power state for using the (direct or
165 * TBT DP-IN) AUX and main lanes.
168 * - TCSS/TBT: block TC-cold power state for using the (TBT DP-IN)
172 * - TCSS/IOM,FIA access for PHY ready, owned state
173 * - TCSS/PHY: block TC-cold power state for using the (direct or
174 * TBT DP-IN) AUX and main lanes.
182 intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
188 struct intel_display *display = to_intel_display(tc->dig_port);
203 tc->lock_power_domain = domain;
212 struct intel_display *display = to_intel_display(tc->dig_port);
220 struct intel_display __maybe_unused *display = to_intel_display(tc->dig_port);
224 drm_WARN_ON(display->drm, tc->lock_power_domain != domain);
232 struct intel_display *display = to_intel_display(tc->dig_port);
234 drm_WARN_ON(display->drm,
241 struct intel_display *display = to_intel_display(tc->dig_port);
246 drm_WARN_ON(display->drm, !enabled);
252 enum tc_port tc_port = intel_encoder_to_tc(&tc->dig_port->base);
254 return POWER_DOMAIN_PORT_DDI_LANES_TC1 + tc_port - TC_PORT_1;
260 struct intel_display *display = to_intel_display(tc->dig_port);
262 drm_WARN_ON(display->drm,
272 lane_mask = intel_de_read(display, PORT_TX_DFLEXDPSP(tc->phy_fia));
274 drm_WARN_ON(display->drm, lane_mask == 0xffffffff);
277 lane_mask &= DP_LANE_ASSIGNMENT_MASK(tc->phy_fia_idx);
278 return lane_mask >> DP_LANE_ASSIGNMENT_SHIFT(tc->phy_fia_idx);
287 pin_mask = intel_de_read(display, PORT_TX_DFLEXPA1(tc->phy_fia));
289 drm_WARN_ON(display->drm, pin_mask == 0xffffffff);
292 return (pin_mask & DP_PIN_ASSIGNMENT_MASK(tc->phy_fia_idx)) >>
293 DP_PIN_ASSIGNMENT_SHIFT(tc->phy_fia_idx);
299 enum tc_port tc_port = intel_encoder_to_tc(&dig_port->base);
373 if (!intel_encoder_is_tc(&dig_port->base) || tc->mode != TC_PORT_DP_ALT)
392 bool lane_reversal = dig_port->lane_reversal;
398 drm_WARN_ON(display->drm,
399 lane_reversal && tc->mode != TC_PORT_LEGACY);
403 val = intel_de_read(display, PORT_TX_DFLEXDPMLE1(tc->phy_fia));
404 val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc->phy_fia_idx);
409 DFLEXDPMLE1_DPMLETC_ML3(tc->phy_fia_idx) :
410 DFLEXDPMLE1_DPMLETC_ML0(tc->phy_fia_idx);
414 DFLEXDPMLE1_DPMLETC_ML3_2(tc->phy_fia_idx) :
415 DFLEXDPMLE1_DPMLETC_ML1_0(tc->phy_fia_idx);
418 val |= DFLEXDPMLE1_DPMLETC_ML3_0(tc->phy_fia_idx);
424 intel_de_write(display, PORT_TX_DFLEXDPMLE1(tc->phy_fia), val);
430 struct intel_display *display = to_intel_display(tc->dig_port);
433 drm_WARN_ON(display->drm, tc->mode != TC_PORT_DISCONNECTED);
438 if (tc->legacy_port)
448 drm_dbg_kms(display->drm,
449 "Port %s: live status %08x mismatches the legacy port flag %08x, fixing flag\n",
450 tc->port_name, live_status_mask, valid_hpd_mask);
452 tc->legacy_port = !tc->legacy_port;
457 enum tc_port tc_port = intel_encoder_to_tc(&tc->dig_port->base);
464 tc->phy_fia = tc_port / 2;
465 tc->phy_fia_idx = tc_port % 2;
467 tc->phy_fia = FIA1;
468 tc->phy_fia_idx = tc_port;
474 * -------------------
479 struct intel_display *display = to_intel_display(tc->dig_port);
480 struct intel_digital_port *dig_port = tc->dig_port;
482 if (tc->legacy_port)
483 return intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
490 struct intel_display *display = to_intel_display(tc->dig_port);
491 struct intel_digital_port *dig_port = tc->dig_port;
492 u32 isr_bit = display->hotplug.pch_hpd[dig_port->base.hpd_pin];
499 fia_isr = intel_de_read(display, PORT_TX_DFLEXDPSP(tc->phy_fia));
504 drm_dbg_kms(display->drm,
505 "Port %s: PHY in TCCOLD, nothing connected\n",
506 tc->port_name);
510 if (fia_isr & TC_LIVE_STATE_TBT(tc->phy_fia_idx))
512 if (fia_isr & TC_LIVE_STATE_TC(tc->phy_fia_idx))
523 * PHY ownership. The IOM firmware sets this flag when a DP-alt or legacy sink
525 * will be left cleared when a TBT-alt sink is connected, where the PHY is
531 struct intel_display *display = to_intel_display(tc->dig_port);
536 val = intel_de_read(display, PORT_TX_DFLEXDPPMS(tc->phy_fia));
538 drm_dbg_kms(display->drm,
539 "Port %s: PHY in TCCOLD, assuming not ready\n",
540 tc->port_name);
544 return val & DP_PHY_MODE_STATUS_COMPLETED(tc->phy_fia_idx);
550 struct intel_display *display = to_intel_display(tc->dig_port);
555 val = intel_de_read(display, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
557 drm_dbg_kms(display->drm,
558 "Port %s: PHY in TCCOLD, can't %s ownership\n",
559 tc->port_name, take ? "take" : "release");
564 val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
566 val |= DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
568 intel_de_write(display, PORT_TX_DFLEXDPCSSS(tc->phy_fia), val);
575 struct intel_display *display = to_intel_display(tc->dig_port);
580 val = intel_de_read(display, PORT_TX_DFLEXDPCSSS(tc->phy_fia));
582 drm_dbg_kms(display->drm,
583 "Port %s: PHY in TCCOLD, assume not owned\n",
584 tc->port_name);
588 return val & DP_PHY_MODE_STATUS_NOT_SAFE(tc->phy_fia_idx);
598 tc->mode = tc_phy_get_current_mode(tc);
599 if (tc->mode != TC_PORT_DISCONNECTED)
600 tc->lock_wakeref = tc_cold_block(tc);
610 * Unlike the other ports, type-C ports are not available to use as soon as we
611 * get a hotplug. The type-C PHYs can be shared between multiple controllers:
614 * set the type-C power state.
619 struct intel_display *display = to_intel_display(tc->dig_port);
620 struct intel_digital_port *dig_port = tc->dig_port;
624 if (tc->mode == TC_PORT_LEGACY) {
625 drm_WARN_ON(display->drm, max_lanes != 4);
629 drm_WARN_ON(display->drm, tc->mode != TC_PORT_DP_ALT);
632 * Now we have to re-check the live state, in case the port recently
636 drm_dbg_kms(display->drm, "Port %s: PHY sudden disconnect\n",
637 tc->port_name);
642 drm_dbg_kms(display->drm,
643 "Port %s: PHY max lanes %d < required lanes %d\n",
644 tc->port_name,
655 struct intel_display *display = to_intel_display(tc->dig_port);
657 tc->lock_wakeref = tc_cold_block(tc);
659 if (tc->mode == TC_PORT_TBT_ALT)
664 !drm_WARN_ON(display->drm, tc->mode == TC_PORT_LEGACY)) {
665 drm_dbg_kms(display->drm, "Port %s: can't take PHY ownership (ready %s)\n",
666 tc->port_name,
680 tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
691 switch (tc->mode) {
697 tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
700 MISSING_CASE(tc->mode);
722 * -------------------
732 struct intel_display *display = to_intel_display(tc->dig_port);
739 drm_WARN_ON(display->drm, val == 0xffffffff);
757 * --------------------
762 struct intel_display *display = to_intel_display(tc->dig_port);
763 struct intel_digital_port *dig_port = tc->dig_port;
765 if (tc->mode != TC_PORT_TBT_ALT)
766 return intel_display_power_legacy_aux_domain(display, dig_port->aux_ch);
773 struct intel_display *display = to_intel_display(tc->dig_port);
774 struct intel_digital_port *dig_port = tc->dig_port;
775 enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
776 u32 cpu_isr_bits = display->hotplug.hpd[hpd_pin];
777 u32 pch_isr_bit = display->hotplug.pch_hpd[hpd_pin];
802 * the ownership to display, regardless of what sink is connected (TBT-alt,
803 * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
808 struct intel_display *display = to_intel_display(tc->dig_port);
809 enum tc_port tc_port = intel_encoder_to_tc(&tc->dig_port->base);
816 drm_dbg_kms(display->drm,
817 "Port %s: PHY in TCCOLD, assuming not ready\n",
818 tc->port_name);
828 struct intel_display *display = to_intel_display(tc->dig_port);
829 enum port port = tc->dig_port->base.port;
833 intel_de_rmw(display, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
841 struct intel_display *display = to_intel_display(tc->dig_port);
842 enum port port = tc->dig_port->base.port;
847 val = intel_de_read(display, DDI_BUF_CTL(port));
853 struct intel_display *display = to_intel_display(tc->dig_port);
860 tc->mode = tc_phy_get_current_mode(tc);
861 if (tc->mode != TC_PORT_DISCONNECTED)
862 tc->lock_wakeref = tc_cold_block(tc);
869 struct intel_display *display = to_intel_display(tc->dig_port);
874 if (tc->mode == TC_PORT_TBT_ALT) {
875 tc->lock_wakeref = tc_cold_block(tc);
882 !drm_WARN_ON(display->drm, tc->mode == TC_PORT_LEGACY)) {
883 drm_dbg_kms(display->drm, "Port %s: can't take PHY ownership\n",
884 tc->port_name);
889 !drm_WARN_ON(display->drm, tc->mode == TC_PORT_LEGACY)) {
890 drm_dbg_kms(display->drm, "Port %s: PHY not ready\n",
891 tc->port_name);
895 tc->lock_wakeref = tc_cold_block(tc);
905 tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
916 struct intel_display *display = to_intel_display(tc->dig_port);
923 tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
925 switch (tc->mode) {
933 MISSING_CASE(tc->mode);
957 * ----------------------
961 struct intel_display *display = to_intel_display(tc->dig_port);
962 struct intel_digital_port *dig_port = tc->dig_port;
963 enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
964 u32 pica_isr_bits = display->hotplug.hpd[hpd_pin];
965 u32 pch_isr_bit = display->hotplug.pch_hpd[hpd_pin];
981 if (tc->legacy_port && (pch_isr & pch_isr_bit))
990 struct intel_display *display = to_intel_display(tc->dig_port);
991 enum port port = tc->dig_port->base.port;
992 i915_reg_t reg = XELPDP_PORT_BUF_CTL1(display, port);
1002 struct intel_display *display = to_intel_display(tc->dig_port);
1005 drm_dbg_kms(display->drm,
1006 "Port %s: timeout waiting for TCSS power to get %s\n",
1008 tc->port_name);
1017 * handshake violation when pwwreq= 0->1 during TC7/10 entry
1024 drm_dbg_kms(display->drm,
1037 drm_dbg_kms(display->drm,
1045 struct intel_display *display = to_intel_display(tc->dig_port);
1046 enum port port = tc->dig_port->base.port;
1047 i915_reg_t reg = XELPDP_PORT_BUF_CTL1(display, port);
1065 struct intel_display *display = to_intel_display(tc->dig_port);
1078 if (drm_WARN_ON(display->drm, tc->mode == TC_PORT_LEGACY))
1092 struct intel_display *display = to_intel_display(tc->dig_port);
1093 enum port port = tc->dig_port->base.port;
1094 i915_reg_t reg = XELPDP_PORT_BUF_CTL1(display, port);
1109 struct intel_display *display = to_intel_display(tc->dig_port);
1110 enum port port = tc->dig_port->base.port;
1111 i915_reg_t reg = XELPDP_PORT_BUF_CTL1(display, port);
1120 struct intel_display *display = to_intel_display(tc->dig_port);
1126 tc->mode = tc_phy_get_current_mode(tc);
1127 if (tc->mode != TC_PORT_DISCONNECTED)
1128 tc->lock_wakeref = tc_cold_block(tc);
1130 drm_WARN_ON(display->drm,
1131 (tc->mode == TC_PORT_DP_ALT || tc->mode == TC_PORT_LEGACY) &&
1139 tc->lock_wakeref = tc_cold_block(tc);
1141 if (tc->mode == TC_PORT_TBT_ALT)
1159 tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
1166 switch (tc->mode) {
1173 tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
1176 MISSING_CASE(tc->mode);
1193 * -----------------------
1198 return tc->phy_ops->cold_off_domain(tc);
1203 struct intel_display *display = to_intel_display(tc->dig_port);
1206 mask = tc->phy_ops->hpd_live_status(tc);
1209 drm_WARN_ON_ONCE(display->drm, hweight32(mask) > 1);
1216 return tc->phy_ops->is_ready(tc);
1221 return tc->phy_ops->is_owned(tc);
1226 tc->phy_ops->get_hw_state(tc);
1232 struct intel_display *display = to_intel_display(tc->dig_port);
1234 drm_WARN_ON(display->drm, phy_is_owned && !phy_is_ready);
1242 struct intel_display *display = to_intel_display(tc->dig_port);
1252 drm_dbg_kms(display->drm,
1253 "Port %s: PHY connected: %s (ready: %s, owned: %s, pll_type: %s)\n",
1254 tc->port_name,
1258 port_pll_type == ICL_PORT_DPLL_DEFAULT ? "tbt" : "non-tbt");
1265 struct intel_display *display = to_intel_display(tc->dig_port);
1268 drm_err(display->drm, "Port %s: timeout waiting for PHY ready\n",
1269 tc->port_name);
1281 return fls(live_status_mask) - 1;
1307 if (tc->legacy_port)
1328 if (tc->legacy_port)
1338 struct intel_display *display = to_intel_display(tc->dig_port);
1345 * For legacy ports the IOM firmware initializes the PHY during boot-up
1349 if (tc->legacy_port)
1358 drm_WARN_ON(display->drm, live_mode == TC_PORT_TBT_ALT);
1362 drm_dbg_kms(display->drm,
1363 "Port %s: PHY mode: %s (ready: %s, owned: %s, HPD: %s)\n",
1364 tc->port_name,
1375 if (tc->legacy_port)
1402 struct intel_display *display = to_intel_display(tc->dig_port);
1408 tc->mode = hpd_mask_to_target_mode(tc, live_status_mask);
1410 connected = tc->phy_ops->connect(tc, required_lanes);
1411 if (!connected && tc->mode != default_tc_mode(tc)) {
1412 tc->mode = default_tc_mode(tc);
1413 connected = tc->phy_ops->connect(tc, required_lanes);
1416 drm_WARN_ON(display->drm, !connected);
1421 if (tc->mode != TC_PORT_DISCONNECTED) {
1422 tc->phy_ops->disconnect(tc);
1423 tc->mode = TC_PORT_DISCONNECTED;
1429 mutex_lock(&tc->lock);
1430 tc->phy_ops->init(tc);
1431 mutex_unlock(&tc->lock);
1437 struct intel_display *display = to_intel_display(tc->dig_port);
1438 struct intel_digital_port *dig_port = tc->dig_port;
1439 enum tc_port_mode old_tc_mode = tc->mode;
1448 drm_WARN_ON(display->drm, aux_powered);
1455 drm_dbg_kms(display->drm, "Port %s: TC port mode reset (%s -> %s)\n",
1456 tc->port_name,
1458 tc_port_mode_name(tc->mode));
1463 return tc_phy_get_target_mode(tc) != tc->mode;
1476 tc->link_refcount++;
1481 tc->link_refcount--;
1486 struct intel_display *display = to_intel_display(tc->dig_port);
1487 struct intel_digital_port *dig_port = tc->dig_port;
1491 return intel_de_read(display, DDI_BUF_CTL(dig_port->base.port)) &
1496 * intel_tc_port_init_mode: Read out HW state and init the given port's TypeC mode
1497 * @dig_port: digital port
1508 mutex_lock(&tc->lock);
1510 drm_WARN_ON(display->drm, tc->mode != TC_PORT_DISCONNECTED);
1511 drm_WARN_ON(display->drm, tc->lock_wakeref);
1512 drm_WARN_ON(display->drm, tc->link_refcount);
1519 tc->init_mode = tc->mode;
1524 * port is disabled.
1527 * disconnected on an enabled legacy port. Work around that by
1528 * connecting the PHY even though the port is enabled. This doesn't
1534 } else if (tc->mode == TC_PORT_DISCONNECTED) {
1535 drm_WARN_ON(display->drm, !tc->legacy_port);
1536 drm_err(display->drm,
1537 "Port %s: PHY disconnected on enabled port, connecting it\n",
1538 tc->port_name);
1545 /* Prevent changing tc->mode until intel_tc_port_sanitize_mode() is called. */
1548 mutex_unlock(&tc->lock);
1554 struct intel_display *display = to_intel_display(tc->dig_port);
1555 struct intel_digital_port *dig_port = tc->dig_port;
1559 if (dig_port->dp.is_mst) {
1561 active_streams = intel_dp_mst_active_streams(&dig_port->dp);
1562 } else if (crtc_state && crtc_state->hw.active) {
1563 pll_type = intel_ddi_port_pll_type(&dig_port->base, crtc_state);
1568 drm_err(display->drm,
1569 "Port %s: PHY disconnected with %d active stream(s)\n",
1570 tc->port_name, active_streams);
1576 * intel_tc_port_sanitize_mode: Sanitize the given port's TypeC mode
1577 * @dig_port: digital port
1593 mutex_lock(&tc->lock);
1595 drm_WARN_ON(display->drm, tc->link_refcount != 1);
1598 * TBT-alt is the default mode in any case the PHY ownership is not
1603 if (tc->init_mode != TC_PORT_TBT_ALT &&
1604 tc->init_mode != TC_PORT_DISCONNECTED)
1605 drm_dbg_kms(display->drm,
1606 "Port %s: PHY left in %s mode on disabled port, disconnecting it\n",
1607 tc->port_name,
1608 tc_port_mode_name(tc->init_mode));
1613 drm_dbg_kms(display->drm, "Port %s: sanitize mode (%s)\n",
1614 tc->port_name,
1615 tc_port_mode_name(tc->mode));
1617 mutex_unlock(&tc->lock);
1621 * The type-C ports are different because even when they are connected, they may
1625 * define a port as "connected" when it is not only connected, but also when it
1637 drm_WARN_ON(display->drm, !intel_tc_port_ref_held(dig_port));
1639 if (tc->mode != TC_PORT_DISCONNECTED)
1640 mask = BIT(tc->mode);
1649 mutex_lock(&tc->lock);
1651 ret = tc->link_refcount &&
1652 tc->mode == TC_PORT_DP_ALT &&
1655 mutex_unlock(&tc->lock);
1662 if (!intel_encoder_is_tc(&dig_port->base))
1672 struct intel_display *display = to_intel_display(tc->dig_port);
1673 struct intel_digital_port *dig_port = tc->dig_port;
1674 struct intel_dp *intel_dp = enc_to_intel_dp(&dig_port->base);
1679 ret = drm_modeset_lock(&display->drm->mode_config.connection_mutex, ctx);
1690 for_each_intel_crtc_in_pipe_mask(display->drm, crtc, pipe_mask) {
1693 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
1697 crtc_state->uapi.connectors_changed = true;
1703 return drm_atomic_commit(&state->base);
1708 struct intel_display *display = to_intel_display(tc->dig_port);
1714 _state = drm_atomic_state_alloc(display->drm);
1716 return -ENOMEM;
1719 state->internal = true;
1724 drm_atomic_state_put(&state->base);
1733 struct intel_display *display = to_intel_display(tc->dig_port);
1739 mutex_lock(&display->drm->mode_config.mutex);
1741 drm_dbg_kms(display->drm,
1742 "Port %s: TypeC DP-alt sink disconnected, resetting link\n",
1743 tc->port_name);
1745 drm_WARN_ON(display->drm, ret);
1747 mutex_unlock(&display->drm->mode_config.mutex);
1756 &to_tc_port(dig_port)->link_reset_work,
1766 if (!intel_encoder_is_tc(&dig_port->base))
1769 cancel_delayed_work(&tc->link_reset_work);
1775 struct intel_display *display = to_intel_display(tc->dig_port);
1777 mutex_lock(&tc->lock);
1779 cancel_delayed_work(&tc->disconnect_phy_work);
1781 if (!tc->link_refcount)
1785 drm_WARN_ON(display->drm, tc->mode == TC_PORT_DISCONNECTED);
1786 drm_WARN_ON(display->drm, tc->mode != TC_PORT_TBT_ALT && !tc_phy_is_owned(tc));
1795 * Disconnect the given digital port from its TypeC PHY (handing back the
1804 mutex_lock(&tc->lock);
1806 if (!tc->link_refcount)
1809 mutex_unlock(&tc->lock);
1814 * @dig_port: digital port
1820 flush_delayed_work(&to_tc_port(dig_port)->disconnect_phy_work);
1827 cancel_delayed_work_sync(&tc->link_reset_work);
1835 if (!tc->link_refcount && tc->mode != TC_PORT_DISCONNECTED)
1836 queue_delayed_work(system_unbound_wq, &tc->disconnect_phy_work,
1839 mutex_unlock(&tc->lock);
1846 return mutex_is_locked(&tc->lock) ||
1847 tc->link_refcount;
1870 * that are active in DP-alt mode with their sink disconnected, until
1871 * this port is disabled and its PHY gets disconnected. Make sure this
1881 enum port port = dig_port->base.port;
1882 enum tc_port tc_port = intel_encoder_to_tc(&dig_port->base);
1884 if (drm_WARN_ON(display->drm, tc_port == TC_PORT_NONE))
1885 return -EINVAL;
1889 return -ENOMEM;
1891 dig_port->tc = tc;
1892 tc->dig_port = dig_port;
1895 tc->phy_ops = &xelpdp_tc_phy_ops;
1897 tc->phy_ops = &adlp_tc_phy_ops;
1899 tc->phy_ops = &tgl_tc_phy_ops;
1901 tc->phy_ops = &icl_tc_phy_ops;
1903 tc->port_name = kasprintf(GFP_KERNEL, "%c/TC#%d", port_name(port),
1905 if (!tc->port_name) {
1907 return -ENOMEM;
1910 mutex_init(&tc->lock);
1912 INIT_DELAYED_WORK(&tc->disconnect_phy_work, intel_tc_port_disconnect_phy_work);
1913 INIT_DELAYED_WORK(&tc->link_reset_work, intel_tc_port_link_reset_work);
1914 tc->legacy_port = is_legacy;
1915 tc->mode = TC_PORT_DISCONNECTED;
1916 tc->link_refcount = 0;
1929 kfree(dig_port->tc->port_name);
1930 kfree(dig_port->tc);
1931 dig_port->tc = NULL;