Lines Matching defs:cpu_transcoder
316 enum transcoder cpu_transcoder)
319 return EDP_PSR_CTL(display, cpu_transcoder);
325 enum transcoder cpu_transcoder)
328 return EDP_PSR_DEBUG(display, cpu_transcoder);
334 enum transcoder cpu_transcoder)
337 return EDP_PSR_PERF_CNT(display, cpu_transcoder);
343 enum transcoder cpu_transcoder)
346 return EDP_PSR_STATUS(display, cpu_transcoder);
352 enum transcoder cpu_transcoder)
355 return TRANS_PSR_IMR(display, cpu_transcoder);
361 enum transcoder cpu_transcoder)
364 return TRANS_PSR_IIR(display, cpu_transcoder);
370 enum transcoder cpu_transcoder)
373 return EDP_PSR_AUX_CTL(display, cpu_transcoder);
379 enum transcoder cpu_transcoder, int i)
382 return EDP_PSR_AUX_DATA(display, cpu_transcoder, i);
390 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
401 intel_de_rmw(display, psr_imr_reg(display, cpu_transcoder),
447 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
454 transcoder_name(cpu_transcoder));
461 transcoder_name(cpu_transcoder));
467 PSR_EVENT(dev_priv, cpu_transcoder),
476 transcoder_name(cpu_transcoder));
488 intel_de_rmw(display, psr_imr_reg(display, cpu_transcoder),
693 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
708 psr_aux_data_reg(display, cpu_transcoder, i >> 2),
723 intel_de_write(display, psr_aux_ctl_reg(display, cpu_transcoder),
913 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
936 intel_de_rmw(display, psr_ctl_reg(display, cpu_transcoder),
992 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
1001 intel_de_write(display, EDP_PSR2_CTL(display, cpu_transcoder),
1017 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
1084 PSR2_MAN_TRK_CTL(display, cpu_transcoder));
1088 PSR2_MAN_TRK_CTL(display, cpu_transcoder), 0);
1098 intel_de_write(display, psr_ctl_reg(display, cpu_transcoder), psr_val);
1100 intel_de_write(display, EDP_PSR2_CTL(display, cpu_transcoder), val);
1104 transcoder_has_psr2(struct intel_display *display, enum transcoder cpu_transcoder)
1109 return cpu_transcoder == TRANSCODER_A || cpu_transcoder == TRANSCODER_B;
1111 return cpu_transcoder == TRANSCODER_A;
1113 return cpu_transcoder == TRANSCODER_EDP;
1131 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
1133 intel_de_rmw(display, EDP_PSR2_CTL(display, cpu_transcoder),
1443 if (!transcoder_has_psr2(display, crtc_state->cpu_transcoder)) {
1446 transcoder_name(crtc_state->cpu_transcoder));
1721 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
1754 PSR2_MAN_TRK_CTL(display, cpu_transcoder));
1763 TRANS_EXITLINE(display, cpu_transcoder));
1773 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
1776 transcoder_has_psr2(display, cpu_transcoder) &&
1777 intel_de_read(display, EDP_PSR2_CTL(display, cpu_transcoder)) & EDP_PSR2_ENABLE);
1780 intel_de_read(display, psr_ctl_reg(display, cpu_transcoder)) & EDP_PSR_ENABLE);
1831 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
1887 intel_de_write(display, psr_debug_reg(display, cpu_transcoder), mask);
1897 TRANS_EXITLINE(display, cpu_transcoder),
1917 intel_de_rmw(display, CHICKEN_TRANS(display, cpu_transcoder), 0,
1929 intel_de_rmw(display, CHICKEN_TRANS(display, cpu_transcoder),
1936 MTL_CLKGATE_DIS_TRANS(display, cpu_transcoder),
1948 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
1962 val = intel_de_read(display, psr_iir_reg(display, cpu_transcoder));
1988 intel_dp->psr.transcoder = crtc_state->cpu_transcoder;
2044 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
2048 if (transcoder_has_psr2(display, cpu_transcoder)) {
2050 EDP_PSR2_CTL(display, cpu_transcoder));
2055 psr_ctl_reg(display, cpu_transcoder));
2068 EDP_PSR2_CTL(display, cpu_transcoder),
2074 psr_ctl_reg(display, cpu_transcoder),
2085 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
2091 psr_status = EDP_PSR2_STATUS(display, cpu_transcoder);
2094 psr_status = psr_status_reg(display, cpu_transcoder);
2108 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
2137 MTL_CLKGATE_DIS_TRANS(display, cpu_transcoder),
2149 intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
2154 PORT_ALPM_CTL(cpu_transcoder),
2375 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
2394 PSR2_MAN_TRK_CTL(display, cpu_transcoder),
2905 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
2913 EDP_PSR2_STATUS(display, cpu_transcoder),
2920 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
2929 psr_status_reg(display, cpu_transcoder),
2972 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
2982 reg = EDP_PSR2_STATUS(display, cpu_transcoder);
2985 reg = psr_status_reg(display, cpu_transcoder);
3155 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
3161 intel_de_write(display, LNL_SFF_CTL(cpu_transcoder),
3165 PSR2_MAN_TRK_CTL(display, cpu_transcoder),
3633 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
3653 EDP_PSR2_STATUS(display, cpu_transcoder));
3669 psr_status_reg(display, cpu_transcoder));
3732 enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
3756 val = intel_de_read(display, TRANS_DP2_CTL(cpu_transcoder));
3761 cpu_transcoder));
3766 EDP_PSR2_CTL(display, cpu_transcoder));
3769 val = intel_de_read(display, psr_ctl_reg(display, cpu_transcoder));
3784 val = intel_de_read(display, psr_perf_cnt_reg(display, cpu_transcoder));
3804 PSR2_SU_STATUS(display, cpu_transcoder, frame));