Lines Matching refs:pp_div
498 i915_reg_t pp_div; member
525 regs->pp_div = INVALID_MMIO_REG; in intel_pps_get_registers()
527 regs->pp_div = PP_DIVISOR(display, pps_idx); in intel_pps_get_registers()
1414 if (i915_mmio_reg_valid(regs.pp_div)) { in intel_pps_readout_hw_state()
1415 u32 pp_div; in intel_pps_readout_hw_state() local
1417 pp_div = intel_de_read(display, regs.pp_div); in intel_pps_readout_hw_state()
1419 power_cycle_delay = REG_FIELD_GET(PANEL_POWER_CYCLE_DELAY_MASK, pp_div); in intel_pps_readout_hw_state()
1673 if (i915_mmio_reg_valid(regs.pp_div)) in pps_init_registers()
1674 intel_de_write(display, regs.pp_div, in pps_init_registers()
1688 i915_mmio_reg_valid(regs.pp_div) ? in pps_init_registers()
1689 intel_de_read(display, regs.pp_div) : in pps_init_registers()