31 	struct intel_pps *pps = &intel_dp->pps;  in pps_name()  local
34 		switch (pps->pps_pipe) {  in pps_name()
38 			 * to always have a valid PPS when calling this.  in pps_name()
40 			return "PPS <none>";  in pps_name()
42 			return "PPS A";  in pps_name()
44 			return "PPS B";  in pps_name()
46 			MISSING_CASE(pps->pps_pipe);  in pps_name()
50 		switch (pps->pps_idx) {  in pps_name()
52 			return "PPS 0";  in pps_name()
54 			return "PPS 1";  in pps_name()
56 			MISSING_CASE(pps->pps_idx);  in pps_name()
61 	return "PPS <invalid>";  in pps_name()
74 	mutex_lock(&display->pps.mutex);  in intel_pps_lock()
85 	mutex_unlock(&display->pps.mutex);  in intel_pps_unlock()
97 	enum pipe pipe = intel_dp->pps.pps_pipe;  in vlv_power_sequencer_kick()
183 				    intel_dp->pps.active_pipe != INVALID_PIPE &&  in vlv_find_free_pps()
184 				    intel_dp->pps.active_pipe !=  in vlv_find_free_pps()
185 				    intel_dp->pps.pps_pipe);  in vlv_find_free_pps()
187 			if (intel_dp->pps.pps_pipe != INVALID_PIPE)  in vlv_find_free_pps()
188 				pipes &= ~(1 << intel_dp->pps.pps_pipe);  in vlv_find_free_pps()
191 				    intel_dp->pps.pps_pipe != INVALID_PIPE);  in vlv_find_free_pps()
193 			if (intel_dp->pps.active_pipe != INVALID_PIPE)  in vlv_find_free_pps()
194 				pipes &= ~(1 << intel_dp->pps.active_pipe);  in vlv_find_free_pps()
211 	lockdep_assert_held(&display->pps.mutex);  in vlv_power_sequencer_pipe()
216 	drm_WARN_ON(display->drm, intel_dp->pps.active_pipe != INVALID_PIPE &&  in vlv_power_sequencer_pipe()
217 		    intel_dp->pps.active_pipe != intel_dp->pps.pps_pipe);  in vlv_power_sequencer_pipe()
219 	if (intel_dp->pps.pps_pipe != INVALID_PIPE)  in vlv_power_sequencer_pipe()
220 		return intel_dp->pps.pps_pipe;  in vlv_power_sequencer_pipe()
232 	intel_dp->pps.pps_pipe = pipe;  in vlv_power_sequencer_pipe()
249 	return intel_dp->pps.pps_pipe;  in vlv_power_sequencer_pipe()
256 	int pps_idx = intel_dp->pps.pps_idx;  in bxt_power_sequencer_idx()
258 	lockdep_assert_held(&display->pps.mutex);  in bxt_power_sequencer_idx()
263 	if (!intel_dp->pps.pps_reset)  in bxt_power_sequencer_idx()
266 	intel_dp->pps.pps_reset = false;  in bxt_power_sequencer_idx()
324 	lockdep_assert_held(&display->pps.mutex);  in vlv_initial_power_sequencer_setup()
328 	intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(display, port,  in vlv_initial_power_sequencer_setup()
331 	if (intel_dp->pps.pps_pipe == INVALID_PIPE)  in vlv_initial_power_sequencer_setup()
332 		intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(display, port,  in vlv_initial_power_sequencer_setup()
335 	if (intel_dp->pps.pps_pipe == INVALID_PIPE)  in vlv_initial_power_sequencer_setup()
336 		intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(display, port,  in vlv_initial_power_sequencer_setup()
340 	if (intel_dp->pps.pps_pipe == INVALID_PIPE) {  in vlv_initial_power_sequencer_setup()
380 	if (intel_dp->pps.pps_idx == 1 &&  in intel_pps_is_valid()
409 	lockdep_assert_held(&display->pps.mutex);  in pps_initial_setup()
418 		intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller;  in pps_initial_setup()
420 		intel_dp->pps.pps_idx = 0;  in pps_initial_setup()
422 	if (drm_WARN_ON(display->drm, intel_dp->pps.pps_idx >= intel_num_pps(display)))  in pps_initial_setup()
423 		intel_dp->pps.pps_idx = -1;  in pps_initial_setup()
426 	if (intel_dp->pps.pps_idx < 0)  in pps_initial_setup()
427 		intel_dp->pps.pps_idx = bxt_initial_pps_idx(display, pps_has_pp_on);  in pps_initial_setup()
429 	if (intel_dp->pps.pps_idx < 0)  in pps_initial_setup()
430 		intel_dp->pps.pps_idx = bxt_initial_pps_idx(display, pps_has_vdd_on);  in pps_initial_setup()
432 	if (intel_dp->pps.pps_idx < 0) {  in pps_initial_setup()
433 		intel_dp->pps.pps_idx = bxt_initial_pps_idx(display, pps_any);  in pps_initial_setup()
474 			    intel_dp->pps.active_pipe != INVALID_PIPE);  in intel_pps_reset_all()
480 			intel_dp->pps.pps_reset = true;  in intel_pps_reset_all()
482 			intel_dp->pps.pps_pipe = INVALID_PIPE;  in intel_pps_reset_all()
508 		pps_idx = intel_dp->pps.pps_idx;  in intel_pps_get_registers()
548 	lockdep_assert_held(&display->pps.mutex);  in edp_have_panel_power()
551 	    intel_dp->pps.pps_pipe == INVALID_PIPE)  in edp_have_panel_power()
562 	lockdep_assert_held(&display->pps.mutex);  in edp_have_panel_vdd()
565 	    intel_dp->pps.pps_pipe == INVALID_PIPE)  in edp_have_panel_vdd()
611 	lockdep_assert_held(&display->pps.mutex);  in wait_panel_status()
676 	panel_power_off_duration = ktime_ms_delta(panel_power_on_time, intel_dp->pps.panel_power_off_time);  in wait_panel_power_cycle()
680 	if (panel_power_off_duration < (s64)intel_dp->pps.panel_power_cycle_delay)  in wait_panel_power_cycle()
682 				       intel_dp->pps.panel_power_cycle_delay - panel_power_off_duration);  in wait_panel_power_cycle()
700 	wait_remaining_ms_from_jiffies(intel_dp->pps.last_power_on,  in wait_backlight_on()
701 				       intel_dp->pps.backlight_on_delay);  in wait_backlight_on()
706 	wait_remaining_ms_from_jiffies(intel_dp->pps.last_backlight_off,  in edp_wait_backlight_off()
707 				       intel_dp->pps.backlight_off_delay);  in edp_wait_backlight_off()
719 	lockdep_assert_held(&display->pps.mutex);  in ilk_get_pp_control()
742 	bool need_to_disable = !intel_dp->pps.want_panel_vdd;  in intel_pps_vdd_on_unlocked()
744 	lockdep_assert_held(&display->pps.mutex);  in intel_pps_vdd_on_unlocked()
749 	cancel_delayed_work(&intel_dp->pps.panel_vdd_work);  in intel_pps_vdd_on_unlocked()
750 	intel_dp->pps.want_panel_vdd = true;  in intel_pps_vdd_on_unlocked()
755 	drm_WARN_ON(display->drm, intel_dp->pps.vdd_wakeref);  in intel_pps_vdd_on_unlocked()
756 	intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,  in intel_pps_vdd_on_unlocked()
788 		msleep(intel_dp->pps.panel_power_up_delay);  in intel_pps_vdd_on_unlocked()
827 	lockdep_assert_held(&display->pps.mutex);  in intel_pps_vdd_off_sync_unlocked()
829 	drm_WARN_ON(display->drm, intel_dp->pps.want_panel_vdd);  in intel_pps_vdd_off_sync_unlocked()
856 		intel_dp->pps.panel_power_off_time = ktime_get_boottime();  in intel_pps_vdd_off_sync_unlocked()
860 				fetch_and_zero(&intel_dp->pps.vdd_wakeref));  in intel_pps_vdd_off_sync_unlocked()
870 	cancel_delayed_work_sync(&intel_dp->pps.panel_vdd_work);  in intel_pps_vdd_off_sync()
881 	struct intel_pps *pps = container_of(to_delayed_work(__work),  in edp_panel_vdd_work()  local
883 	struct intel_dp *intel_dp = container_of(pps, struct intel_dp, pps);  in edp_panel_vdd_work()
887 		if (!intel_dp->pps.want_panel_vdd)  in edp_panel_vdd_work()
902 	if (intel_dp->pps.initializing)  in edp_panel_vdd_schedule_off()
910 	delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);  in edp_panel_vdd_schedule_off()
912 			   &intel_dp->pps.panel_vdd_work, delay);  in edp_panel_vdd_schedule_off()
925 	lockdep_assert_held(&display->pps.mutex);  in intel_pps_vdd_off_unlocked()
930 	I915_STATE_WARN(dev_priv, !intel_dp->pps.want_panel_vdd,  in intel_pps_vdd_off_unlocked()
936 	intel_dp->pps.want_panel_vdd = false;  in intel_pps_vdd_off_unlocked()
951 	lockdep_assert_held(&display->pps.mutex);  in intel_pps_on_unlocked()
995 	intel_dp->pps.last_power_on = jiffies;  in intel_pps_on_unlocked()
1027 	lockdep_assert_held(&display->pps.mutex);  in intel_pps_off_unlocked()
1036 	drm_WARN(display->drm, !intel_dp->pps.want_panel_vdd,  in intel_pps_off_unlocked()
1049 	intel_dp->pps.want_panel_vdd = false;  in intel_pps_off_unlocked()
1055 	intel_dp->pps.panel_power_off_time = ktime_get_boottime();  in intel_pps_off_unlocked()
1060 				fetch_and_zero(&intel_dp->pps.vdd_wakeref));  in intel_pps_off_unlocked()
1120 	intel_dp->pps.last_backlight_off = jiffies;  in intel_pps_backlight_off()
1154 	enum pipe pipe = intel_dp->pps.pps_pipe;  in vlv_detach_power_sequencer()
1157 	drm_WARN_ON(display->drm, intel_dp->pps.active_pipe != INVALID_PIPE);  in vlv_detach_power_sequencer()
1180 	intel_dp->pps.pps_pipe = INVALID_PIPE;  in vlv_detach_power_sequencer()
1188 	lockdep_assert_held(&display->pps.mutex);  in vlv_steal_power_sequencer()
1193 		drm_WARN(display->drm, intel_dp->pps.active_pipe == pipe,  in vlv_steal_power_sequencer()
1194 			 "stealing PPS %c from active [ENCODER:%d:%s]\n",  in vlv_steal_power_sequencer()
1198 		if (intel_dp->pps.pps_pipe != pipe)  in vlv_steal_power_sequencer()
1202 			    "stealing PPS %c from [ENCODER:%d:%s]\n",  in vlv_steal_power_sequencer()
1218 	lockdep_assert_held(&display->pps.mutex);  in vlv_pps_init()
1220 	drm_WARN_ON(display->drm, intel_dp->pps.active_pipe != INVALID_PIPE);  in vlv_pps_init()
1222 	if (intel_dp->pps.pps_pipe != INVALID_PIPE &&  in vlv_pps_init()
1223 	    intel_dp->pps.pps_pipe != crtc->pipe) {  in vlv_pps_init()
1238 	intel_dp->pps.active_pipe = crtc->pipe;  in vlv_pps_init()
1244 	intel_dp->pps.pps_pipe = crtc->pipe;  in vlv_pps_init()
1262 	lockdep_assert_held(&display->pps.mutex);  in pps_vdd_init()
1277 	drm_WARN_ON(display->drm, intel_dp->pps.vdd_wakeref);  in pps_vdd_init()
1278 	intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,  in pps_vdd_init()
1303 	intel_dp->pps.panel_power_off_time = 0;  in pps_init_timestamps()
1304 	intel_dp->pps.last_power_on = jiffies;  in pps_init_timestamps()
1305 	intel_dp->pps.last_backlight_off = jiffies;  in pps_init_timestamps()
1319 	/* Ensure PPS is unlocked */  in intel_pps_readout_hw_state()
1360 	struct edp_power_seq *sw = &intel_dp->pps.pps_delays;  in intel_pps_verify_state()
1366 		drm_err(display->drm, "PPS state mismatch\n");  in intel_pps_verify_state()
1383 	lockdep_assert_held(&display->pps.mutex);  in pps_init_delays_bios()
1385 	if (!pps_delays_valid(&intel_dp->pps.bios_pps_delays))  in pps_init_delays_bios()
1386 		intel_pps_readout_hw_state(intel_dp, &intel_dp->pps.bios_pps_delays);  in pps_init_delays_bios()
1388 	*bios = intel_dp->pps.bios_pps_delays;  in pps_init_delays_bios()
1399 	*vbt = connector->panel.vbt.edp.pps;  in pps_init_delays_vbt()
1430 	lockdep_assert_held(&display->pps.mutex);  in pps_init_delays_spec()
1451 		*final = &intel_dp->pps.pps_delays;  in pps_init_delays()
1453 	lockdep_assert_held(&display->pps.mutex);  in pps_init_delays()
1476 	intel_dp->pps.panel_power_up_delay = get_delay(t1_t3);  in pps_init_delays()
1477 	intel_dp->pps.backlight_on_delay = get_delay(t8);  in pps_init_delays()
1478 	intel_dp->pps.backlight_off_delay = get_delay(t9);  in pps_init_delays()
1479 	intel_dp->pps.panel_power_down_delay = get_delay(t10);  in pps_init_delays()
1480 	intel_dp->pps.panel_power_cycle_delay = get_delay(t11_t12);  in pps_init_delays()
1485 		    intel_dp->pps.panel_power_up_delay,  in pps_init_delays()
1486 		    intel_dp->pps.panel_power_down_delay,  in pps_init_delays()
1487 		    intel_dp->pps.panel_power_cycle_delay);  in pps_init_delays()
1490 		    intel_dp->pps.backlight_on_delay,  in pps_init_delays()
1491 		    intel_dp->pps.backlight_off_delay);  in pps_init_delays()
1518 	const struct edp_power_seq *seq = &intel_dp->pps.pps_delays;  in pps_init_registers()
1520 	lockdep_assert_held(&display->pps.mutex);  in pps_init_registers()
1633 	intel_dp->pps.initializing = true;  in intel_pps_init()
1634 	INIT_DELAYED_WORK(&intel_dp->pps.panel_vdd_work, edp_panel_vdd_work);  in intel_pps_init()
1664 		 intel_dp->pps.pps_idx != connector->panel.vbt.backlight.controller,  in pps_init_late()
1667 		 intel_dp->pps.pps_idx, connector->panel.vbt.backlight.controller);  in pps_init_late()
1670 		intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller;  in pps_init_late()
1681 		memset(&intel_dp->pps.pps_delays, 0, sizeof(intel_dp->pps.pps_delays));  in intel_pps_init_late()
1685 		intel_dp->pps.initializing = false;  in intel_pps_init_late()
1715 		display->pps.mmio_base = PCH_PPS_BASE;  in intel_pps_setup()
1717 		display->pps.mmio_base = VLV_PPS_BASE;  in intel_pps_setup()
1719 		display->pps.mmio_base = PPS_BASE;  in intel_pps_setup()
1731 		   intel_dp->pps.panel_power_up_delay);  in intel_pps_show()
1733 		   intel_dp->pps.panel_power_down_delay);  in intel_pps_show()
1735 		   intel_dp->pps.backlight_on_delay);  in intel_pps_show()
1737 		   intel_dp->pps.backlight_off_delay);  in intel_pps_show()