Lines Matching full:plane
25 * DOC: atomic plane helpers
27 * The functions here are used by the atomic plane helper functions to
28 * implement legacy plane updates (i.e., drm_plane->update_plane() and
29 * drm_plane->disable_plane()). This allows plane updates to use the
30 * atomic state infrastructure and perform plane updates as separate
67 struct intel_plane *plane) in intel_plane_state_reset() argument
71 __drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base); in intel_plane_state_reset()
79 struct intel_plane *plane; in intel_plane_alloc() local
81 plane = kzalloc(sizeof(*plane), GFP_KERNEL); in intel_plane_alloc()
82 if (!plane) in intel_plane_alloc()
87 kfree(plane); in intel_plane_alloc()
91 intel_plane_state_reset(plane_state, plane); in intel_plane_alloc()
93 plane->base.state = &plane_state->uapi; in intel_plane_alloc()
95 return plane; in intel_plane_alloc()
98 void intel_plane_free(struct intel_plane *plane) in intel_plane_free() argument
100 intel_plane_destroy_state(&plane->base, plane->base.state); in intel_plane_free()
101 kfree(plane); in intel_plane_free()
105 * intel_plane_destroy - destroy a plane
106 * @plane: plane to destroy
111 void intel_plane_destroy(struct drm_plane *plane) in intel_plane_destroy() argument
113 drm_plane_cleanup(plane); in intel_plane_destroy()
114 kfree(to_intel_plane(plane)); in intel_plane_destroy()
118 * intel_plane_duplicate_state - duplicate plane state
119 * @plane: drm plane
121 * Allocates and returns a copy of the plane state (both common and
122 * Intel-specific) for the specified plane.
124 * Returns: The newly allocated plane state, or NULL on failure.
127 intel_plane_duplicate_state(struct drm_plane *plane) in intel_plane_duplicate_state() argument
131 intel_state = to_intel_plane_state(plane->state); in intel_plane_duplicate_state()
137 __drm_atomic_helper_plane_duplicate_state(plane, &intel_state->uapi); in intel_plane_duplicate_state()
152 * intel_plane_destroy_state - destroy plane state
153 * @plane: drm plane
156 * Destroys the plane state (both common and Intel-specific) for the
157 * specified plane.
160 intel_plane_destroy_state(struct drm_plane *plane, in intel_plane_destroy_state() argument
165 drm_WARN_ON(plane->dev, plane_state->ggtt_vma); in intel_plane_destroy_state()
166 drm_WARN_ON(plane->dev, plane_state->dpt_vma); in intel_plane_destroy_state()
174 bool intel_plane_needs_physical(struct intel_plane *plane) in intel_plane_needs_physical() argument
176 struct intel_display *display = to_intel_display(plane); in intel_plane_needs_physical()
178 return plane->id == PLANE_CURSOR && in intel_plane_needs_physical()
182 bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format, in intel_plane_can_async_flip() argument
189 return plane->can_async_flip && plane->can_async_flip(modifier); in intel_plane_can_async_flip()
192 bool intel_plane_format_mod_supported_async(struct drm_plane *plane, in intel_plane_format_mod_supported_async() argument
196 if (!plane->funcs->format_mod_supported(plane, format, modifier)) in intel_plane_format_mod_supported_async()
199 return intel_plane_can_async_flip(to_intel_plane(plane), in intel_plane_format_mod_supported_async()
226 * Note we don't check for plane visibility here as in intel_plane_pixel_rate()
260 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_relative_data_rate() local
265 if (plane->id == PLANE_CURSOR) in intel_plane_relative_data_rate()
273 * the 90/270 degree plane rotation cases (to match the in intel_plane_relative_data_rate()
279 /* UV plane does 1/2 pixel sub-sampling */ in intel_plane_relative_data_rate()
286 skl_plane_relative_data_rate(crtc_state, plane, width, height, in intel_plane_relative_data_rate()
297 struct intel_plane *plane) in intel_plane_calc_min_cdclk() argument
300 intel_atomic_get_new_plane_state(state, plane); in intel_plane_calc_min_cdclk()
304 if (!plane_state->uapi.visible || !plane->min_cdclk) in intel_plane_calc_min_cdclk()
309 new_crtc_state->plane_min_cdclk[plane->id] = in intel_plane_calc_min_cdclk()
310 plane->min_cdclk(new_crtc_state, plane_state); in intel_plane_calc_min_cdclk()
336 /* Incase helper fails, mark whole plane region as damage */ in intel_plane_copy_uapi_plane_damage()
402 * indicates the plane is logically enabled on the uapi level. in intel_plane_copy_uapi_to_hw_state()
439 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_set_invisible() local
441 crtc_state->active_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
442 crtc_state->scaled_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
443 crtc_state->nv12_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
444 crtc_state->c8_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
445 crtc_state->async_flip_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
446 crtc_state->data_rate[plane->id] = 0; in intel_plane_set_invisible()
447 crtc_state->data_rate_y[plane->id] = 0; in intel_plane_set_invisible()
448 crtc_state->rel_data_rate[plane->id] = 0; in intel_plane_set_invisible()
449 crtc_state->rel_data_rate_y[plane->id] = 0; in intel_plane_set_invisible()
450 crtc_state->plane_min_cdclk[plane->id] = 0; in intel_plane_set_invisible()
465 static bool intel_plane_do_async_flip(struct intel_plane *plane, in intel_plane_do_async_flip() argument
469 struct intel_display *display = to_intel_display(plane); in intel_plane_do_async_flip()
471 if (!plane->async_flip) in intel_plane_do_async_flip()
497 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in i9xx_must_disable_cxsr() local
504 if (plane->id == PLANE_CURSOR) in i9xx_must_disable_cxsr()
511 /* Must disable CxSR around plane enable/disable */ in i9xx_must_disable_cxsr()
519 * Most plane control register updates are blocked while in CxSR. in i9xx_must_disable_cxsr()
521 * Tiling mode is one exception where the primary plane can in i9xx_must_disable_cxsr()
526 if (plane->id == PLANE_PRIMARY) { in i9xx_must_disable_cxsr()
538 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in ilk_must_disable_cxsr() local
543 if (plane->id == PLANE_CURSOR) in ilk_must_disable_cxsr()
553 * plane will be internally buffered and delayed while Big FIFO in ilk_must_disable_cxsr()
565 * plane, not only sprite plane. in ilk_must_disable_cxsr()
596 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in intel_plane_atomic_calc_changes() local
603 if (DISPLAY_VER(display) >= 9 && plane->id != PLANE_CURSOR) { in intel_plane_atomic_calc_changes()
622 * per-plane wm computation to the .check_plane() hook, and in intel_plane_atomic_calc_changes()
637 "[CRTC:%d:%s] with [PLANE:%d:%s] visible %i -> %i, off %i, on %i, ms %i\n", in intel_plane_atomic_calc_changes()
639 plane->base.base.id, plane->base.name, in intel_plane_atomic_calc_changes()
644 new_crtc_state->fb_bits |= plane->frontbuffer_bit; in intel_plane_atomic_calc_changes()
654 if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state)) { in intel_plane_atomic_calc_changes()
656 new_crtc_state->async_flip_planes |= BIT(plane->id); in intel_plane_atomic_calc_changes()
657 } else if (plane->need_async_flip_toggle_wa && in intel_plane_atomic_calc_changes()
667 new_crtc_state->async_flip_planes |= BIT(plane->id); in intel_plane_atomic_calc_changes()
678 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in intel_plane_atomic_check_with_state() local
683 new_crtc_state->enabled_planes &= ~BIT(plane->id); in intel_plane_atomic_check_with_state()
688 ret = plane->check_plane(new_crtc_state, new_plane_state); in intel_plane_atomic_check_with_state()
693 new_crtc_state->enabled_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
697 new_crtc_state->active_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
701 new_crtc_state->scaled_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
705 new_crtc_state->nv12_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
709 new_crtc_state->c8_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
712 new_crtc_state->update_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
716 new_crtc_state->data_rate_y[plane->id] = in intel_plane_atomic_check_with_state()
718 new_crtc_state->data_rate[plane->id] = in intel_plane_atomic_check_with_state()
721 new_crtc_state->rel_data_rate_y[plane->id] = in intel_plane_atomic_check_with_state()
724 new_crtc_state->rel_data_rate[plane->id] = in intel_plane_atomic_check_with_state()
728 new_crtc_state->data_rate[plane->id] = in intel_plane_atomic_check_with_state()
731 new_crtc_state->rel_data_rate[plane->id] = in intel_plane_atomic_check_with_state()
744 struct intel_plane *plane; in intel_crtc_get_plane() local
746 for_each_intel_plane_on_crtc(display->drm, crtc, plane) { in intel_crtc_get_plane()
747 if (plane->id == plane_id) in intel_crtc_get_plane()
748 return plane; in intel_crtc_get_plane()
755 struct intel_plane *plane) in plane_atomic_check() argument
759 intel_atomic_get_new_plane_state(state, plane); in plane_atomic_check()
761 intel_atomic_get_old_plane_state(state, plane); in plane_atomic_check()
764 struct intel_crtc *crtc = intel_crtc_for_pipe(display, plane->pipe); in plane_atomic_check()
774 intel_crtc_get_plane(primary_crtc, plane->id); in plane_atomic_check()
813 struct intel_plane *plane; in skl_next_plane_to_commit() local
819 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in skl_next_plane_to_commit()
820 enum plane_id plane_id = plane->id; in skl_next_plane_to_commit()
822 if (crtc->pipe != plane->pipe || in skl_next_plane_to_commit()
836 return plane; in skl_next_plane_to_commit()
846 struct intel_plane *plane, in intel_plane_update_noarm() argument
854 if (plane->fbc) in intel_plane_update_noarm()
855 intel_fbc_dirty_rect_update_noarm(dsb, plane); in intel_plane_update_noarm()
857 if (plane->update_noarm) in intel_plane_update_noarm()
858 plane->update_noarm(dsb, plane, crtc_state, plane_state); in intel_plane_update_noarm()
862 struct intel_plane *plane, in intel_plane_async_flip() argument
869 trace_intel_plane_async_flip(plane, crtc, async_flip); in intel_plane_async_flip()
870 plane->async_flip(dsb, plane, crtc_state, plane_state, async_flip); in intel_plane_async_flip()
874 struct intel_plane *plane, in intel_plane_update_arm() argument
880 if (crtc_state->do_async_flip && plane->async_flip) { in intel_plane_update_arm()
881 intel_plane_async_flip(dsb, plane, crtc_state, plane_state, true); in intel_plane_update_arm()
886 plane->update_arm(dsb, plane, crtc_state, plane_state); in intel_plane_update_arm()
890 struct intel_plane *plane, in intel_plane_disable_arm() argument
895 trace_intel_plane_disable_arm(plane, crtc); in intel_plane_disable_arm()
896 plane->disable_arm(dsb, plane, crtc_state); in intel_plane_disable_arm()
907 struct intel_plane *plane; in intel_crtc_planes_update_noarm() local
917 for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) { in intel_crtc_planes_update_noarm()
918 if (crtc->pipe != plane->pipe || in intel_crtc_planes_update_noarm()
919 !(update_mask & BIT(plane->id))) in intel_crtc_planes_update_noarm()
925 intel_plane_update_noarm(dsb, plane, in intel_crtc_planes_update_noarm()
941 struct intel_plane *plane; in skl_crtc_planes_update_arm() local
948 while ((plane = skl_next_plane_to_commit(state, crtc, ddb, ddb_y, &update_mask))) { in skl_crtc_planes_update_arm()
950 intel_atomic_get_new_plane_state(state, plane); in skl_crtc_planes_update_arm()
958 intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state); in skl_crtc_planes_update_arm()
960 intel_plane_disable_arm(dsb, plane, new_crtc_state); in skl_crtc_planes_update_arm()
972 struct intel_plane *plane; in i9xx_crtc_planes_update_arm() local
975 for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) { in i9xx_crtc_planes_update_arm()
976 if (crtc->pipe != plane->pipe || in i9xx_crtc_planes_update_arm()
977 !(update_mask & BIT(plane->id))) in i9xx_crtc_planes_update_arm()
985 intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state); in i9xx_crtc_planes_update_arm()
987 intel_plane_disable_arm(dsb, plane, new_crtc_state); in i9xx_crtc_planes_update_arm()
1009 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_check_clipping() local
1029 "[PLANE:%d:%s] invalid scaling "DRM_RECT_FP_FMT " -> " DRM_RECT_FMT "\n", in intel_plane_check_clipping()
1030 plane->base.base.id, plane->base.name, in intel_plane_check_clipping()
1046 "[PLANE:%d:%s] plane (" DRM_RECT_FMT ") must cover entire CRTC (" DRM_RECT_FMT ")\n", in intel_plane_check_clipping()
1047 plane->base.base.id, plane->base.name, in intel_plane_check_clipping()
1052 /* final plane coordinates will be relative to the plane's pipe */ in intel_plane_check_clipping()
1061 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_check_src_coordinates() local
1122 "[PLANE:%d:%s] src x/w (%u, %u) must be a multiple of %u (rotated: %s)\n", in intel_plane_check_src_coordinates()
1123 plane->base.base.id, plane->base.name, in intel_plane_check_src_coordinates()
1130 "[PLANE:%d:%s] src y/h (%u, %u) must be a multiple of %u (rotated: %s)\n", in intel_plane_check_src_coordinates()
1131 plane->base.base.id, plane->base.name, in intel_plane_check_src_coordinates()
1175 * intel_prepare_plane_fb - Prepare fb for usage on plane
1176 * @_plane: drm plane to prepare for
1177 * @_new_plane_state: the plane state being prepared
1179 * Prepares a framebuffer for usage on a display plane. Generally this
1190 struct intel_plane *plane = to_intel_plane(_plane); in intel_prepare_plane_fb() local
1191 struct intel_display *display = to_intel_display(plane); in intel_prepare_plane_fb()
1197 intel_atomic_get_old_plane_state(state, plane); in intel_prepare_plane_fb()
1233 ret = drm_gem_plane_helper_prepare_fb(&plane->base, &new_plane_state->uapi); in intel_prepare_plane_fb()
1263 * intel_cleanup_plane_fb - Cleans up an fb after plane use
1264 * @plane: drm plane to clean up for
1267 * Cleans up a framebuffer that has just been removed from a plane.
1270 intel_cleanup_plane_fb(struct drm_plane *plane, in intel_cleanup_plane_fb() argument
1273 struct intel_display *display = to_intel_display(plane->dev); in intel_cleanup_plane_fb()
1333 static void intel_panic_flush(struct drm_plane *plane) in intel_panic_flush() argument
1335 struct intel_plane_state *plane_state = to_intel_plane_state(plane->state); in intel_panic_flush()
1336 struct intel_crtc_state *crtc_state = to_intel_crtc_state(plane->state->crtc->state); in intel_panic_flush()
1337 struct intel_plane *iplane = to_intel_plane(plane); in intel_panic_flush()
1392 static int intel_get_scanout_buffer(struct drm_plane *plane, in intel_get_scanout_buffer() argument
1399 struct intel_display *display = to_intel_display(plane->dev); in intel_get_scanout_buffer()
1401 if (!plane->state || !plane->state->fb || !plane->state->visible) in intel_get_scanout_buffer()
1404 plane_state = to_intel_plane_state(plane->state); in intel_get_scanout_buffer()
1452 void intel_plane_helper_add(struct intel_plane *plane) in intel_plane_helper_add() argument
1454 if (plane->base.type == DRM_PLANE_TYPE_PRIMARY) in intel_plane_helper_add()
1455 drm_plane_helper_add(&plane->base, &intel_primary_plane_helper_funcs); in intel_plane_helper_add()
1457 drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs); in intel_plane_helper_add()
1476 struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); in link_nv12_planes()
1477 struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); in link_nv12_planes()
1479 drm_dbg_kms(display->drm, "UV plane [PLANE:%d:%s] using Y plane [PLANE:%d:%s]\n", in link_nv12_planes()
1495 /* Copy parameters to Y plane */ in link_nv12_planes()
1512 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in unlink_nv12_plane() local
1523 crtc_state->enabled_planes &= ~BIT(plane->id); in unlink_nv12_plane()
1524 crtc_state->active_planes &= ~BIT(plane->id); in unlink_nv12_plane()
1525 crtc_state->update_planes |= BIT(plane->id); in unlink_nv12_plane()
1526 crtc_state->data_rate[plane->id] = 0; in unlink_nv12_plane()
1527 crtc_state->rel_data_rate[plane->id] = 0; in unlink_nv12_plane()
1537 struct intel_plane *plane; in icl_check_nv12_planes() local
1544 * Destroy all old plane links and make the Y plane invisible in icl_check_nv12_planes()
1547 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in icl_check_nv12_planes()
1548 if (plane->pipe != crtc->pipe) in icl_check_nv12_planes()
1558 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in icl_check_nv12_planes()
1562 if (plane->pipe != crtc->pipe) in icl_check_nv12_planes()
1565 if ((crtc_state->nv12_planes & BIT(plane->id)) == 0) in icl_check_nv12_planes()
1601 struct intel_plane *plane; in intel_crtc_add_planes_to_state() local
1603 for_each_intel_plane_on_crtc(display->drm, crtc, plane) { in intel_crtc_add_planes_to_state()
1606 if ((plane_ids_mask & BIT(plane->id)) == 0) in intel_crtc_add_planes_to_state()
1609 plane_state = intel_atomic_get_plane_state(state, plane); in intel_crtc_add_planes_to_state()
1642 struct intel_plane *plane; in intel_joiner_affected_planes() local
1646 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in intel_joiner_affected_planes()
1649 if ((joined_pipes & BIT(plane->pipe)) == 0) in intel_joiner_affected_planes()
1652 affected_planes |= BIT(plane->id); in intel_joiner_affected_planes()
1669 * UV<->Y plane linkage is always up to date. in intel_joiner_add_affected_planes()
1717 struct intel_plane *plane; in intel_plane_atomic_check() local
1725 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in intel_plane_atomic_check()
1726 ret = plane_atomic_check(state, plane); in intel_plane_atomic_check()
1729 "[PLANE:%d:%s] atomic driver check failed\n", in intel_plane_atomic_check()
1730 plane->base.base.id, plane->base.name); in intel_plane_atomic_check()
1762 for_each_new_intel_plane_in_state(state, plane, plane_state, i) in intel_plane_atomic_check()
1763 intel_plane_calc_min_cdclk(state, plane); in intel_plane_atomic_check()