Lines Matching defs:plane_state
136 static unsigned int intel_fbc_plane_stride(const struct intel_plane_state *plane_state)
138 const struct drm_framebuffer *fb = plane_state->hw.fb;
141 stride = plane_state->view.color_plane[0].mapping_stride;
142 if (!drm_rotation_90_or_270(plane_state->hw.rotation))
154 static unsigned int intel_fbc_plane_cfb_stride(const struct intel_plane_state *plane_state)
158 return intel_fbc_plane_stride(plane_state) * cpp;
205 static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
207 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
208 unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
209 unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
236 static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
238 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
239 unsigned int height = drm_rect_height(&plane_state->uapi.src) >> 16;
241 return _intel_fbc_cfb_size(display, height, intel_fbc_cfb_stride(plane_state));
244 static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_state)
246 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
247 unsigned int stride_aligned = intel_fbc_cfb_stride(plane_state);
248 unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
249 const struct drm_framebuffer *fb = plane_state->hw.fb;
824 static int intel_fbc_min_limit(const struct intel_plane_state *plane_state)
826 return plane_state->hw.fb->format->cpp[0] == 2 ? 2 : 1;
982 static bool i8xx_fbc_stride_is_valid(const struct intel_plane_state *plane_state)
984 const struct drm_framebuffer *fb = plane_state->hw.fb;
985 unsigned int stride = intel_fbc_plane_stride(plane_state) *
991 static bool i965_fbc_stride_is_valid(const struct intel_plane_state *plane_state)
993 const struct drm_framebuffer *fb = plane_state->hw.fb;
994 unsigned int stride = intel_fbc_plane_stride(plane_state) *
1000 static bool g4x_fbc_stride_is_valid(const struct intel_plane_state *plane_state)
1005 static bool skl_fbc_stride_is_valid(const struct intel_plane_state *plane_state)
1007 const struct drm_framebuffer *fb = plane_state->hw.fb;
1008 unsigned int stride = intel_fbc_plane_stride(plane_state) *
1018 static bool icl_fbc_stride_is_valid(const struct intel_plane_state *plane_state)
1023 static bool stride_is_valid(const struct intel_plane_state *plane_state)
1025 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
1028 return icl_fbc_stride_is_valid(plane_state);
1030 return skl_fbc_stride_is_valid(plane_state);
1032 return g4x_fbc_stride_is_valid(plane_state);
1034 return i965_fbc_stride_is_valid(plane_state);
1036 return i8xx_fbc_stride_is_valid(plane_state);
1039 static bool i8xx_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state)
1041 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
1042 const struct drm_framebuffer *fb = plane_state->hw.fb;
1059 static bool g4x_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state)
1061 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
1062 const struct drm_framebuffer *fb = plane_state->hw.fb;
1078 static bool lnl_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state)
1080 const struct drm_framebuffer *fb = plane_state->hw.fb;
1094 static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
1096 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
1099 return lnl_fbc_pixel_format_is_valid(plane_state);
1101 return g4x_fbc_pixel_format_is_valid(plane_state);
1103 return i8xx_fbc_pixel_format_is_valid(plane_state);
1106 static bool i8xx_fbc_rotation_is_valid(const struct intel_plane_state *plane_state)
1108 return plane_state->hw.rotation == DRM_MODE_ROTATE_0;
1111 static bool g4x_fbc_rotation_is_valid(const struct intel_plane_state *plane_state)
1116 static bool skl_fbc_rotation_is_valid(const struct intel_plane_state *plane_state)
1118 const struct drm_framebuffer *fb = plane_state->hw.fb;
1119 unsigned int rotation = plane_state->hw.rotation;
1128 static bool rotation_is_valid(const struct intel_plane_state *plane_state)
1130 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
1133 return skl_fbc_rotation_is_valid(plane_state);
1135 return g4x_fbc_rotation_is_valid(plane_state);
1137 return i8xx_fbc_rotation_is_valid(plane_state);
1167 static bool intel_fbc_surface_size_ok(const struct intel_plane_state *plane_state)
1169 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
1174 effective_w = plane_state->view.color_plane[0].x +
1175 (drm_rect_width(&plane_state->uapi.src) >> 16);
1176 effective_h = plane_state->view.color_plane[0].y +
1177 (drm_rect_height(&plane_state->uapi.src) >> 16);
1200 static bool intel_fbc_plane_size_valid(const struct intel_plane_state *plane_state)
1202 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
1207 w = drm_rect_width(&plane_state->uapi.src) >> 16;
1208 h = drm_rect_height(&plane_state->uapi.src) >> 16;
1213 static bool i8xx_fbc_tiling_valid(const struct intel_plane_state *plane_state)
1215 const struct drm_framebuffer *fb = plane_state->hw.fb;
1220 static bool skl_fbc_tiling_valid(const struct intel_plane_state *plane_state)
1225 static bool tiling_is_valid(const struct intel_plane_state *plane_state)
1227 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
1230 return skl_fbc_tiling_valid(plane_state);
1232 return i8xx_fbc_tiling_valid(plane_state);
1289 const struct intel_plane_state *plane_state)
1298 drm_rect_fp_to_int(&src, &plane_state->uapi.src);
1310 const struct intel_plane_state *plane_state =
1315 WARN_ON(plane_state->no_fbc_reason);
1323 fbc_state->fence_y_offset = intel_plane_fence_y_offset(plane_state);
1325 drm_WARN_ON(display->drm, plane_state->flags & PLANE_HAS_FENCE &&
1328 if (plane_state->flags & PLANE_HAS_FENCE)
1329 fbc_state->fence_id = i915_vma_fence_id(plane_state->ggtt_vma);
1333 fbc_state->cfb_stride = intel_fbc_cfb_stride(plane_state);
1334 fbc_state->cfb_size = intel_fbc_cfb_size(plane_state);
1335 fbc_state->override_cfb_stride = intel_fbc_override_cfb_stride(plane_state);
1338 static bool intel_fbc_is_fence_ok(const struct intel_plane_state *plane_state)
1340 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
1355 (plane_state->flags & PLANE_HAS_FENCE &&
1356 i915_vma_fence_id(plane_state->ggtt_vma) != -1);
1359 static bool intel_fbc_is_cfb_ok(const struct intel_plane_state *plane_state)
1361 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
1364 return intel_fbc_min_limit(plane_state) <= fbc->limit &&
1365 intel_fbc_cfb_size(plane_state) <= fbc->limit *
1369 static bool intel_fbc_is_ok(const struct intel_plane_state *plane_state)
1371 return !plane_state->no_fbc_reason &&
1372 intel_fbc_is_fence_ok(plane_state) &&
1373 intel_fbc_is_cfb_ok(plane_state);
1377 __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state,
1380 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
1383 int width = drm_rect_width(&plane_state->uapi.src) >> 16;
1384 const struct drm_rect *damage = &plane_state->damage;
1385 int y_offset = plane_state->view.color_plane[0].y;
1390 !intel_fbc_is_ok(plane_state)) {
1409 struct intel_plane_state *plane_state;
1416 for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
1425 __intel_fbc_prepare_dirty_rect(plane_state,
1437 struct intel_plane_state *plane_state =
1439 const struct drm_framebuffer *fb = plane_state->hw.fb;
1440 struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc);
1448 plane_state->no_fbc_reason = "stolen memory not initialised";
1453 plane_state->no_fbc_reason = "VGPU active";
1458 plane_state->no_fbc_reason = "disabled per module param or by default";
1462 if (!plane_state->uapi.visible) {
1463 plane_state->no_fbc_reason = "plane not visible";
1468 plane_state->no_fbc_reason = "Wa_16023588340";
1474 plane_state->no_fbc_reason = "VT-d enabled";
1481 plane_state->no_fbc_reason = "interlaced mode not supported";
1486 plane_state->no_fbc_reason = "double wide pipe not supported";
1503 plane_state->no_fbc_reason = "Selective update enabled";
1511 plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)";
1515 if (!pixel_format_is_valid(plane_state)) {
1516 plane_state->no_fbc_reason = "pixel format not supported";
1520 if (!tiling_is_valid(plane_state)) {
1521 plane_state->no_fbc_reason = "tiling not supported";
1525 if (!rotation_is_valid(plane_state)) {
1526 plane_state->no_fbc_reason = "rotation not supported";
1530 if (!stride_is_valid(plane_state)) {
1531 plane_state->no_fbc_reason = "stride not supported";
1536 plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
1538 plane_state->no_fbc_reason = "per-pixel alpha not supported";
1542 if (!intel_fbc_plane_size_valid(plane_state)) {
1543 plane_state->no_fbc_reason = "plane size too big";
1547 if (!intel_fbc_surface_size_ok(plane_state)) {
1548 plane_state->no_fbc_reason = "surface size too big";
1558 plane_state->view.color_plane[0].y & 3) {
1559 plane_state->no_fbc_reason = "plane start Y offset misaligned";
1565 (plane_state->view.color_plane[0].y +
1566 (drm_rect_height(&plane_state->uapi.src) >> 16)) & 3) {
1567 plane_state->no_fbc_reason = "plane end Y offset misaligned";
1580 plane_state->no_fbc_reason = "pixel rate too high";
1585 plane_state->no_fbc_reason = NULL;
1676 const struct intel_plane_state __maybe_unused *plane_state;
1681 for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
1731 const struct intel_plane_state __maybe_unused *plane_state;
1735 for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
1830 struct intel_plane_state __maybe_unused *plane_state;
1834 for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
1850 const struct intel_plane_state *plane_state =
1860 if (intel_fbc_is_ok(plane_state)) {
1870 fbc->no_fbc_reason = plane_state->no_fbc_reason;
1874 if (!intel_fbc_is_fence_ok(plane_state)) {
1884 if (intel_fbc_alloc_cfb(fbc, intel_fbc_cfb_size(plane_state),
1885 intel_fbc_min_limit(plane_state))) {
1897 intel_fbc_hw_intialize_dirty_rect(fbc, plane_state);
1932 const struct intel_plane_state *plane_state;
1936 for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
1945 plane_state->no_fbc_reason) {
2169 const struct intel_plane_state *plane_state =
2178 plane_state->no_fbc_reason ?: "FBC possible");