2290 	u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock;  in ilk_pipe_pixel_rate()
2337 			crtc_state->hw.pipe_mode.crtc_clock;  in intel_crtc_compute_pixel_rate()
2387 	struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;  in intel_crtc_readout_derived_state()  local
2394 	drm_mode_copy(pipe_mode, adjusted_mode);  in intel_crtc_readout_derived_state()
2397 	intel_splitter_adjust_timings(crtc_state, pipe_mode);  in intel_crtc_readout_derived_state()
2404 	intel_mode_from_crtc_timings(adjusted_mode, pipe_mode);  in intel_crtc_readout_derived_state()
2407 	drm_mode_copy(mode, pipe_mode);  in intel_crtc_readout_derived_state()
2414 	intel_joiner_adjust_timings(crtc_state, pipe_mode);  in intel_crtc_readout_derived_state()
2415 	intel_mode_from_crtc_timings(pipe_mode, pipe_mode);  in intel_crtc_readout_derived_state()
2481 	struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;  in intel_crtc_compute_pipe_mode()  local
2488 	drm_mode_copy(pipe_mode, adjusted_mode);  in intel_crtc_compute_pipe_mode()
2491 	intel_splitter_adjust_timings(crtc_state, pipe_mode);  in intel_crtc_compute_pipe_mode()
2494 	intel_joiner_adjust_timings(crtc_state, pipe_mode);  in intel_crtc_compute_pipe_mode()
2495 	intel_mode_from_crtc_timings(pipe_mode, pipe_mode);  in intel_crtc_compute_pipe_mode()
2505 		    pipe_mode->crtc_clock > clock_limit) {  in intel_crtc_compute_pipe_mode()
2511 	if (pipe_mode->crtc_clock > clock_limit) {  in intel_crtc_compute_pipe_mode()
2515 			    pipe_mode->crtc_clock, clock_limit,  in intel_crtc_compute_pipe_mode()
4188 	const struct drm_display_mode *pipe_mode =  in hsw_linetime_wm()  local
4189 		&crtc_state->hw.pipe_mode;  in hsw_linetime_wm()
4195 	linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8,  in hsw_linetime_wm()
4196 					pipe_mode->crtc_clock);  in hsw_linetime_wm()
4204 	const struct drm_display_mode *pipe_mode =  in hsw_ips_linetime_wm()  local
4205 		&crtc_state->hw.pipe_mode;  in hsw_ips_linetime_wm()
4211 	linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8,  in hsw_ips_linetime_wm()
4221 	const struct drm_display_mode *pipe_mode =  in skl_linetime_wm()  local
4222 		&crtc_state->hw.pipe_mode;  in skl_linetime_wm()
4228 	linetime_wm = DIV_ROUND_UP(pipe_mode->crtc_htotal * 1000 * 8,  in skl_linetime_wm()
4581 	drm_mode_copy(&secondary_crtc_state->hw.pipe_mode,  in copy_joiner_crtc_state_modeset()
4582 		      &primary_crtc_state->hw.pipe_mode);  in copy_joiner_crtc_state_modeset()
5307 	PIPE_CONF_CHECK_TIMINGS(hw.pipe_mode);  in intel_pipe_config_compare()
5417 		PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock);  in intel_pipe_config_compare()