Lines Matching refs:TRANSCONF

415 		if (intel_de_wait_for_clear(display, TRANSCONF(display, cpu_transcoder),
438 					TRANSCONF(display, cpu_transcoder));
527 	val = intel_de_read(display, TRANSCONF(display, cpu_transcoder));
542 	intel_de_write(display, TRANSCONF(display, cpu_transcoder),
544 	intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
573 	val = intel_de_read(display, TRANSCONF(display, cpu_transcoder));
593 	intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
2801 				     TRANSCONF(display, cpu_transcoder)) & TRANSCONF_INTERLACE_MASK_HSW;
2804 				     TRANSCONF(display, cpu_transcoder)) & TRANSCONF_INTERLACE_MASK;
2953 	intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
2954 	intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
2998 	tmp = intel_de_read(display, TRANSCONF(display, cpu_transcoder));
3149 	intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
3150 	intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
3178 	intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);
3179 	intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));
3340 	tmp = intel_de_read(display, TRANSCONF(display, cpu_transcoder));
3828 			    TRANSCONF(display, pipe_config->cpu_transcoder));
3930 					TRANSCONF(display, pipe_config->cpu_transcoder));
8206 	intel_de_write(display, TRANSCONF(display, pipe), TRANSCONF_ENABLE);
8207 	intel_de_posting_read(display, TRANSCONF(display, pipe));
8230 	intel_de_write(display, TRANSCONF(display, pipe), 0);
8231 	intel_de_posting_read(display, TRANSCONF(display, pipe));