Lines Matching full:encoder
107 static int intel_ddi_hdmi_level(struct intel_encoder *encoder, in intel_ddi_hdmi_level() argument
112 level = intel_bios_hdmi_level_shift(encoder->devdata); in intel_ddi_hdmi_level()
134 void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder, in hsw_prepare_dp_ddi_buffers() argument
137 struct intel_display *display = to_intel_display(encoder); in hsw_prepare_dp_ddi_buffers()
140 enum port port = encoder->port; in hsw_prepare_dp_ddi_buffers()
143 trans = intel_ddi_buf_trans_get(encoder, crtc_state, &n_entries); in hsw_prepare_dp_ddi_buffers()
149 intel_bios_dp_boost_level(encoder->devdata)) in hsw_prepare_dp_ddi_buffers()
165 static void hsw_prepare_hdmi_ddi_buffers(struct intel_encoder *encoder, in hsw_prepare_hdmi_ddi_buffers() argument
168 struct intel_display *display = to_intel_display(encoder); in hsw_prepare_hdmi_ddi_buffers()
169 int level = intel_ddi_level(encoder, crtc_state, 0); in hsw_prepare_hdmi_ddi_buffers()
172 enum port port = encoder->port; in hsw_prepare_hdmi_ddi_buffers()
175 trans = intel_ddi_buf_trans_get(encoder, crtc_state, &n_entries); in hsw_prepare_hdmi_ddi_buffers()
181 intel_bios_hdmi_boost_level(encoder->devdata)) in hsw_prepare_hdmi_ddi_buffers()
221 static void intel_wait_ddi_buf_active(struct intel_encoder *encoder) in intel_wait_ddi_buf_active() argument
223 struct intel_display *display = to_intel_display(encoder); in intel_wait_ddi_buf_active()
224 enum port port = encoder->port; in intel_wait_ddi_buf_active()
267 static u32 icl_pll_to_ddi_clk_sel(struct intel_encoder *encoder, in icl_pll_to_ddi_clk_sel() argument
353 static void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder, in intel_ddi_init_dp_buf_reg() argument
356 struct intel_display *display = to_intel_display(encoder); in intel_ddi_init_dp_buf_reg()
357 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_ddi_init_dp_buf_reg()
358 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_init_dp_buf_reg()
376 if (display->platform.alderlake_p && intel_encoder_is_tc(encoder)) { in intel_ddi_init_dp_buf_reg()
382 if (IS_DISPLAY_VER(display, 11, 13) && intel_encoder_is_tc(encoder)) { in intel_ddi_init_dp_buf_reg()
512 intel_ddi_transcoder_func_reg_val_get(struct intel_encoder *encoder, in intel_ddi_transcoder_func_reg_val_get() argument
519 enum port port = encoder->port; in intel_ddi_transcoder_func_reg_val_get()
625 void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder, in intel_ddi_enable_transcoder_func() argument
649 intel_ddi_transcoder_func_reg_val_get(encoder, in intel_ddi_enable_transcoder_func()
659 intel_ddi_config_transcoder_func(struct intel_encoder *encoder, in intel_ddi_config_transcoder_func() argument
668 ctl = intel_ddi_transcoder_func_reg_val_get(encoder, crtc_state); in intel_ddi_config_transcoder_func()
748 struct intel_encoder *encoder = intel_attached_encoder(intel_connector); in intel_ddi_connector_get_hw_state() local
750 enum port port = encoder->port; in intel_ddi_connector_get_hw_state()
758 encoder->power_domain); in intel_ddi_connector_get_hw_state()
763 if (!encoder->get_hw_state(encoder, &pipe)) { in intel_ddi_connector_get_hw_state()
786 * encoder->get_hw_state() should have bailed out on MST. This in intel_ddi_connector_get_hw_state()
791 /* encoder->get_hw_state() should have bailed out on MST. */ in intel_ddi_connector_get_hw_state()
798 intel_display_power_put(display, encoder->power_domain, wakeref); in intel_ddi_connector_get_hw_state()
803 static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder, in intel_ddi_get_encoder_pipes() argument
806 struct intel_display *display = to_intel_display(encoder); in intel_ddi_get_encoder_pipes()
807 enum port port = encoder->port; in intel_ddi_get_encoder_pipes()
817 encoder->power_domain); in intel_ddi_get_encoder_pipes()
886 "No pipe for [ENCODER:%d:%s] found\n", in intel_ddi_get_encoder_pipes()
887 encoder->base.base.id, encoder->base.name); in intel_ddi_get_encoder_pipes()
890 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_ddi_get_encoder_pipes()
909 "Multiple pipes for [ENCODER:%d:%s] (pipe_mask %02x)\n", in intel_ddi_get_encoder_pipes()
910 encoder->base.base.id, encoder->base.name, in intel_ddi_get_encoder_pipes()
917 …"Conflicting MST and non-MST state for [ENCODER:%d:%s] (pipe masks: all %02x, MST %02x, 128b/132b … in intel_ddi_get_encoder_pipes()
918 encoder->base.base.id, encoder->base.name, in intel_ddi_get_encoder_pipes()
930 "[ENCODER:%d:%s] enabled but PHY powered down? (PHY_CTL %08x)\n", in intel_ddi_get_encoder_pipes()
931 encoder->base.base.id, encoder->base.name, tmp); in intel_ddi_get_encoder_pipes()
934 intel_display_power_put(display, encoder->power_domain, wakeref); in intel_ddi_get_encoder_pipes()
937 bool intel_ddi_get_hw_state(struct intel_encoder *encoder, in intel_ddi_get_hw_state() argument
943 intel_ddi_get_encoder_pipes(encoder, &pipe_mask, &is_mst); in intel_ddi_get_hw_state()
1014 static void intel_ddi_get_power_domains(struct intel_encoder *encoder, in intel_ddi_get_power_domains() argument
1017 struct intel_display *display = to_intel_display(encoder); in intel_ddi_get_power_domains()
1029 dig_port = enc_to_dig_port(encoder); in intel_ddi_get_power_domains()
1040 void intel_ddi_enable_transcoder_clock(struct intel_encoder *encoder, in intel_ddi_enable_transcoder_clock() argument
1045 enum phy phy = intel_encoder_to_phy(encoder); in intel_ddi_enable_transcoder_clock()
1054 val = TGL_TRANS_CLK_SEL_PORT(encoder->port); in intel_ddi_enable_transcoder_clock()
1056 val = TRANS_CLK_SEL_PORT(encoder->port); in intel_ddi_enable_transcoder_clock()
1092 static void skl_ddi_set_iboost(struct intel_encoder *encoder, in skl_ddi_set_iboost() argument
1096 struct intel_display *display = to_intel_display(encoder); in skl_ddi_set_iboost()
1097 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in skl_ddi_set_iboost()
1101 iboost = intel_bios_hdmi_boost_level(encoder->devdata); in skl_ddi_set_iboost()
1103 iboost = intel_bios_dp_boost_level(encoder->devdata); in skl_ddi_set_iboost()
1109 trans = intel_ddi_buf_trans_get(encoder, crtc_state, &n_entries); in skl_ddi_set_iboost()
1122 _skl_ddi_set_iboost(display, encoder->port, iboost); in skl_ddi_set_iboost()
1124 if (encoder->port == PORT_A && dig_port->max_lanes == 4) in skl_ddi_set_iboost()
1132 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in intel_ddi_dp_voltage_max() local
1135 intel_ddi_buf_trans_get(encoder, crtc_state, &n_entries); in intel_ddi_dp_voltage_max()
1169 static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder, in icl_ddi_combo_vswing_program() argument
1172 struct intel_display *display = to_intel_display(encoder); in icl_ddi_combo_vswing_program()
1174 enum phy phy = intel_encoder_to_phy(encoder); in icl_ddi_combo_vswing_program()
1178 trans = intel_ddi_buf_trans_get(encoder, crtc_state, &n_entries); in icl_ddi_combo_vswing_program()
1183 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in icl_ddi_combo_vswing_program()
1203 int level = intel_ddi_level(encoder, crtc_state, ln); in icl_ddi_combo_vswing_program()
1215 int level = intel_ddi_level(encoder, crtc_state, ln); in icl_ddi_combo_vswing_program()
1226 int level = intel_ddi_level(encoder, crtc_state, ln); in icl_ddi_combo_vswing_program()
1234 static void icl_combo_phy_set_signal_levels(struct intel_encoder *encoder, in icl_combo_phy_set_signal_levels() argument
1237 struct intel_display *display = to_intel_display(encoder); in icl_combo_phy_set_signal_levels()
1238 enum phy phy = intel_encoder_to_phy(encoder); in icl_combo_phy_set_signal_levels()
1277 icl_ddi_combo_vswing_program(encoder, crtc_state); in icl_combo_phy_set_signal_levels()
1285 static void icl_mg_phy_set_signal_levels(struct intel_encoder *encoder, in icl_mg_phy_set_signal_levels() argument
1288 struct intel_display *display = to_intel_display(encoder); in icl_mg_phy_set_signal_levels()
1289 enum tc_port tc_port = intel_encoder_to_tc(encoder); in icl_mg_phy_set_signal_levels()
1293 if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder))) in icl_mg_phy_set_signal_levels()
1296 trans = intel_ddi_buf_trans_get(encoder, crtc_state, &n_entries); in icl_mg_phy_set_signal_levels()
1311 level = intel_ddi_level(encoder, crtc_state, 2*ln+0); in icl_mg_phy_set_signal_levels()
1317 level = intel_ddi_level(encoder, crtc_state, 2*ln+1); in icl_mg_phy_set_signal_levels()
1328 level = intel_ddi_level(encoder, crtc_state, 2*ln+0); in icl_mg_phy_set_signal_levels()
1337 level = intel_ddi_level(encoder, crtc_state, 2*ln+1); in icl_mg_phy_set_signal_levels()
1386 static void tgl_dkl_phy_set_signal_levels(struct intel_encoder *encoder, in tgl_dkl_phy_set_signal_levels() argument
1389 struct intel_display *display = to_intel_display(encoder); in tgl_dkl_phy_set_signal_levels()
1390 enum tc_port tc_port = intel_encoder_to_tc(encoder); in tgl_dkl_phy_set_signal_levels()
1394 if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder))) in tgl_dkl_phy_set_signal_levels()
1397 trans = intel_ddi_buf_trans_get(encoder, crtc_state, &n_entries); in tgl_dkl_phy_set_signal_levels()
1406 if ((intel_encoder_is_hdmi(encoder) && in tgl_dkl_phy_set_signal_levels()
1408 (intel_encoder_is_dp(encoder) && in tgl_dkl_phy_set_signal_levels()
1420 level = intel_ddi_level(encoder, crtc_state, 2*ln+0); in tgl_dkl_phy_set_signal_levels()
1430 level = intel_ddi_level(encoder, crtc_state, 2*ln+1); in tgl_dkl_phy_set_signal_levels()
1506 int intel_ddi_level(struct intel_encoder *encoder, in intel_ddi_level() argument
1510 struct intel_display *display = to_intel_display(encoder); in intel_ddi_level()
1514 trans = intel_ddi_buf_trans_get(encoder, crtc_state, &n_entries); in intel_ddi_level()
1519 level = intel_ddi_hdmi_level(encoder, trans); in intel_ddi_level()
1521 level = intel_ddi_dp_level(enc_to_intel_dp(encoder), crtc_state, in intel_ddi_level()
1531 hsw_set_signal_levels(struct intel_encoder *encoder, in hsw_set_signal_levels() argument
1534 struct intel_display *display = to_intel_display(encoder); in hsw_set_signal_levels()
1535 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in hsw_set_signal_levels()
1536 int level = intel_ddi_level(encoder, crtc_state, 0); in hsw_set_signal_levels()
1537 enum port port = encoder->port; in hsw_set_signal_levels()
1541 skl_ddi_set_iboost(encoder, crtc_state, level); in hsw_set_signal_levels()
1602 static void adls_ddi_enable_clock(struct intel_encoder *encoder, in adls_ddi_enable_clock() argument
1605 struct intel_display *display = to_intel_display(encoder); in adls_ddi_enable_clock()
1607 enum phy phy = intel_encoder_to_phy(encoder); in adls_ddi_enable_clock()
1618 static void adls_ddi_disable_clock(struct intel_encoder *encoder) in adls_ddi_disable_clock() argument
1620 struct intel_display *display = to_intel_display(encoder); in adls_ddi_disable_clock()
1621 enum phy phy = intel_encoder_to_phy(encoder); in adls_ddi_disable_clock()
1627 static bool adls_ddi_is_clock_enabled(struct intel_encoder *encoder) in adls_ddi_is_clock_enabled() argument
1629 struct intel_display *display = to_intel_display(encoder); in adls_ddi_is_clock_enabled()
1630 enum phy phy = intel_encoder_to_phy(encoder); in adls_ddi_is_clock_enabled()
1636 static struct intel_dpll *adls_ddi_get_pll(struct intel_encoder *encoder) in adls_ddi_get_pll() argument
1638 struct intel_display *display = to_intel_display(encoder); in adls_ddi_get_pll()
1639 enum phy phy = intel_encoder_to_phy(encoder); in adls_ddi_get_pll()
1646 static void rkl_ddi_enable_clock(struct intel_encoder *encoder, in rkl_ddi_enable_clock() argument
1649 struct intel_display *display = to_intel_display(encoder); in rkl_ddi_enable_clock()
1651 enum phy phy = intel_encoder_to_phy(encoder); in rkl_ddi_enable_clock()
1662 static void rkl_ddi_disable_clock(struct intel_encoder *encoder) in rkl_ddi_disable_clock() argument
1664 struct intel_display *display = to_intel_display(encoder); in rkl_ddi_disable_clock()
1665 enum phy phy = intel_encoder_to_phy(encoder); in rkl_ddi_disable_clock()
1671 static bool rkl_ddi_is_clock_enabled(struct intel_encoder *encoder) in rkl_ddi_is_clock_enabled() argument
1673 struct intel_display *display = to_intel_display(encoder); in rkl_ddi_is_clock_enabled()
1674 enum phy phy = intel_encoder_to_phy(encoder); in rkl_ddi_is_clock_enabled()
1680 static struct intel_dpll *rkl_ddi_get_pll(struct intel_encoder *encoder) in rkl_ddi_get_pll() argument
1682 struct intel_display *display = to_intel_display(encoder); in rkl_ddi_get_pll()
1683 enum phy phy = intel_encoder_to_phy(encoder); in rkl_ddi_get_pll()
1690 static void dg1_ddi_enable_clock(struct intel_encoder *encoder, in dg1_ddi_enable_clock() argument
1693 struct intel_display *display = to_intel_display(encoder); in dg1_ddi_enable_clock()
1695 enum phy phy = intel_encoder_to_phy(encoder); in dg1_ddi_enable_clock()
1715 static void dg1_ddi_disable_clock(struct intel_encoder *encoder) in dg1_ddi_disable_clock() argument
1717 struct intel_display *display = to_intel_display(encoder); in dg1_ddi_disable_clock()
1718 enum phy phy = intel_encoder_to_phy(encoder); in dg1_ddi_disable_clock()
1724 static bool dg1_ddi_is_clock_enabled(struct intel_encoder *encoder) in dg1_ddi_is_clock_enabled() argument
1726 struct intel_display *display = to_intel_display(encoder); in dg1_ddi_is_clock_enabled()
1727 enum phy phy = intel_encoder_to_phy(encoder); in dg1_ddi_is_clock_enabled()
1733 static struct intel_dpll *dg1_ddi_get_pll(struct intel_encoder *encoder) in dg1_ddi_get_pll() argument
1735 struct intel_display *display = to_intel_display(encoder); in dg1_ddi_get_pll()
1736 enum phy phy = intel_encoder_to_phy(encoder); in dg1_ddi_get_pll()
1756 static void icl_ddi_combo_enable_clock(struct intel_encoder *encoder, in icl_ddi_combo_enable_clock() argument
1759 struct intel_display *display = to_intel_display(encoder); in icl_ddi_combo_enable_clock()
1761 enum phy phy = intel_encoder_to_phy(encoder); in icl_ddi_combo_enable_clock()
1772 static void icl_ddi_combo_disable_clock(struct intel_encoder *encoder) in icl_ddi_combo_disable_clock() argument
1774 struct intel_display *display = to_intel_display(encoder); in icl_ddi_combo_disable_clock()
1775 enum phy phy = intel_encoder_to_phy(encoder); in icl_ddi_combo_disable_clock()
1781 static bool icl_ddi_combo_is_clock_enabled(struct intel_encoder *encoder) in icl_ddi_combo_is_clock_enabled() argument
1783 struct intel_display *display = to_intel_display(encoder); in icl_ddi_combo_is_clock_enabled()
1784 enum phy phy = intel_encoder_to_phy(encoder); in icl_ddi_combo_is_clock_enabled()
1790 struct intel_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder) in icl_ddi_combo_get_pll() argument
1792 struct intel_display *display = to_intel_display(encoder); in icl_ddi_combo_get_pll()
1793 enum phy phy = intel_encoder_to_phy(encoder); in icl_ddi_combo_get_pll()
1800 static void jsl_ddi_tc_enable_clock(struct intel_encoder *encoder, in jsl_ddi_tc_enable_clock() argument
1803 struct intel_display *display = to_intel_display(encoder); in jsl_ddi_tc_enable_clock()
1805 enum port port = encoder->port; in jsl_ddi_tc_enable_clock()
1816 icl_ddi_combo_enable_clock(encoder, crtc_state); in jsl_ddi_tc_enable_clock()
1819 static void jsl_ddi_tc_disable_clock(struct intel_encoder *encoder) in jsl_ddi_tc_disable_clock() argument
1821 struct intel_display *display = to_intel_display(encoder); in jsl_ddi_tc_disable_clock()
1822 enum port port = encoder->port; in jsl_ddi_tc_disable_clock()
1824 icl_ddi_combo_disable_clock(encoder); in jsl_ddi_tc_disable_clock()
1829 static bool jsl_ddi_tc_is_clock_enabled(struct intel_encoder *encoder) in jsl_ddi_tc_is_clock_enabled() argument
1831 struct intel_display *display = to_intel_display(encoder); in jsl_ddi_tc_is_clock_enabled()
1832 enum port port = encoder->port; in jsl_ddi_tc_is_clock_enabled()
1840 return icl_ddi_combo_is_clock_enabled(encoder); in jsl_ddi_tc_is_clock_enabled()
1843 static void icl_ddi_tc_enable_clock(struct intel_encoder *encoder, in icl_ddi_tc_enable_clock() argument
1846 struct intel_display *display = to_intel_display(encoder); in icl_ddi_tc_enable_clock()
1848 enum tc_port tc_port = intel_encoder_to_tc(encoder); in icl_ddi_tc_enable_clock()
1849 enum port port = encoder->port; in icl_ddi_tc_enable_clock()
1855 icl_pll_to_ddi_clk_sel(encoder, crtc_state)); in icl_ddi_tc_enable_clock()
1865 static void icl_ddi_tc_disable_clock(struct intel_encoder *encoder) in icl_ddi_tc_disable_clock() argument
1867 struct intel_display *display = to_intel_display(encoder); in icl_ddi_tc_disable_clock()
1868 enum tc_port tc_port = intel_encoder_to_tc(encoder); in icl_ddi_tc_disable_clock()
1869 enum port port = encoder->port; in icl_ddi_tc_disable_clock()
1881 static bool icl_ddi_tc_is_clock_enabled(struct intel_encoder *encoder) in icl_ddi_tc_is_clock_enabled() argument
1883 struct intel_display *display = to_intel_display(encoder); in icl_ddi_tc_is_clock_enabled()
1884 enum tc_port tc_port = intel_encoder_to_tc(encoder); in icl_ddi_tc_is_clock_enabled()
1885 enum port port = encoder->port; in icl_ddi_tc_is_clock_enabled()
1898 static struct intel_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encoder) in icl_ddi_tc_get_pll() argument
1900 struct intel_display *display = to_intel_display(encoder); in icl_ddi_tc_get_pll()
1901 enum tc_port tc_port = intel_encoder_to_tc(encoder); in icl_ddi_tc_get_pll()
1902 enum port port = encoder->port; in icl_ddi_tc_get_pll()
1928 static struct intel_dpll *bxt_ddi_get_pll(struct intel_encoder *encoder) in bxt_ddi_get_pll() argument
1930 struct intel_display *display = to_intel_display(encoder->base.dev); in bxt_ddi_get_pll()
1933 switch (encoder->port) { in bxt_ddi_get_pll()
1944 MISSING_CASE(encoder->port); in bxt_ddi_get_pll()
1951 static void skl_ddi_enable_clock(struct intel_encoder *encoder, in skl_ddi_enable_clock() argument
1954 struct intel_display *display = to_intel_display(encoder); in skl_ddi_enable_clock()
1956 enum port port = encoder->port; in skl_ddi_enable_clock()
1972 static void skl_ddi_disable_clock(struct intel_encoder *encoder) in skl_ddi_disable_clock() argument
1974 struct intel_display *display = to_intel_display(encoder); in skl_ddi_disable_clock()
1975 enum port port = encoder->port; in skl_ddi_disable_clock()
1985 static bool skl_ddi_is_clock_enabled(struct intel_encoder *encoder) in skl_ddi_is_clock_enabled() argument
1987 struct intel_display *display = to_intel_display(encoder); in skl_ddi_is_clock_enabled()
1988 enum port port = encoder->port; in skl_ddi_is_clock_enabled()
1997 static struct intel_dpll *skl_ddi_get_pll(struct intel_encoder *encoder) in skl_ddi_get_pll() argument
1999 struct intel_display *display = to_intel_display(encoder); in skl_ddi_get_pll()
2000 enum port port = encoder->port; in skl_ddi_get_pll()
2019 void hsw_ddi_enable_clock(struct intel_encoder *encoder, in hsw_ddi_enable_clock() argument
2022 struct intel_display *display = to_intel_display(encoder); in hsw_ddi_enable_clock()
2024 enum port port = encoder->port; in hsw_ddi_enable_clock()
2032 void hsw_ddi_disable_clock(struct intel_encoder *encoder) in hsw_ddi_disable_clock() argument
2034 struct intel_display *display = to_intel_display(encoder); in hsw_ddi_disable_clock()
2035 enum port port = encoder->port; in hsw_ddi_disable_clock()
2040 bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder) in hsw_ddi_is_clock_enabled() argument
2042 struct intel_display *display = to_intel_display(encoder); in hsw_ddi_is_clock_enabled()
2043 enum port port = encoder->port; in hsw_ddi_is_clock_enabled()
2048 static struct intel_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder) in hsw_ddi_get_pll() argument
2050 struct intel_display *display = to_intel_display(encoder); in hsw_ddi_get_pll()
2051 enum port port = encoder->port; in hsw_ddi_get_pll()
2086 void intel_ddi_enable_clock(struct intel_encoder *encoder, in intel_ddi_enable_clock() argument
2089 if (encoder->enable_clock) in intel_ddi_enable_clock()
2090 encoder->enable_clock(encoder, crtc_state); in intel_ddi_enable_clock()
2093 void intel_ddi_disable_clock(struct intel_encoder *encoder) in intel_ddi_disable_clock() argument
2095 if (encoder->disable_clock) in intel_ddi_disable_clock()
2096 encoder->disable_clock(encoder); in intel_ddi_disable_clock()
2099 void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder) in intel_ddi_sanitize_encoder_pll_mapping() argument
2101 struct intel_display *display = to_intel_display(encoder); in intel_ddi_sanitize_encoder_pll_mapping()
2106 * In case of DP MST, we sanitize the primary encoder only, not the in intel_ddi_sanitize_encoder_pll_mapping()
2109 if (encoder->type == INTEL_OUTPUT_DP_MST) in intel_ddi_sanitize_encoder_pll_mapping()
2112 if (!encoder->base.crtc && intel_encoder_is_dp(encoder)) { in intel_ddi_sanitize_encoder_pll_mapping()
2116 intel_ddi_get_encoder_pipes(encoder, &pipe_mask, &is_mst); in intel_ddi_sanitize_encoder_pll_mapping()
2125 port_mask = BIT(encoder->port); in intel_ddi_sanitize_encoder_pll_mapping()
2126 ddi_clk_needed = encoder->base.crtc; in intel_ddi_sanitize_encoder_pll_mapping()
2128 if (encoder->type == INTEL_OUTPUT_DSI) { in intel_ddi_sanitize_encoder_pll_mapping()
2131 port_mask = intel_dsi_encoder_ports(encoder); in intel_ddi_sanitize_encoder_pll_mapping()
2134 * encoder using any of the ports of this DSI encoder. in intel_ddi_sanitize_encoder_pll_mapping()
2137 if (other_encoder == encoder) in intel_ddi_sanitize_encoder_pll_mapping()
2151 if (ddi_clk_needed || !encoder->is_clock_enabled || in intel_ddi_sanitize_encoder_pll_mapping()
2152 !encoder->is_clock_enabled(encoder)) in intel_ddi_sanitize_encoder_pll_mapping()
2156 "[ENCODER:%d:%s] is disabled/in DSI mode with an ungated DDI clock, gate it\n", in intel_ddi_sanitize_encoder_pll_mapping()
2157 encoder->base.base.id, encoder->base.name); in intel_ddi_sanitize_encoder_pll_mapping()
2159 encoder->disable_clock(encoder); in intel_ddi_sanitize_encoder_pll_mapping()
2273 intel_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder, in dp_tp_ctl_reg() argument
2276 struct intel_display *display = to_intel_display(encoder); in dp_tp_ctl_reg()
2282 return DP_TP_CTL(encoder->port); in dp_tp_ctl_reg()
2285 static intel_reg_t dp_tp_status_reg(struct intel_encoder *encoder, in dp_tp_status_reg() argument
2288 struct intel_display *display = to_intel_display(encoder); in dp_tp_status_reg()
2294 return DP_TP_STATUS(encoder->port); in dp_tp_status_reg()
2297 void intel_ddi_clear_act_sent(struct intel_encoder *encoder, in intel_ddi_clear_act_sent() argument
2300 struct intel_display *display = to_intel_display(encoder); in intel_ddi_clear_act_sent()
2302 intel_de_write(display, dp_tp_status_reg(encoder, crtc_state), in intel_ddi_clear_act_sent()
2306 void intel_ddi_wait_for_act_sent(struct intel_encoder *encoder, in intel_ddi_wait_for_act_sent() argument
2309 struct intel_display *display = to_intel_display(encoder); in intel_ddi_wait_for_act_sent()
2311 if (intel_de_wait_for_set_ms(display, dp_tp_status_reg(encoder, crtc_state), in intel_ddi_wait_for_act_sent()
2375 int intel_ddi_wait_for_fec_status(struct intel_encoder *encoder, in intel_ddi_wait_for_fec_status() argument
2379 struct intel_display *display = to_intel_display(encoder); in intel_ddi_wait_for_fec_status()
2380 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_ddi_wait_for_fec_status()
2387 ret = intel_de_wait_for_set_ms(display, dp_tp_status_reg(encoder, crtc_state), in intel_ddi_wait_for_fec_status()
2390 ret = intel_de_wait_for_clear_ms(display, dp_tp_status_reg(encoder, crtc_state), in intel_ddi_wait_for_fec_status()
2412 static void intel_ddi_enable_fec(struct intel_encoder *encoder, in intel_ddi_enable_fec() argument
2415 struct intel_display *display = to_intel_display(encoder); in intel_ddi_enable_fec()
2422 intel_de_rmw(display, dp_tp_ctl_reg(encoder, crtc_state), in intel_ddi_enable_fec()
2428 ret = intel_ddi_wait_for_fec_status(encoder, crtc_state, true); in intel_ddi_enable_fec()
2435 intel_de_rmw(display, dp_tp_ctl_reg(encoder, crtc_state), in intel_ddi_enable_fec()
2438 ret = intel_ddi_wait_for_fec_status(encoder, crtc_state, false); in intel_ddi_enable_fec()
2442 intel_de_rmw(display, dp_tp_ctl_reg(encoder, crtc_state), in intel_ddi_enable_fec()
2445 ret = intel_ddi_wait_for_fec_status(encoder, crtc_state, true); in intel_ddi_enable_fec()
2453 static void intel_ddi_disable_fec(struct intel_encoder *encoder, in intel_ddi_disable_fec() argument
2456 struct intel_display *display = to_intel_display(encoder); in intel_ddi_disable_fec()
2461 intel_de_rmw(display, dp_tp_ctl_reg(encoder, crtc_state), in intel_ddi_disable_fec()
2463 intel_de_posting_read(display, dp_tp_ctl_reg(encoder, crtc_state)); in intel_ddi_disable_fec()
2466 static void intel_ddi_power_up_lanes(struct intel_encoder *encoder, in intel_ddi_power_up_lanes() argument
2469 struct intel_display *display = to_intel_display(encoder); in intel_ddi_power_up_lanes()
2470 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_power_up_lanes()
2472 if (intel_encoder_is_combo(encoder)) { in intel_ddi_power_up_lanes()
2473 enum phy phy = intel_encoder_to_phy(encoder); in intel_ddi_power_up_lanes()
2495 static void intel_ddi_mso_get_config(struct intel_encoder *encoder, in intel_ddi_mso_get_config() argument
2558 mtl_ddi_enable_d2d(struct intel_encoder *encoder) in mtl_ddi_enable_d2d() argument
2560 struct intel_display *display = to_intel_display(encoder); in mtl_ddi_enable_d2d()
2561 enum port port = encoder->port; in mtl_ddi_enable_d2d()
2588 static void mtl_port_buf_ctl_program(struct intel_encoder *encoder, in mtl_port_buf_ctl_program() argument
2591 struct intel_display *display = to_intel_display(encoder); in mtl_port_buf_ctl_program()
2592 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in mtl_port_buf_ctl_program()
2593 enum port port = encoder->port; in mtl_port_buf_ctl_program()
2611 static void mtl_port_buf_ctl_io_selection(struct intel_encoder *encoder) in mtl_port_buf_ctl_io_selection() argument
2613 struct intel_display *display = to_intel_display(encoder); in mtl_port_buf_ctl_io_selection()
2614 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in mtl_port_buf_ctl_io_selection()
2619 intel_de_rmw(display, XELPDP_PORT_BUF_CTL1(display, encoder->port), in mtl_port_buf_ctl_io_selection()
2624 struct intel_encoder *encoder, in mtl_ddi_pre_enable_dp() argument
2628 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in mtl_ddi_pre_enable_dp()
2641 intel_ddi_init_dp_buf_reg(encoder, crtc_state); in mtl_ddi_pre_enable_dp()
2653 mtl_port_buf_ctl_io_selection(encoder); in mtl_ddi_pre_enable_dp()
2656 intel_ddi_enable_clock(encoder, crtc_state); in mtl_ddi_pre_enable_dp()
2662 intel_ddi_enable_transcoder_clock(encoder, crtc_state); in mtl_ddi_pre_enable_dp()
2669 intel_ddi_config_transcoder_func(encoder, crtc_state); in mtl_ddi_pre_enable_dp()
2724 intel_ddi_enable_fec(encoder, crtc_state); in mtl_ddi_pre_enable_dp()
2731 intel_dp_queue_modeset_retry_for_link(state, encoder, crtc_state); in mtl_ddi_pre_enable_dp()
2735 intel_dsc_dp_pps_write(encoder, crtc_state); in mtl_ddi_pre_enable_dp()
2739 struct intel_encoder *encoder, in tgl_ddi_pre_enable_dp() argument
2743 struct intel_display *display = to_intel_display(encoder); in tgl_ddi_pre_enable_dp()
2744 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in tgl_ddi_pre_enable_dp()
2745 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in tgl_ddi_pre_enable_dp()
2757 intel_ddi_init_dp_buf_reg(encoder, crtc_state); in tgl_ddi_pre_enable_dp()
2784 intel_ddi_enable_clock(encoder, crtc_state); in tgl_ddi_pre_enable_dp()
2810 intel_ddi_enable_transcoder_clock(encoder, crtc_state); in tgl_ddi_pre_enable_dp()
2816 intel_ddi_config_transcoder_func(encoder, crtc_state); in tgl_ddi_pre_enable_dp()
2827 encoder->set_signal_levels(encoder, crtc_state); in tgl_ddi_pre_enable_dp()
2833 intel_ddi_power_up_lanes(encoder, crtc_state); in tgl_ddi_pre_enable_dp()
2872 intel_ddi_enable_fec(encoder, crtc_state); in tgl_ddi_pre_enable_dp()
2878 intel_dp_queue_modeset_retry_for_link(state, encoder, crtc_state); in tgl_ddi_pre_enable_dp()
2882 intel_dsc_dp_pps_write(encoder, crtc_state); in tgl_ddi_pre_enable_dp()
2886 struct intel_encoder *encoder, in hsw_ddi_pre_enable_dp() argument
2890 struct intel_display *display = to_intel_display(encoder); in hsw_ddi_pre_enable_dp()
2891 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in hsw_ddi_pre_enable_dp()
2892 enum port port = encoder->port; in hsw_ddi_pre_enable_dp()
2893 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in hsw_ddi_pre_enable_dp()
2910 intel_ddi_init_dp_buf_reg(encoder, crtc_state); in hsw_ddi_pre_enable_dp()
2914 intel_ddi_enable_clock(encoder, crtc_state); in hsw_ddi_pre_enable_dp()
2925 hsw_prepare_dp_ddi_buffers(encoder, crtc_state); in hsw_ddi_pre_enable_dp()
2927 encoder->set_signal_levels(encoder, crtc_state); in hsw_ddi_pre_enable_dp()
2929 intel_ddi_power_up_lanes(encoder, crtc_state); in hsw_ddi_pre_enable_dp()
2944 intel_ddi_enable_fec(encoder, crtc_state); in hsw_ddi_pre_enable_dp()
2947 intel_ddi_enable_transcoder_clock(encoder, crtc_state); in hsw_ddi_pre_enable_dp()
2948 intel_dsc_dp_pps_write(encoder, crtc_state); in hsw_ddi_pre_enable_dp()
2953 struct intel_encoder *encoder, in intel_ddi_pre_enable_dp() argument
2957 struct intel_display *display = to_intel_display(encoder); in intel_ddi_pre_enable_dp()
2960 intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder), in intel_ddi_pre_enable_dp()
2964 intel_psr_panel_replay_enable_sink(enc_to_intel_dp(encoder)); in intel_ddi_pre_enable_dp()
2967 mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state); in intel_ddi_pre_enable_dp()
2969 tgl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state); in intel_ddi_pre_enable_dp()
2971 hsw_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state); in intel_ddi_pre_enable_dp()
2974 * from MST encoder pre_enable callback. in intel_ddi_pre_enable_dp()
2981 struct intel_encoder *encoder, in intel_ddi_pre_enable_hdmi() argument
2985 struct intel_display *display = to_intel_display(encoder); in intel_ddi_pre_enable_hdmi()
2986 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_pre_enable_hdmi()
2990 intel_ddi_enable_clock(encoder, crtc_state); in intel_ddi_pre_enable_hdmi()
2998 intel_ddi_enable_transcoder_clock(encoder, crtc_state); in intel_ddi_pre_enable_hdmi()
3000 dig_port->set_infoframes(encoder, in intel_ddi_pre_enable_hdmi()
3007 * encoder on its primary encoder.
3013 * - encoder will be the primary encoder (i.e. mst->primary)
3024 struct intel_encoder *encoder, in intel_ddi_pre_enable() argument
3037 intel_ddi_pre_enable_hdmi(state, encoder, crtc_state, in intel_ddi_pre_enable()
3040 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_pre_enable()
3042 intel_ddi_pre_enable_dp(state, encoder, crtc_state, in intel_ddi_pre_enable()
3048 dig_port->set_infoframes(encoder, in intel_ddi_pre_enable()
3055 mtl_ddi_disable_d2d(struct intel_encoder *encoder) in mtl_ddi_disable_d2d() argument
3057 struct intel_display *display = to_intel_display(encoder); in mtl_ddi_disable_d2d()
3058 enum port port = encoder->port; in mtl_ddi_disable_d2d()
3084 static void intel_ddi_buf_enable(struct intel_encoder *encoder, u32 buf_ctl) in intel_ddi_buf_enable() argument
3086 struct intel_display *display = to_intel_display(encoder); in intel_ddi_buf_enable()
3087 enum port port = encoder->port; in intel_ddi_buf_enable()
3092 intel_wait_ddi_buf_active(encoder); in intel_ddi_buf_enable()
3095 static void intel_ddi_buf_disable(struct intel_encoder *encoder, in intel_ddi_buf_disable() argument
3098 struct intel_display *display = to_intel_display(encoder); in intel_ddi_buf_disable()
3099 enum port port = encoder->port; in intel_ddi_buf_disable()
3106 mtl_ddi_disable_d2d(encoder); in intel_ddi_buf_disable()
3109 intel_de_rmw(display, dp_tp_ctl_reg(encoder, crtc_state), in intel_ddi_buf_disable()
3113 intel_ddi_disable_fec(encoder, crtc_state); in intel_ddi_buf_disable()
3118 intel_ddi_wait_for_fec_status(encoder, crtc_state, false); in intel_ddi_buf_disable()
3122 struct intel_encoder *encoder, in intel_ddi_post_disable_dp() argument
3126 struct intel_display *display = to_intel_display(encoder); in intel_ddi_post_disable_dp()
3127 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_post_disable_dp()
3134 intel_dp_set_infoframes(encoder, false, in intel_ddi_post_disable_dp()
3157 intel_ddi_buf_disable(encoder, old_crtc_state); in intel_ddi_post_disable_dp()
3181 intel_ddi_disable_clock(encoder); in intel_ddi_post_disable_dp()
3185 intel_de_rmw(display, XELPDP_PORT_BUF_CTL1(display, encoder->port), in intel_ddi_post_disable_dp()
3190 struct intel_encoder *encoder, in intel_ddi_post_disable_hdmi() argument
3194 struct intel_display *display = to_intel_display(encoder); in intel_ddi_post_disable_hdmi()
3195 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_post_disable_hdmi()
3199 dig_port->set_infoframes(encoder, false, in intel_ddi_post_disable_hdmi()
3205 intel_ddi_buf_disable(encoder, old_crtc_state); in intel_ddi_post_disable_hdmi()
3216 intel_ddi_disable_clock(encoder); in intel_ddi_post_disable_hdmi()
3222 struct intel_encoder *encoder, in intel_ddi_post_disable_hdmi_or_sst() argument
3226 struct intel_display *display = to_intel_display(encoder); in intel_ddi_post_disable_hdmi_or_sst()
3227 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_ddi_post_disable_hdmi_or_sst()
3245 intel_ddi_clear_act_sent(encoder, old_crtc_state); in intel_ddi_post_disable_hdmi_or_sst()
3250 intel_ddi_wait_for_act_sent(encoder, old_crtc_state); in intel_ddi_post_disable_hdmi_or_sst()
3273 * encoder on its primary encoder. See also the comment for
3277 struct intel_encoder *encoder, in intel_ddi_post_disable() argument
3282 intel_ddi_post_disable_hdmi_or_sst(state, encoder, old_crtc_state, in intel_ddi_post_disable()
3288 * - encoder will be the main encoder (ie. mst->primary) in intel_ddi_post_disable()
3299 intel_ddi_post_disable_hdmi(state, encoder, old_crtc_state, in intel_ddi_post_disable()
3302 intel_ddi_post_disable_dp(state, encoder, old_crtc_state, in intel_ddi_post_disable()
3308 * encoder on its primary encoder. See also the comment for
3312 struct intel_encoder *encoder, in intel_ddi_post_pll_disable() argument
3316 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_post_pll_disable()
3320 if (intel_encoder_is_tc(encoder)) in intel_ddi_post_pll_disable()
3325 struct intel_encoder *encoder, in trans_port_sync_stop_link_train() argument
3357 intel_dp_stop_link_train(enc_to_intel_dp(encoder), in trans_port_sync_stop_link_train()
3362 struct intel_encoder *encoder, in intel_ddi_enable_dp() argument
3366 struct intel_display *display = to_intel_display(encoder); in intel_ddi_enable_dp()
3367 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_ddi_enable_dp()
3368 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_enable_dp()
3369 enum port port = encoder->port; in intel_ddi_enable_dp()
3380 intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); in intel_ddi_enable_dp()
3382 trans_port_sync_stop_link_train(state, encoder, crtc_state); in intel_ddi_enable_dp()
3405 struct intel_encoder *encoder, in intel_ddi_enable_hdmi() argument
3409 struct intel_display *display = to_intel_display(encoder); in intel_ddi_enable_hdmi()
3410 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_enable_hdmi()
3412 enum port port = encoder->port; in intel_ddi_enable_hdmi()
3415 if (!intel_hdmi_handle_sink_scrambling(encoder, connector, in intel_ddi_enable_hdmi()
3423 hsw_prepare_hdmi_ddi_buffers(encoder, crtc_state); in intel_ddi_enable_hdmi()
3426 mtl_ddi_enable_d2d(encoder); in intel_ddi_enable_hdmi()
3428 encoder->set_signal_levels(encoder, crtc_state); in intel_ddi_enable_hdmi()
3465 intel_ddi_power_up_lanes(encoder, crtc_state); in intel_ddi_enable_hdmi()
3498 } else if (display->platform.alderlake_p && intel_encoder_is_tc(encoder)) { in intel_ddi_enable_hdmi()
3503 intel_ddi_buf_enable(encoder, buf_ctl); in intel_ddi_enable_hdmi()
3509 struct intel_encoder *encoder, in intel_ddi_enable() argument
3513 struct intel_display *display = to_intel_display(encoder); in intel_ddi_enable()
3529 intel_ddi_enable_transcoder_func(encoder, crtc_state); in intel_ddi_enable()
3535 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_ddi_enable()
3537 intel_ddi_clear_act_sent(encoder, crtc_state); in intel_ddi_enable()
3542 intel_ddi_wait_for_act_sent(encoder, crtc_state); in intel_ddi_enable()
3548 intel_ddi_wait_for_fec_status(encoder, crtc_state, true); in intel_ddi_enable()
3558 intel_ddi_enable_hdmi(state, encoder, crtc_state, conn_state); in intel_ddi_enable()
3560 intel_ddi_enable_dp(state, encoder, crtc_state, conn_state); in intel_ddi_enable()
3562 intel_hdcp_enable(state, encoder, crtc_state, conn_state); in intel_ddi_enable()
3567 struct intel_encoder *encoder, in intel_ddi_disable_dp() argument
3571 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_ddi_disable_dp()
3590 struct intel_encoder *encoder, in intel_ddi_disable_hdmi() argument
3594 struct intel_display *display = to_intel_display(encoder); in intel_ddi_disable_hdmi()
3597 if (!intel_hdmi_handle_sink_scrambling(encoder, connector, in intel_ddi_disable_hdmi()
3605 struct intel_encoder *encoder, in intel_ddi_disable() argument
3609 intel_tc_port_link_cancel_reset_work(enc_to_dig_port(encoder)); in intel_ddi_disable()
3614 intel_ddi_disable_hdmi(state, encoder, old_crtc_state, in intel_ddi_disable()
3617 intel_ddi_disable_dp(state, encoder, old_crtc_state, in intel_ddi_disable()
3622 struct intel_encoder *encoder, in intel_ddi_update_pipe_dp() argument
3628 intel_dp_set_infoframes(encoder, true, crtc_state, conn_state); in intel_ddi_update_pipe_dp()
3630 intel_backlight_update(state, encoder, crtc_state, conn_state); in intel_ddi_update_pipe_dp()
3634 static void intel_ddi_update_pipe_hdmi(struct intel_encoder *encoder, in intel_ddi_update_pipe_hdmi() argument
3638 intel_hdmi_fastset_infoframes(encoder, crtc_state, conn_state); in intel_ddi_update_pipe_hdmi()
3642 struct intel_encoder *encoder, in intel_ddi_update_pipe() argument
3648 !intel_encoder_is_mst(encoder)) in intel_ddi_update_pipe()
3649 intel_ddi_update_pipe_dp(state, encoder, crtc_state, in intel_ddi_update_pipe()
3653 intel_ddi_update_pipe_hdmi(encoder, crtc_state, in intel_ddi_update_pipe()
3656 intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state); in intel_ddi_update_pipe()
3660 struct intel_encoder *encoder, in intel_ddi_update_active_dpll() argument
3663 struct intel_display *display = to_intel_display(encoder); in intel_ddi_update_active_dpll()
3669 if (!intel_encoder_is_tc(encoder) || !display->dpll.mgr) in intel_ddi_update_active_dpll()
3674 intel_dpll_update_active(state, pipe_crtc, encoder); in intel_ddi_update_active_dpll()
3679 * encoder on its primary encoder. See also the comment for
3684 struct intel_encoder *encoder, in intel_ddi_pre_pll_enable() argument
3688 struct intel_display *display = to_intel_display(encoder); in intel_ddi_pre_pll_enable()
3689 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_pre_pll_enable()
3690 bool is_tc_port = intel_encoder_is_tc(encoder); in intel_ddi_pre_pll_enable()
3696 intel_ddi_update_active_dpll(state, encoder, crtc); in intel_ddi_pre_pll_enable()
3708 bxt_dpio_phy_set_lane_optim_mask(encoder, in intel_ddi_pre_pll_enable()
3720 static void adlp_tbt_to_dp_alt_switch_wa(struct intel_encoder *encoder) in adlp_tbt_to_dp_alt_switch_wa() argument
3722 struct intel_display *display = to_intel_display(encoder); in adlp_tbt_to_dp_alt_switch_wa()
3723 enum tc_port tc_port = intel_encoder_to_tc(encoder); in adlp_tbt_to_dp_alt_switch_wa()
3736 struct intel_encoder *encoder = &dig_port->base; in mtl_ddi_prepare_link_retrain() local
3743 dp_tp_ctl = intel_de_read(display, dp_tp_ctl_reg(encoder, crtc_state)); in mtl_ddi_prepare_link_retrain()
3757 intel_de_write(display, dp_tp_ctl_reg(encoder, crtc_state), dp_tp_ctl); in mtl_ddi_prepare_link_retrain()
3758 intel_de_posting_read(display, dp_tp_ctl_reg(encoder, crtc_state)); in mtl_ddi_prepare_link_retrain()
3761 mtl_ddi_enable_d2d(encoder); in mtl_ddi_prepare_link_retrain()
3764 encoder->set_signal_levels(encoder, crtc_state); in mtl_ddi_prepare_link_retrain()
3767 mtl_port_buf_ctl_program(encoder, crtc_state); in mtl_ddi_prepare_link_retrain()
3773 intel_ddi_buf_enable(encoder, intel_dp->DP); in mtl_ddi_prepare_link_retrain()
3786 intel_lnl_mac_transmit_lfps(encoder, crtc_state); in mtl_ddi_prepare_link_retrain()
3794 struct intel_encoder *encoder = &dig_port->base; in intel_ddi_prepare_link_retrain() local
3797 dp_tp_ctl = intel_de_read(display, dp_tp_ctl_reg(encoder, crtc_state)); in intel_ddi_prepare_link_retrain()
3810 intel_de_write(display, dp_tp_ctl_reg(encoder, crtc_state), dp_tp_ctl); in intel_ddi_prepare_link_retrain()
3811 intel_de_posting_read(display, dp_tp_ctl_reg(encoder, crtc_state)); in intel_ddi_prepare_link_retrain()
3815 adlp_tbt_to_dp_alt_switch_wa(encoder); in intel_ddi_prepare_link_retrain()
3817 intel_ddi_buf_enable(encoder, intel_dp->DP); in intel_ddi_prepare_link_retrain()
3826 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in intel_ddi_set_link_train() local
3829 temp = intel_de_read(display, dp_tp_ctl_reg(encoder, crtc_state)); in intel_ddi_set_link_train()
3850 intel_de_write(display, dp_tp_ctl_reg(encoder, crtc_state), temp); in intel_ddi_set_link_train()
3857 struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base; in intel_ddi_set_idle_link_train() local
3858 enum port port = encoder->port; in intel_ddi_set_idle_link_train()
3860 intel_de_rmw(display, dp_tp_ctl_reg(encoder, crtc_state), in intel_ddi_set_idle_link_train()
3874 dp_tp_status_reg(encoder, crtc_state), in intel_ddi_set_idle_link_train()
3993 static void intel_ddi_read_func_ctl_dvi(struct intel_encoder *encoder, in intel_ddi_read_func_ctl_dvi() argument
3997 struct intel_display *display = to_intel_display(encoder); in intel_ddi_read_func_ctl_dvi()
4007 static void intel_ddi_read_func_ctl_hdmi(struct intel_encoder *encoder, in intel_ddi_read_func_ctl_hdmi() argument
4014 intel_hdmi_infoframes_enabled(encoder, crtc_state); in intel_ddi_read_func_ctl_hdmi()
4024 intel_ddi_read_func_ctl_dvi(encoder, crtc_state, ddi_func_ctl); in intel_ddi_read_func_ctl_hdmi()
4027 static void intel_ddi_read_func_ctl_fdi(struct intel_encoder *encoder, in intel_ddi_read_func_ctl_fdi() argument
4031 struct intel_display *display = to_intel_display(encoder); in intel_ddi_read_func_ctl_fdi()
4035 intel_de_read(display, dp_tp_ctl_reg(encoder, crtc_state)) & in intel_ddi_read_func_ctl_fdi()
4039 static void intel_ddi_read_func_ctl_dp_sst(struct intel_encoder *encoder, in intel_ddi_read_func_ctl_dp_sst() argument
4043 struct intel_display *display = to_intel_display(encoder); in intel_ddi_read_func_ctl_dp_sst()
4045 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_read_func_ctl_dp_sst()
4048 if (encoder->type == INTEL_OUTPUT_EDP) in intel_ddi_read_func_ctl_dp_sst()
4064 intel_de_read(display, dp_tp_ctl_reg(encoder, crtc_state)) & in intel_ddi_read_func_ctl_dp_sst()
4070 dp_tp_ctl_reg(encoder, crtc_state)) & DP_TP_CTL_FEC_ENABLE; in intel_ddi_read_func_ctl_dp_sst()
4074 intel_lspcon_infoframes_enabled(encoder, crtc_state); in intel_ddi_read_func_ctl_dp_sst()
4077 intel_hdmi_infoframes_enabled(encoder, crtc_state); in intel_ddi_read_func_ctl_dp_sst()
4080 static void intel_ddi_read_func_ctl_dp_mst(struct intel_encoder *encoder, in intel_ddi_read_func_ctl_dp_mst() argument
4084 struct intel_display *display = to_intel_display(encoder); in intel_ddi_read_func_ctl_dp_mst()
4101 dp_tp_ctl_reg(encoder, crtc_state)) & DP_TP_CTL_FEC_ENABLE; in intel_ddi_read_func_ctl_dp_mst()
4104 intel_hdmi_infoframes_enabled(encoder, crtc_state); in intel_ddi_read_func_ctl_dp_mst()
4107 static void intel_ddi_read_func_ctl(struct intel_encoder *encoder, in intel_ddi_read_func_ctl() argument
4110 struct intel_display *display = to_intel_display(encoder); in intel_ddi_read_func_ctl()
4146 intel_ddi_read_func_ctl_hdmi(encoder, pipe_config, ddi_func_ctl); in intel_ddi_read_func_ctl()
4148 intel_ddi_read_func_ctl_dvi(encoder, pipe_config, ddi_func_ctl); in intel_ddi_read_func_ctl()
4150 intel_ddi_read_func_ctl_fdi(encoder, pipe_config, ddi_func_ctl); in intel_ddi_read_func_ctl()
4152 intel_ddi_read_func_ctl_dp_sst(encoder, pipe_config, ddi_func_ctl); in intel_ddi_read_func_ctl()
4154 intel_ddi_read_func_ctl_dp_mst(encoder, pipe_config, ddi_func_ctl); in intel_ddi_read_func_ctl()
4156 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_ddi_read_func_ctl()
4160 * encoder's ->get_config(). in intel_ddi_read_func_ctl()
4163 intel_ddi_read_func_ctl_dp_mst(encoder, pipe_config, ddi_func_ctl); in intel_ddi_read_func_ctl()
4165 intel_ddi_read_func_ctl_dp_sst(encoder, pipe_config, ddi_func_ctl); in intel_ddi_read_func_ctl()
4171 * primary encoder, via the platform specific hooks here. See also the comment
4174 static void intel_ddi_get_config(struct intel_encoder *encoder, in intel_ddi_get_config() argument
4177 struct intel_display *display = to_intel_display(encoder); in intel_ddi_get_config()
4184 intel_ddi_read_func_ctl(encoder, pipe_config); in intel_ddi_get_config()
4186 intel_ddi_mso_get_config(encoder, pipe_config); in intel_ddi_get_config()
4191 if (encoder->type == INTEL_OUTPUT_EDP) in intel_ddi_get_config()
4192 intel_edp_fixup_vbt_bpp(encoder, pipe_config->pipe_bpp); in intel_ddi_get_config()
4198 bxt_dpio_phy_get_lane_lat_optim_mask(encoder); in intel_ddi_get_config()
4202 intel_hdmi_read_gcp_infoframe(encoder, pipe_config); in intel_ddi_get_config()
4204 intel_read_infoframe(encoder, pipe_config, in intel_ddi_get_config()
4207 intel_read_infoframe(encoder, pipe_config, in intel_ddi_get_config()
4210 intel_read_infoframe(encoder, pipe_config, in intel_ddi_get_config()
4213 intel_read_infoframe(encoder, pipe_config, in intel_ddi_get_config()
4220 intel_psr_get_config(encoder, pipe_config); in intel_ddi_get_config()
4222 intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA); in intel_ddi_get_config()
4223 intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC); in intel_ddi_get_config()
4224 intel_read_dp_sdp(encoder, pipe_config, DP_SDP_ADAPTIVE_SYNC); in intel_ddi_get_config()
4226 intel_audio_codec_get_config(encoder, pipe_config); in intel_ddi_get_config()
4229 void intel_ddi_get_clock(struct intel_encoder *encoder, in intel_ddi_get_clock() argument
4233 struct intel_display *display = to_intel_display(encoder); in intel_ddi_get_clock()
4256 static void mtl_ddi_cx0_get_config(struct intel_encoder *encoder, in mtl_ddi_cx0_get_config() argument
4261 struct intel_display *display = to_intel_display(encoder); in mtl_ddi_cx0_get_config()
4279 crtc_state->port_clock = intel_mtl_tbt_calc_port_clock(encoder); in mtl_ddi_cx0_get_config()
4284 intel_ddi_get_config(encoder, crtc_state); in mtl_ddi_cx0_get_config()
4293 static void mtl_ddi_non_tc_phy_get_config(struct intel_encoder *encoder, in mtl_ddi_non_tc_phy_get_config() argument
4296 struct intel_display *display = to_intel_display(encoder); in mtl_ddi_non_tc_phy_get_config()
4298 mtl_ddi_cx0_get_config(encoder, crtc_state, ICL_PORT_DPLL_DEFAULT, in mtl_ddi_non_tc_phy_get_config()
4299 mtl_port_to_pll_id(display, encoder->port)); in mtl_ddi_non_tc_phy_get_config()
4302 static void mtl_ddi_tc_phy_get_config(struct intel_encoder *encoder, in mtl_ddi_tc_phy_get_config() argument
4305 struct intel_display *display = to_intel_display(encoder); in mtl_ddi_tc_phy_get_config()
4307 if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder))) in mtl_ddi_tc_phy_get_config()
4308 mtl_ddi_cx0_get_config(encoder, crtc_state, ICL_PORT_DPLL_DEFAULT, in mtl_ddi_tc_phy_get_config()
4311 mtl_ddi_cx0_get_config(encoder, crtc_state, ICL_PORT_DPLL_MG_PHY, in mtl_ddi_tc_phy_get_config()
4312 mtl_port_to_pll_id(display, encoder->port)); in mtl_ddi_tc_phy_get_config()
4315 static void dg2_ddi_get_config(struct intel_encoder *encoder, in dg2_ddi_get_config() argument
4318 intel_mpllb_readout_hw_state(encoder, &crtc_state->dpll_hw_state.mpllb); in dg2_ddi_get_config()
4319 crtc_state->port_clock = intel_mpllb_calc_port_clock(encoder, &crtc_state->dpll_hw_state.mpllb); in dg2_ddi_get_config()
4321 intel_ddi_get_config(encoder, crtc_state); in dg2_ddi_get_config()
4324 static void adls_ddi_get_config(struct intel_encoder *encoder, in adls_ddi_get_config() argument
4327 intel_ddi_get_clock(encoder, crtc_state, adls_ddi_get_pll(encoder)); in adls_ddi_get_config()
4328 intel_ddi_get_config(encoder, crtc_state); in adls_ddi_get_config()
4331 static void rkl_ddi_get_config(struct intel_encoder *encoder, in rkl_ddi_get_config() argument
4334 intel_ddi_get_clock(encoder, crtc_state, rkl_ddi_get_pll(encoder)); in rkl_ddi_get_config()
4335 intel_ddi_get_config(encoder, crtc_state); in rkl_ddi_get_config()
4338 static void dg1_ddi_get_config(struct intel_encoder *encoder, in dg1_ddi_get_config() argument
4341 intel_ddi_get_clock(encoder, crtc_state, dg1_ddi_get_pll(encoder)); in dg1_ddi_get_config()
4342 intel_ddi_get_config(encoder, crtc_state); in dg1_ddi_get_config()
4345 static void icl_ddi_combo_get_config(struct intel_encoder *encoder, in icl_ddi_combo_get_config() argument
4348 intel_ddi_get_clock(encoder, crtc_state, icl_ddi_combo_get_pll(encoder)); in icl_ddi_combo_get_config()
4349 intel_ddi_get_config(encoder, crtc_state); in icl_ddi_combo_get_config()
4353 icl_ddi_tc_port_pll_type(struct intel_encoder *encoder, in icl_ddi_tc_port_pll_type() argument
4356 struct intel_display *display = to_intel_display(encoder); in icl_ddi_tc_port_pll_type()
4369 intel_ddi_port_pll_type(struct intel_encoder *encoder, in intel_ddi_port_pll_type() argument
4372 if (!encoder->port_pll_type) in intel_ddi_port_pll_type()
4375 return encoder->port_pll_type(encoder, crtc_state); in intel_ddi_port_pll_type()
4378 static void icl_ddi_tc_get_clock(struct intel_encoder *encoder, in icl_ddi_tc_get_clock() argument
4382 struct intel_display *display = to_intel_display(encoder); in icl_ddi_tc_get_clock()
4404 crtc_state->port_clock = icl_calc_tbt_pll_link(display, encoder->port); in icl_ddi_tc_get_clock()
4410 static void icl_ddi_tc_get_config(struct intel_encoder *encoder, in icl_ddi_tc_get_config() argument
4413 icl_ddi_tc_get_clock(encoder, crtc_state, icl_ddi_tc_get_pll(encoder)); in icl_ddi_tc_get_config()
4414 intel_ddi_get_config(encoder, crtc_state); in icl_ddi_tc_get_config()
4417 static void bxt_ddi_get_config(struct intel_encoder *encoder, in bxt_ddi_get_config() argument
4420 intel_ddi_get_clock(encoder, crtc_state, bxt_ddi_get_pll(encoder)); in bxt_ddi_get_config()
4421 intel_ddi_get_config(encoder, crtc_state); in bxt_ddi_get_config()
4424 static void skl_ddi_get_config(struct intel_encoder *encoder, in skl_ddi_get_config() argument
4427 intel_ddi_get_clock(encoder, crtc_state, skl_ddi_get_pll(encoder)); in skl_ddi_get_config()
4428 intel_ddi_get_config(encoder, crtc_state); in skl_ddi_get_config()
4431 void hsw_ddi_get_config(struct intel_encoder *encoder, in hsw_ddi_get_config() argument
4434 intel_ddi_get_clock(encoder, crtc_state, hsw_ddi_get_pll(encoder)); in hsw_ddi_get_config()
4435 intel_ddi_get_config(encoder, crtc_state); in hsw_ddi_get_config()
4438 static void intel_ddi_sync_state(struct intel_encoder *encoder, in intel_ddi_sync_state() argument
4441 if (intel_encoder_is_tc(encoder)) in intel_ddi_sync_state()
4442 intel_tc_port_sanitize_mode(enc_to_dig_port(encoder), in intel_ddi_sync_state()
4446 (!crtc_state && intel_encoder_is_dp(encoder))) in intel_ddi_sync_state()
4447 intel_dp_sync_state(encoder, crtc_state); in intel_ddi_sync_state()
4450 static bool intel_ddi_initial_fastset_check(struct intel_encoder *encoder, in intel_ddi_initial_fastset_check() argument
4453 struct intel_display *display = to_intel_display(encoder); in intel_ddi_initial_fastset_check()
4456 if (intel_encoder_is_tc(encoder)) { in intel_ddi_initial_fastset_check()
4457 drm_dbg_kms(display->drm, "[ENCODER:%d:%s] Forcing full modeset to compute TC port DPLLs\n", in intel_ddi_initial_fastset_check()
4458 encoder->base.base.id, encoder->base.name); in intel_ddi_initial_fastset_check()
4464 !intel_dp_initial_fastset_check(encoder, crtc_state)) in intel_ddi_initial_fastset_check()
4471 intel_ddi_compute_output_type(struct intel_encoder *encoder, in intel_ddi_compute_output_type() argument
4488 static int intel_ddi_compute_config(struct intel_encoder *encoder, in intel_ddi_compute_config() argument
4492 struct intel_display *display = to_intel_display(encoder); in intel_ddi_compute_config()
4494 enum port port = encoder->port; in intel_ddi_compute_config()
4502 intel_hdmi_compute_has_hdmi_sink(encoder, pipe_config, conn_state); in intel_ddi_compute_config()
4504 ret = intel_hdmi_compute_config(encoder, pipe_config, conn_state); in intel_ddi_compute_config()
4506 ret = intel_dp_compute_config(encoder, pipe_config, conn_state); in intel_ddi_compute_config()
4611 static int intel_ddi_compute_config_late(struct intel_encoder *encoder, in intel_ddi_compute_config_late() argument
4615 struct intel_display *display = to_intel_display(encoder); in intel_ddi_compute_config_late()
4621 ret = intel_dp_compute_config_late(encoder, crtc_state, conn_state); in intel_ddi_compute_config_late()
4626 drm_dbg_kms(display->drm, "[ENCODER:%d:%s] [CRTC:%d:%s]\n", in intel_ddi_compute_config_late()
4627 encoder->base.base.id, encoder->base.name, in intel_ddi_compute_config_late()
4652 static void intel_ddi_encoder_destroy(struct drm_encoder *encoder) in intel_ddi_encoder_destroy() argument
4654 struct intel_display *display = to_intel_display(encoder->dev); in intel_ddi_encoder_destroy()
4655 struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder)); in intel_ddi_encoder_destroy()
4657 intel_dp_encoder_flush_work(encoder); in intel_ddi_encoder_destroy()
4662 drm_encoder_cleanup(encoder); in intel_ddi_encoder_destroy()
4667 static void intel_ddi_encoder_reset(struct drm_encoder *encoder) in intel_ddi_encoder_reset() argument
4669 struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder)); in intel_ddi_encoder_reset()
4670 struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder)); in intel_ddi_encoder_reset()
4683 struct intel_encoder *encoder = to_intel_encoder(_encoder); in intel_ddi_encoder_late_register() local
4685 intel_tc_port_link_reset(enc_to_dig_port(encoder)); in intel_ddi_encoder_late_register()
4746 static int intel_hdmi_reset_link(struct intel_encoder *encoder, in intel_hdmi_reset_link() argument
4749 struct intel_display *display = to_intel_display(encoder); in intel_hdmi_reset_link()
4750 struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder); in intel_hdmi_reset_link()
4818 static void intel_ddi_link_check(struct intel_encoder *encoder) in intel_ddi_link_check() argument
4820 struct intel_display *display = to_intel_display(encoder); in intel_ddi_link_check()
4821 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_link_check()
4826 intel_dp_link_check(encoder); in intel_ddi_link_check()
4830 intel_ddi_hotplug(struct intel_encoder *encoder, in intel_ddi_hotplug() argument
4833 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_ddi_hotplug()
4835 bool is_tc = intel_encoder_is_tc(encoder); in intel_ddi_hotplug()
4843 state = intel_encoder_hotplug(encoder, connector); in intel_ddi_hotplug()
4848 ret = intel_hdmi_reset_link(encoder, &ctx); in intel_ddi_hotplug()
4849 drm_WARN_ON(encoder->base.dev, ret); in intel_ddi_hotplug()
4885 static bool lpt_digital_port_connected(struct intel_encoder *encoder) in lpt_digital_port_connected() argument
4887 struct intel_display *display = to_intel_display(encoder); in lpt_digital_port_connected()
4888 u32 bit = display->hotplug.pch_hpd[encoder->hpd_pin]; in lpt_digital_port_connected()
4893 static bool hsw_digital_port_connected(struct intel_encoder *encoder) in hsw_digital_port_connected() argument
4895 struct intel_display *display = to_intel_display(encoder); in hsw_digital_port_connected()
4896 u32 bit = display->hotplug.hpd[encoder->hpd_pin]; in hsw_digital_port_connected()
4901 static bool bdw_digital_port_connected(struct intel_encoder *encoder) in bdw_digital_port_connected() argument
4903 struct intel_display *display = to_intel_display(encoder); in bdw_digital_port_connected()
4904 u32 bit = display->hotplug.hpd[encoder->hpd_pin]; in bdw_digital_port_connected()
5059 static void intel_ddi_encoder_suspend(struct intel_encoder *encoder) in intel_ddi_encoder_suspend() argument
5061 intel_dp_encoder_suspend(encoder); in intel_ddi_encoder_suspend()
5064 static void intel_ddi_tc_encoder_suspend_complete(struct intel_encoder *encoder) in intel_ddi_tc_encoder_suspend_complete() argument
5066 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_ddi_tc_encoder_suspend_complete()
5073 intel_encoder_link_check_flush_work(encoder); in intel_ddi_tc_encoder_suspend_complete()
5077 static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder) in intel_ddi_encoder_shutdown() argument
5079 if (intel_encoder_is_dp(encoder)) in intel_ddi_encoder_shutdown()
5080 intel_dp_encoder_shutdown(encoder); in intel_ddi_encoder_shutdown()
5081 if (intel_encoder_is_hdmi(encoder)) in intel_ddi_encoder_shutdown()
5082 intel_hdmi_encoder_shutdown(encoder); in intel_ddi_encoder_shutdown()
5085 static void intel_ddi_tc_encoder_shutdown_complete(struct intel_encoder *encoder) in intel_ddi_tc_encoder_shutdown_complete() argument
5087 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); in intel_ddi_tc_encoder_shutdown_complete()
5119 static bool need_aux_ch(struct intel_encoder *encoder, bool init_dp) in need_aux_ch() argument
5121 return init_dp || intel_encoder_is_tc(encoder); in need_aux_ch()
5133 struct intel_encoder *encoder; in port_in_use() local
5135 for_each_intel_encoder(display->drm, encoder) { in port_in_use()
5137 if (encoder->port == port) in port_in_use()
5181 struct intel_encoder *encoder; in intel_ddi_init() local
5264 encoder = &dig_port->base; in intel_ddi_init()
5265 encoder->devdata = devdata; in intel_ddi_init()
5267 drm_encoder_init(display->drm, &encoder->base, &intel_ddi_funcs, in intel_ddi_init()
5271 intel_encoder_link_check_init(encoder, intel_ddi_link_check); in intel_ddi_init()
5273 encoder->hotplug = intel_ddi_hotplug; in intel_ddi_init()
5274 encoder->compute_output_type = intel_ddi_compute_output_type; in intel_ddi_init()
5275 encoder->compute_config = intel_ddi_compute_config; in intel_ddi_init()
5276 encoder->compute_config_late = intel_ddi_compute_config_late; in intel_ddi_init()
5277 encoder->enable = intel_ddi_enable; in intel_ddi_init()
5278 encoder->pre_pll_enable = intel_ddi_pre_pll_enable; in intel_ddi_init()
5279 encoder->pre_enable = intel_ddi_pre_enable; in intel_ddi_init()
5280 encoder->disable = intel_ddi_disable; in intel_ddi_init()
5281 encoder->post_pll_disable = intel_ddi_post_pll_disable; in intel_ddi_init()
5282 encoder->post_disable = intel_ddi_post_disable; in intel_ddi_init()
5283 encoder->update_pipe = intel_ddi_update_pipe; in intel_ddi_init()
5284 encoder->audio_enable = intel_audio_codec_enable; in intel_ddi_init()
5285 encoder->audio_disable = intel_audio_codec_disable; in intel_ddi_init()
5286 encoder->get_hw_state = intel_ddi_get_hw_state; in intel_ddi_init()
5287 encoder->sync_state = intel_ddi_sync_state; in intel_ddi_init()
5288 encoder->initial_fastset_check = intel_ddi_initial_fastset_check; in intel_ddi_init()
5289 encoder->suspend = intel_ddi_encoder_suspend; in intel_ddi_init()
5290 encoder->shutdown = intel_ddi_encoder_shutdown; in intel_ddi_init()
5291 encoder->get_power_domains = intel_ddi_get_power_domains; in intel_ddi_init()
5293 encoder->type = INTEL_OUTPUT_DDI; in intel_ddi_init()
5294 encoder->power_domain = intel_display_power_ddi_lanes_domain(display, port); in intel_ddi_init()
5295 encoder->port = port; in intel_ddi_init()
5296 encoder->cloneable = 0; in intel_ddi_init()
5297 encoder->pipe_mask = ~0; in intel_ddi_init()
5300 encoder->enable_clock = intel_mtl_pll_enable_clock; in intel_ddi_init()
5301 encoder->disable_clock = intel_mtl_pll_disable_clock; in intel_ddi_init()
5302 encoder->port_pll_type = icl_ddi_tc_port_pll_type; in intel_ddi_init()
5303 if (intel_encoder_is_tc(encoder)) in intel_ddi_init()
5304 encoder->get_config = mtl_ddi_tc_phy_get_config; in intel_ddi_init()
5306 encoder->get_config = mtl_ddi_non_tc_phy_get_config; in intel_ddi_init()
5308 encoder->enable_clock = intel_mtl_pll_enable_clock; in intel_ddi_init()
5309 encoder->disable_clock = intel_mtl_pll_disable_clock; in intel_ddi_init()
5310 encoder->port_pll_type = icl_ddi_tc_port_pll_type; in intel_ddi_init()
5311 if (intel_encoder_is_tc(encoder)) in intel_ddi_init()
5312 encoder->get_config = mtl_ddi_tc_phy_get_config; in intel_ddi_init()
5314 encoder->get_config = mtl_ddi_non_tc_phy_get_config; in intel_ddi_init()
5316 encoder->enable_clock = intel_mpllb_enable; in intel_ddi_init()
5317 encoder->disable_clock = intel_mpllb_disable; in intel_ddi_init()
5318 encoder->get_config = dg2_ddi_get_config; in intel_ddi_init()
5320 encoder->enable_clock = adls_ddi_enable_clock; in intel_ddi_init()
5321 encoder->disable_clock = adls_ddi_disable_clock; in intel_ddi_init()
5322 encoder->is_clock_enabled = adls_ddi_is_clock_enabled; in intel_ddi_init()
5323 encoder->get_config = adls_ddi_get_config; in intel_ddi_init()
5325 encoder->enable_clock = rkl_ddi_enable_clock; in intel_ddi_init()
5326 encoder->disable_clock = rkl_ddi_disable_clock; in intel_ddi_init()
5327 encoder->is_clock_enabled = rkl_ddi_is_clock_enabled; in intel_ddi_init()
5328 encoder->get_config = rkl_ddi_get_config; in intel_ddi_init()
5330 encoder->enable_clock = dg1_ddi_enable_clock; in intel_ddi_init()
5331 encoder->disable_clock = dg1_ddi_disable_clock; in intel_ddi_init()
5332 encoder->is_clock_enabled = dg1_ddi_is_clock_enabled; in intel_ddi_init()
5333 encoder->get_config = dg1_ddi_get_config; in intel_ddi_init()
5336 encoder->enable_clock = jsl_ddi_tc_enable_clock; in intel_ddi_init()
5337 encoder->disable_clock = jsl_ddi_tc_disable_clock; in intel_ddi_init()
5338 encoder->is_clock_enabled = jsl_ddi_tc_is_clock_enabled; in intel_ddi_init()
5339 encoder->port_pll_type = icl_ddi_tc_port_pll_type; in intel_ddi_init()
5340 encoder->get_config = icl_ddi_combo_get_config; in intel_ddi_init()
5342 encoder->enable_clock = icl_ddi_combo_enable_clock; in intel_ddi_init()
5343 encoder->disable_clock = icl_ddi_combo_disable_clock; in intel_ddi_init()
5344 encoder->is_clock_enabled = icl_ddi_combo_is_clock_enabled; in intel_ddi_init()
5345 encoder->get_config = icl_ddi_combo_get_config; in intel_ddi_init()
5349 encoder->enable_clock = icl_ddi_tc_enable_clock; in intel_ddi_init()
5350 encoder->disable_clock = icl_ddi_tc_disable_clock; in intel_ddi_init()
5351 encoder->is_clock_enabled = icl_ddi_tc_is_clock_enabled; in intel_ddi_init()
5352 encoder->port_pll_type = icl_ddi_tc_port_pll_type; in intel_ddi_init()
5353 encoder->get_config = icl_ddi_tc_get_config; in intel_ddi_init()
5355 encoder->enable_clock = icl_ddi_combo_enable_clock; in intel_ddi_init()
5356 encoder->disable_clock = icl_ddi_combo_disable_clock; in intel_ddi_init()
5357 encoder->is_clock_enabled = icl_ddi_combo_is_clock_enabled; in intel_ddi_init()
5358 encoder->get_config = icl_ddi_combo_get_config; in intel_ddi_init()
5362 encoder->get_config = bxt_ddi_get_config; in intel_ddi_init()
5364 encoder->enable_clock = skl_ddi_enable_clock; in intel_ddi_init()
5365 encoder->disable_clock = skl_ddi_disable_clock; in intel_ddi_init()
5366 encoder->is_clock_enabled = skl_ddi_is_clock_enabled; in intel_ddi_init()
5367 encoder->get_config = skl_ddi_get_config; in intel_ddi_init()
5369 encoder->enable_clock = hsw_ddi_enable_clock; in intel_ddi_init()
5370 encoder->disable_clock = hsw_ddi_disable_clock; in intel_ddi_init()
5371 encoder->is_clock_enabled = hsw_ddi_is_clock_enabled; in intel_ddi_init()
5372 encoder->get_config = hsw_ddi_get_config; in intel_ddi_init()
5376 encoder->set_signal_levels = intel_lt_phy_set_signal_levels; in intel_ddi_init()
5378 encoder->set_signal_levels = intel_cx0_phy_set_signal_levels; in intel_ddi_init()
5380 encoder->set_signal_levels = intel_snps_phy_set_signal_levels; in intel_ddi_init()
5382 if (intel_encoder_is_combo(encoder)) in intel_ddi_init()
5383 encoder->set_signal_levels = icl_combo_phy_set_signal_levels; in intel_ddi_init()
5385 encoder->set_signal_levels = tgl_dkl_phy_set_signal_levels; in intel_ddi_init()
5387 if (intel_encoder_is_combo(encoder)) in intel_ddi_init()
5388 encoder->set_signal_levels = icl_combo_phy_set_signal_levels; in intel_ddi_init()
5390 encoder->set_signal_levels = icl_mg_phy_set_signal_levels; in intel_ddi_init()
5392 encoder->set_signal_levels = bxt_dpio_phy_set_signal_levels; in intel_ddi_init()
5394 encoder->set_signal_levels = hsw_set_signal_levels; in intel_ddi_init()
5397 intel_ddi_buf_trans_init(encoder); in intel_ddi_init()
5400 encoder->hpd_pin = xelpd_hpd_pin(display, port); in intel_ddi_init()
5402 encoder->hpd_pin = dg1_hpd_pin(display, port); in intel_ddi_init()
5404 encoder->hpd_pin = rkl_hpd_pin(display, port); in intel_ddi_init()
5406 encoder->hpd_pin = tgl_hpd_pin(display, port); in intel_ddi_init()
5408 encoder->hpd_pin = ehl_hpd_pin(display, port); in intel_ddi_init()
5410 encoder->hpd_pin = icl_hpd_pin(display, port); in intel_ddi_init()
5412 encoder->hpd_pin = skl_hpd_pin(display, port); in intel_ddi_init()
5414 encoder->hpd_pin = intel_hpd_pin_default(port); in intel_ddi_init()
5425 if (need_aux_ch(encoder, init_dp)) { in intel_ddi_init()
5426 dig_port->aux_ch = intel_dp_aux_ch(encoder); in intel_ddi_init()
5442 if (intel_encoder_is_tc(encoder)) { in intel_ddi_init()
5457 encoder->suspend_complete = intel_ddi_tc_encoder_suspend_complete; in intel_ddi_init()
5458 encoder->shutdown_complete = intel_ddi_tc_encoder_shutdown_complete; in intel_ddi_init()
5471 if (intel_encoder_is_tc(encoder)) in intel_ddi_init()
5500 encoder->pipe_mask = intel_ddi_splitter_pipe_mask(display); in intel_ddi_init()
5504 * In theory we don't need the encoder->type check, in intel_ddi_init()
5507 if (encoder->type != INTEL_OUTPUT_EDP && init_hdmi) { in intel_ddi_init()
5518 if (intel_encoder_is_tc(encoder)) in intel_ddi_init()
5521 drm_encoder_cleanup(&encoder->base); in intel_ddi_init()