Lines Matching refs:crtc
38 static void assert_vblank_disabled(struct drm_crtc *crtc)
40 struct intel_display *display = to_intel_display(crtc->dev);
42 if (INTEL_DISPLAY_STATE_WARN(display, drm_crtc_vblank_get(crtc) == 0,
44 crtc->base.id, crtc->name))
45 drm_crtc_vblank_put(crtc);
56 struct intel_crtc *crtc;
58 for_each_intel_crtc(display->drm, crtc) {
59 if (crtc->pipe == pipe)
60 return crtc;
66 void intel_crtc_wait_for_next_vblank(struct intel_crtc *crtc)
68 drm_crtc_wait_one_vblank(&crtc->base);
74 struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
76 if (crtc->active)
77 intel_crtc_wait_for_next_vblank(crtc);
80 u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc)
82 struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(&crtc->base);
84 if (!crtc->active)
88 return (u32)drm_crtc_accurate_vblank_count(&crtc->base);
90 return crtc->base.funcs->get_vblank_counter(&crtc->base);
125 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
127 crtc->vblank_psr_notify = intel_psr_needs_vblank_notification(crtc_state);
129 assert_vblank_disabled(&crtc->base);
130 drm_crtc_set_max_vblank_count(&crtc->base,
132 drm_crtc_vblank_on(&crtc->base);
139 trace_intel_pipe_enable(crtc);
145 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
152 trace_intel_pipe_disable(crtc);
154 drm_crtc_vblank_off(&crtc->base);
155 assert_vblank_disabled(&crtc->base);
157 crtc->vblank_psr_notify = false;
162 struct intel_crtc_state *intel_crtc_state_alloc(struct intel_crtc *crtc)
169 intel_crtc_state_reset(crtc_state, crtc);
175 struct intel_crtc *crtc)
179 __drm_atomic_helper_crtc_state_reset(&crtc_state->uapi, &crtc->base);
192 struct intel_crtc *crtc;
194 crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);
195 if (!crtc)
198 crtc_state = intel_crtc_state_alloc(crtc);
200 kfree(crtc);
204 crtc->base.state = &crtc_state->uapi;
205 crtc->config = crtc_state;
207 return crtc;
210 static void intel_crtc_free(struct intel_crtc *crtc)
212 intel_crtc_destroy_state(&crtc->base, crtc->base.state);
213 kfree(crtc);
218 struct intel_crtc *crtc = to_intel_crtc(_crtc);
220 cpu_latency_qos_remove_request(&crtc->vblank_pm_qos);
222 drm_crtc_cleanup(&crtc->base);
223 kfree(crtc);
226 static int intel_crtc_late_register(struct drm_crtc *crtc)
228 intel_crtc_debugfs_add(to_intel_crtc(crtc));
310 struct intel_crtc *crtc;
313 crtc = intel_crtc_alloc();
314 if (IS_ERR(crtc))
315 return PTR_ERR(crtc);
317 crtc->pipe = pipe;
318 crtc->num_scalers = DISPLAY_RUNTIME_INFO(display)->num_scalers[pipe];
328 crtc->plane_ids_mask |= BIT(primary->id);
330 intel_init_fifo_underrun_reporting(display, crtc, false);
343 crtc->plane_ids_mask |= BIT(plane->id);
351 crtc->plane_ids_mask |= BIT(cursor->id);
374 ret = drm_crtc_init_with_planes(display->drm, &crtc->base,
381 drm_crtc_create_scaling_filter_property(&crtc->base,
385 intel_color_crtc_init(crtc);
386 intel_drrs_crtc_init(crtc);
387 intel_crtc_crc_init(crtc);
389 cpu_latency_qos_add_request(&crtc->vblank_pm_qos, PM_QOS_DEFAULT_VALUE);
391 drm_WARN_ON(display->drm, drm_crtc_index(&crtc->base) != crtc->pipe);
396 intel_crtc_free(crtc);
406 struct intel_crtc *crtc;
412 crtc = to_intel_crtc(drm_crtc);
413 pipe_from_crtc_id->pipe = crtc->pipe;
436 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
438 trace_intel_crtc_vblank_work_start(crtc);
443 spin_lock_irq(&crtc->base.dev->event_lock);
444 drm_crtc_send_vblank_event(&crtc->base, crtc_state->uapi.event);
445 spin_unlock_irq(&crtc->base.dev->event_lock);
449 trace_intel_crtc_vblank_work_end(crtc);
454 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
456 drm_vblank_work_init(&crtc_state->vblank_work, &crtc->base,
462 cpu_latency_qos_update_request(&crtc->vblank_pm_qos, 0);
468 struct intel_crtc *crtc;
471 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
476 cpu_latency_qos_update_request(&crtc->vblank_pm_qos,
506 * @crtc: the crtc
517 struct intel_crtc *crtc)
521 intel_atomic_get_old_crtc_state(state, crtc);
523 intel_atomic_get_new_crtc_state(state, crtc);
533 &crtc->flip_done_event);
547 if (old_plane_state->uapi.crtc == &crtc->base)
555 if (drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base)))
567 crtc->debug.min_vbl = evade.min;
568 crtc->debug.max_vbl = evade.max;
569 trace_intel_pipe_update_start(crtc);
573 drm_crtc_vblank_put(&crtc->base);
575 crtc->debug.scanline_start = scanline;
576 crtc->debug.start_vbl_time = ktime_get();
577 crtc->debug.start_vbl_count = intel_crtc_get_vblank_counter(crtc);
579 trace_intel_pipe_update_vblank_evaded(crtc);
587 static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end)
589 u64 delta = ktime_to_ns(ktime_sub(end, crtc->debug.start_vbl_time));
593 if (h >= ARRAY_SIZE(crtc->debug.vbl.times))
594 h = ARRAY_SIZE(crtc->debug.vbl.times) - 1;
595 crtc->debug.vbl.times[h]++;
597 crtc->debug.vbl.sum += delta;
598 if (!crtc->debug.vbl.min || delta < crtc->debug.vbl.min)
599 crtc->debug.vbl.min = delta;
600 if (delta > crtc->debug.vbl.max)
601 crtc->debug.vbl.max = delta;
604 drm_dbg_kms(crtc->base.dev,
606 pipe_name(crtc->pipe),
609 crtc->debug.vbl.over++;
613 static void dbg_vblank_evade(struct intel_crtc *crtc, ktime_t end) {}
618 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
624 drm_WARN_ON(crtc->base.dev, drm_crtc_vblank_get(&crtc->base) != 0);
626 spin_lock_irqsave(&crtc->base.dev->event_lock, irqflags);
627 drm_crtc_arm_vblank_event(&crtc->base, crtc_state->uapi.event);
628 spin_unlock_irqrestore(&crtc->base.dev->event_lock, irqflags);
636 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
639 spin_lock_irqsave(&crtc->base.dev->event_lock, irqflags);
641 spin_unlock_irqrestore(&crtc->base.dev->event_lock, irqflags);
649 * @crtc: the crtc
656 struct intel_crtc *crtc)
660 intel_atomic_get_new_crtc_state(state, crtc);
661 enum pipe pipe = crtc->pipe;
662 int scanline_end = intel_get_crtc_scanline(crtc);
663 u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
665 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
672 trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end);
688 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
700 if (old_plane_state->uapi.crtc == &crtc->base &&
703 drm_crtc_accurate_vblank_count(&crtc->base) + 1,
734 if (crtc->debug.start_vbl_count &&
735 crtc->debug.start_vbl_count != end_vbl_count) {
738 pipe_name(pipe), crtc->debug.start_vbl_count,
741 crtc->debug.start_vbl_time),
742 crtc->debug.min_vbl, crtc->debug.max_vbl,
743 crtc->debug.scanline_start, scanline_end);
746 dbg_vblank_evade(crtc, end_vbl_time);