112 	struct intel_crt *crt = intel_encoder_to_crt(encoder);  in intel_crt_get_hw_state()  local
121 	ret = intel_crt_port_enabled(display, crt->adpa_reg, pipe);  in intel_crt_get_hw_state()
131 	struct intel_crt *crt = intel_encoder_to_crt(encoder);  in intel_crt_get_flags()  local
134 	tmp = intel_de_read(display, crt->adpa_reg);  in intel_crt_get_flags()
181 	struct intel_crt *crt = intel_encoder_to_crt(encoder);  in intel_crt_set_dpms()  local
222 	intel_de_write(display, crt->adpa_reg, adpa);  in intel_crt_set_dpms()
489 	struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector));  in ilk_crt_detect_hotplug()  local
495 	if (crt->force_hotplug_required) {  in ilk_crt_detect_hotplug()
499 		crt->force_hotplug_required = false;  in ilk_crt_detect_hotplug()
501 		save_adpa = adpa = intel_de_read(display, crt->adpa_reg);  in ilk_crt_detect_hotplug()
509 		intel_de_write(display, crt->adpa_reg, adpa);  in ilk_crt_detect_hotplug()
512 					    crt->adpa_reg,  in ilk_crt_detect_hotplug()
519 			intel_de_write(display, crt->adpa_reg, save_adpa);  in ilk_crt_detect_hotplug()
520 			intel_de_posting_read(display, crt->adpa_reg);  in ilk_crt_detect_hotplug()
525 	adpa = intel_de_read(display, crt->adpa_reg);  in ilk_crt_detect_hotplug()
539 	struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector));  in valleyview_crt_detect_hotplug()  local
558 	reenable_hpd = intel_hpd_disable(dev_priv, crt->base.hpd_pin);  in valleyview_crt_detect_hotplug()
560 	save_adpa = adpa = intel_de_read(display, crt->adpa_reg);  in valleyview_crt_detect_hotplug()
566 	intel_de_write(display, crt->adpa_reg, adpa);  in valleyview_crt_detect_hotplug()
568 	if (intel_de_wait_for_clear(display, crt->adpa_reg,  in valleyview_crt_detect_hotplug()
572 		intel_de_write(display, crt->adpa_reg, save_adpa);  in valleyview_crt_detect_hotplug()
576 	adpa = intel_de_read(display, crt->adpa_reg);  in valleyview_crt_detect_hotplug()
586 		intel_hpd_enable(dev_priv, crt->base.hpd_pin);  in valleyview_crt_detect_hotplug()
709 intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe)  in intel_crt_load_detect()  argument
711 	struct intel_display *display = to_intel_display(&crt->base);  in intel_crt_load_detect()
860 	struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector));  in intel_crt_detect()  local
861 	struct intel_encoder *encoder = &crt->base;  in intel_crt_detect()
932 			status = intel_crt_load_detect(crt,  in intel_crt_detect()
951 	struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector));  in intel_crt_get_modes()  local
952 	struct intel_encoder *encoder = &crt->base;  in intel_crt_get_modes()
979 	struct intel_crt *crt = intel_encoder_to_crt(to_intel_encoder(encoder));  in intel_crt_reset()  local
984 		adpa = intel_de_read(display, crt->adpa_reg);  in intel_crt_reset()
987 		intel_de_write(display, crt->adpa_reg, adpa);  in intel_crt_reset()
988 		intel_de_posting_read(display, crt->adpa_reg);  in intel_crt_reset()
991 		crt->force_hotplug_required = true;  in intel_crt_reset()
1024 	struct intel_crt *crt;  in intel_crt_init()  local
1055 	crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);  in intel_crt_init()
1056 	if (!crt)  in intel_crt_init()
1061 		kfree(crt);  in intel_crt_init()
1072 	drm_encoder_init(display->drm, &crt->base.base, &intel_crt_enc_funcs,  in intel_crt_init()
1075 	intel_connector_attach_encoder(connector, &crt->base);  in intel_crt_init()
1077 	crt->base.type = INTEL_OUTPUT_ANALOG;  in intel_crt_init()
1078 	crt->base.cloneable = BIT(INTEL_OUTPUT_DVO) | BIT(INTEL_OUTPUT_HDMI);  in intel_crt_init()
1080 		crt->base.pipe_mask = BIT(PIPE_A);  in intel_crt_init()
1082 		crt->base.pipe_mask = ~0;  in intel_crt_init()
1087 	crt->adpa_reg = adpa_reg;  in intel_crt_init()
1089 	crt->base.power_domain = POWER_DOMAIN_PORT_CRT;  in intel_crt_init()
1093 		crt->base.hpd_pin = HPD_CRT;  in intel_crt_init()
1094 		crt->base.hotplug = intel_encoder_hotplug;  in intel_crt_init()
1104 		crt->base.port = PORT_E;  in intel_crt_init()
1105 		crt->base.get_config = hsw_crt_get_config;  in intel_crt_init()
1106 		crt->base.get_hw_state = intel_ddi_get_hw_state;  in intel_crt_init()
1107 		crt->base.compute_config = hsw_crt_compute_config;  in intel_crt_init()
1108 		crt->base.pre_pll_enable = hsw_pre_pll_enable_crt;  in intel_crt_init()
1109 		crt->base.pre_enable = hsw_pre_enable_crt;  in intel_crt_init()
1110 		crt->base.enable = hsw_enable_crt;  in intel_crt_init()
1111 		crt->base.disable = hsw_disable_crt;  in intel_crt_init()
1112 		crt->base.post_disable = hsw_post_disable_crt;  in intel_crt_init()
1113 		crt->base.enable_clock = hsw_ddi_enable_clock;  in intel_crt_init()
1114 		crt->base.disable_clock = hsw_ddi_disable_clock;  in intel_crt_init()
1115 		crt->base.is_clock_enabled = hsw_ddi_is_clock_enabled;  in intel_crt_init()
1117 		intel_ddi_buf_trans_init(&crt->base);  in intel_crt_init()
1120 			crt->base.compute_config = pch_crt_compute_config;  in intel_crt_init()
1121 			crt->base.disable = pch_disable_crt;  in intel_crt_init()
1122 			crt->base.post_disable = pch_post_disable_crt;  in intel_crt_init()
1124 			crt->base.compute_config = intel_crt_compute_config;  in intel_crt_init()
1125 			crt->base.disable = intel_disable_crt;  in intel_crt_init()
1127 		crt->base.port = PORT_NONE;  in intel_crt_init()
1128 		crt->base.get_config = intel_crt_get_config;  in intel_crt_init()
1129 		crt->base.get_hw_state = intel_crt_get_hw_state;  in intel_crt_init()
1130 		crt->base.enable = intel_enable_crt;  in intel_crt_init()
1149 	intel_crt_reset(&crt->base.base);  in intel_crt_init()