Lines Matching +full:vga +full:- +full:connector
2 * Copyright © 2006-2007 Intel Corporation
85 static struct intel_crt *intel_attached_crt(struct intel_connector *connector) in intel_attached_crt() argument
87 return intel_encoder_to_crt(intel_attached_encoder(connector)); in intel_attached_crt()
93 struct drm_i915_private *dev_priv = to_i915(display->drm); in intel_crt_port_enabled()
111 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_get_hw_state()
117 encoder->power_domain); in intel_crt_get_hw_state()
121 ret = intel_crt_port_enabled(display, crt->adpa_reg, pipe); in intel_crt_get_hw_state()
123 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_crt_get_hw_state()
134 tmp = intel_de_read(display, crt->adpa_reg); in intel_crt_get_flags()
152 crtc_state->output_types |= BIT(INTEL_OUTPUT_ANALOG); in intel_crt_get_config()
154 crtc_state->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in intel_crt_get_config()
156 crtc_state->hw.adjusted_mode.crtc_clock = crtc_state->port_clock; in intel_crt_get_config()
166 crtc_state->hw.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC | in hsw_crt_get_config()
170 crtc_state->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in hsw_crt_get_config()
180 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_crt_set_dpms()
182 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crt_set_dpms()
183 const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; in intel_crt_set_dpms()
191 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) in intel_crt_set_dpms()
193 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) in intel_crt_set_dpms()
200 adpa |= ADPA_PIPE_SEL_CPT(crtc->pipe); in intel_crt_set_dpms()
202 adpa |= ADPA_PIPE_SEL(crtc->pipe); in intel_crt_set_dpms()
205 intel_de_write(display, BCLRPAT(display, crtc->pipe), 0); in intel_crt_set_dpms()
222 intel_de_write(display, crt->adpa_reg, adpa); in intel_crt_set_dpms()
254 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_disable_crt()
256 drm_WARN_ON(display->drm, !old_crtc_state->has_pch_encoder); in hsw_disable_crt()
267 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); in hsw_post_disable_crt()
268 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_post_disable_crt()
286 drm_WARN_ON(display->drm, !old_crtc_state->has_pch_encoder); in hsw_post_disable_crt()
297 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_pre_pll_enable_crt()
299 drm_WARN_ON(display->drm, !crtc_state->has_pch_encoder); in hsw_pre_pll_enable_crt()
310 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_pre_enable_crt()
311 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_pre_enable_crt()
312 enum pipe pipe = crtc->pipe; in hsw_pre_enable_crt()
314 drm_WARN_ON(display->drm, !crtc_state->has_pch_encoder); in hsw_pre_enable_crt()
329 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_enable_crt()
330 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_enable_crt()
331 enum pipe pipe = crtc->pipe; in hsw_enable_crt()
333 drm_WARN_ON(display->drm, !crtc_state->has_pch_encoder); in hsw_enable_crt()
360 intel_crt_mode_valid(struct drm_connector *connector, in intel_crt_mode_valid() argument
363 struct intel_display *display = to_intel_display(connector->dev); in intel_crt_mode_valid()
364 struct drm_i915_private *dev_priv = to_i915(connector->dev); in intel_crt_mode_valid()
365 int max_dotclk = display->cdclk.max_dotclk_freq; in intel_crt_mode_valid()
373 if (mode->clock < 25000) in intel_crt_mode_valid()
388 if (mode->clock > max_clock) in intel_crt_mode_valid()
391 if (mode->clock > max_dotclk) in intel_crt_mode_valid()
396 ilk_get_lanes_required(mode->clock, 270000, 24) > 2) in intel_crt_mode_valid()
400 if (mode->hdisplay > 4096) in intel_crt_mode_valid()
411 &crtc_state->hw.adjusted_mode; in intel_crt_compute_config()
413 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) in intel_crt_compute_config()
414 return -EINVAL; in intel_crt_compute_config()
416 crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_crt_compute_config()
417 crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_crt_compute_config()
427 &crtc_state->hw.adjusted_mode; in pch_crt_compute_config()
429 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) in pch_crt_compute_config()
430 return -EINVAL; in pch_crt_compute_config()
432 crtc_state->has_pch_encoder = true; in pch_crt_compute_config()
434 return -EINVAL; in pch_crt_compute_config()
436 crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB; in pch_crt_compute_config()
446 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_crt_compute_config()
448 &crtc_state->hw.adjusted_mode; in hsw_crt_compute_config()
450 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) in hsw_crt_compute_config()
451 return -EINVAL; in hsw_crt_compute_config()
454 if (adjusted_mode->crtc_hdisplay > 4096 || in hsw_crt_compute_config()
455 adjusted_mode->crtc_hblank_start > 4096) in hsw_crt_compute_config()
456 return -EINVAL; in hsw_crt_compute_config()
458 crtc_state->has_pch_encoder = true; in hsw_crt_compute_config()
460 return -EINVAL; in hsw_crt_compute_config()
462 crtc_state->output_format = INTEL_OUTPUT_FORMAT_RGB; in hsw_crt_compute_config()
466 /* TODO: Check crtc_state->max_link_bpp_x16 instead of bw_constrained */ in hsw_crt_compute_config()
467 if (crtc_state->bw_constrained && crtc_state->pipe_bpp < 24) { in hsw_crt_compute_config()
468 drm_dbg_kms(display->drm, in hsw_crt_compute_config()
470 return -EINVAL; in hsw_crt_compute_config()
473 crtc_state->pipe_bpp = 24; in hsw_crt_compute_config()
477 crtc_state->port_clock = 135000 * 2; in hsw_crt_compute_config()
479 crtc_state->enhanced_framing = true; in hsw_crt_compute_config()
481 adjusted_mode->crtc_clock = lpt_iclkip(crtc_state); in hsw_crt_compute_config()
486 static bool ilk_crt_detect_hotplug(struct drm_connector *connector) in ilk_crt_detect_hotplug() argument
488 struct intel_display *display = to_intel_display(connector->dev); in ilk_crt_detect_hotplug()
489 struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector)); in ilk_crt_detect_hotplug()
490 struct drm_i915_private *dev_priv = to_i915(connector->dev); in ilk_crt_detect_hotplug()
495 if (crt->force_hotplug_required) { in ilk_crt_detect_hotplug()
499 crt->force_hotplug_required = false; in ilk_crt_detect_hotplug()
501 save_adpa = adpa = intel_de_read(display, crt->adpa_reg); in ilk_crt_detect_hotplug()
502 drm_dbg_kms(display->drm, in ilk_crt_detect_hotplug()
509 intel_de_write(display, crt->adpa_reg, adpa); in ilk_crt_detect_hotplug()
512 crt->adpa_reg, in ilk_crt_detect_hotplug()
515 drm_dbg_kms(display->drm, in ilk_crt_detect_hotplug()
519 intel_de_write(display, crt->adpa_reg, save_adpa); in ilk_crt_detect_hotplug()
520 intel_de_posting_read(display, crt->adpa_reg); in ilk_crt_detect_hotplug()
525 adpa = intel_de_read(display, crt->adpa_reg); in ilk_crt_detect_hotplug()
530 drm_dbg_kms(display->drm, "ironlake hotplug adpa=0x%x, result %d\n", in ilk_crt_detect_hotplug()
536 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector) in valleyview_crt_detect_hotplug() argument
538 struct intel_display *display = to_intel_display(connector->dev); in valleyview_crt_detect_hotplug()
539 struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector)); in valleyview_crt_detect_hotplug()
540 struct drm_i915_private *dev_priv = to_i915(connector->dev); in valleyview_crt_detect_hotplug()
549 * - We enable power wells and reset the ADPA in valleyview_crt_detect_hotplug()
550 * - output_poll_exec does force probe on VGA, triggering a hpd in valleyview_crt_detect_hotplug()
551 * - HPD handler waits for poll to unlock dev->mode_config.mutex in valleyview_crt_detect_hotplug()
552 * - output_poll_exec shuts off the ADPA, unlocks in valleyview_crt_detect_hotplug()
553 * dev->mode_config.mutex in valleyview_crt_detect_hotplug()
554 * - HPD handler runs, resets ADPA and brings us back to the start in valleyview_crt_detect_hotplug()
558 reenable_hpd = intel_hpd_disable(dev_priv, crt->base.hpd_pin); in valleyview_crt_detect_hotplug()
560 save_adpa = adpa = intel_de_read(display, crt->adpa_reg); in valleyview_crt_detect_hotplug()
561 drm_dbg_kms(display->drm, in valleyview_crt_detect_hotplug()
566 intel_de_write(display, crt->adpa_reg, adpa); in valleyview_crt_detect_hotplug()
568 if (intel_de_wait_for_clear(display, crt->adpa_reg, in valleyview_crt_detect_hotplug()
570 drm_dbg_kms(display->drm, in valleyview_crt_detect_hotplug()
572 intel_de_write(display, crt->adpa_reg, save_adpa); in valleyview_crt_detect_hotplug()
576 adpa = intel_de_read(display, crt->adpa_reg); in valleyview_crt_detect_hotplug()
582 drm_dbg_kms(display->drm, in valleyview_crt_detect_hotplug()
586 intel_hpd_enable(dev_priv, crt->base.hpd_pin); in valleyview_crt_detect_hotplug()
591 static bool intel_crt_detect_hotplug(struct drm_connector *connector) in intel_crt_detect_hotplug() argument
593 struct intel_display *display = to_intel_display(connector->dev); in intel_crt_detect_hotplug()
594 struct drm_i915_private *dev_priv = to_i915(connector->dev); in intel_crt_detect_hotplug()
600 return ilk_crt_detect_hotplug(connector); in intel_crt_detect_hotplug()
603 return valleyview_crt_detect_hotplug(connector); in intel_crt_detect_hotplug()
623 drm_dbg_kms(display->drm, in intel_crt_detect_hotplug()
640 static const struct drm_edid *intel_crt_get_edid(struct drm_connector *connector, in intel_crt_get_edid() argument
645 drm_edid = drm_edid_read_ddc(connector, ddc); in intel_crt_get_edid()
648 drm_dbg_kms(connector->dev, in intel_crt_get_edid()
649 "CRT GMBUS EDID read failed, retry using GPIO bit-banging\n"); in intel_crt_get_edid()
651 drm_edid = drm_edid_read_ddc(connector, ddc); in intel_crt_get_edid()
659 static int intel_crt_ddc_get_modes(struct drm_connector *connector, in intel_crt_ddc_get_modes() argument
665 drm_edid = intel_crt_get_edid(connector, ddc); in intel_crt_ddc_get_modes()
669 ret = intel_connector_update_modes(connector, drm_edid); in intel_crt_ddc_get_modes()
676 static bool intel_crt_detect_ddc(struct drm_connector *connector) in intel_crt_detect_ddc() argument
678 struct intel_display *display = to_intel_display(connector->dev); in intel_crt_detect_ddc()
682 drm_edid = intel_crt_get_edid(connector, connector->ddc); in intel_crt_detect_ddc()
686 * This may be a DVI-I connector with a shared DDC in intel_crt_detect_ddc()
691 drm_dbg_kms(display->drm, in intel_crt_detect_ddc()
694 drm_dbg_kms(display->drm, in intel_crt_detect_ddc()
699 drm_dbg_kms(display->drm, in intel_crt_detect_ddc()
711 struct intel_display *display = to_intel_display(&crt->base); in intel_crt_load_detect()
722 drm_dbg_kms(display->drm, "starting load-detect on CRT\n"); in intel_crt_load_detect()
774 VBLANK_START(vblank_start - 1) | in intel_crt_load_detect()
775 VBLANK_END(vblank_end - 1)); in intel_crt_load_detect()
779 if (vblank_start - vactive >= vtotal - vblank_end) in intel_crt_load_detect()
798 /* Read the ST00 VGA status register */ in intel_crt_load_detect()
829 DRM_DEBUG_DRIVER("Skipping CRT detection for %s\n", id->ident); in intel_spurious_crt_detect_dmi_callback()
844 .ident = "Intel DZ77BH-55K",
847 DMI_MATCH(DMI_BOARD_NAME, "DZ77BH-55K"),
854 intel_crt_detect(struct drm_connector *connector, in intel_crt_detect() argument
858 struct intel_display *display = to_intel_display(connector->dev); in intel_crt_detect()
859 struct drm_i915_private *dev_priv = to_i915(connector->dev); in intel_crt_detect()
860 struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector)); in intel_crt_detect()
861 struct intel_encoder *encoder = &crt->base; in intel_crt_detect()
866 drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n", in intel_crt_detect()
867 connector->base.id, connector->name, in intel_crt_detect()
874 return connector->status; in intel_crt_detect()
876 if (display->params.load_detect_test) { in intel_crt_detect()
877 wakeref = intel_display_power_get(dev_priv, encoder->power_domain); in intel_crt_detect()
881 /* Skip machines without VGA that falsely report hotplug events */ in intel_crt_detect()
885 wakeref = intel_display_power_get(dev_priv, encoder->power_domain); in intel_crt_detect()
892 if (intel_crt_detect_hotplug(connector)) { in intel_crt_detect()
893 drm_dbg_kms(display->drm, in intel_crt_detect()
898 drm_dbg_kms(display->drm, in intel_crt_detect()
902 if (intel_crt_detect_ddc(connector)) { in intel_crt_detect()
918 status = connector->status; in intel_crt_detect()
922 /* for pre-945g platforms use load detect */ in intel_crt_detect()
923 state = intel_load_detect_get_pipe(connector, ctx); in intel_crt_detect()
929 if (intel_crt_detect_ddc(connector)) in intel_crt_detect()
933 to_intel_crtc(connector->state->crtc)->pipe); in intel_crt_detect()
934 else if (display->params.load_detect_test) in intel_crt_detect()
938 intel_load_detect_release_pipe(connector, state, ctx); in intel_crt_detect()
942 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_crt_detect()
947 static int intel_crt_get_modes(struct drm_connector *connector) in intel_crt_get_modes() argument
949 struct intel_display *display = to_intel_display(connector->dev); in intel_crt_get_modes()
950 struct drm_i915_private *dev_priv = to_i915(connector->dev); in intel_crt_get_modes()
951 struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector)); in intel_crt_get_modes()
952 struct intel_encoder *encoder = &crt->base; in intel_crt_get_modes()
958 return drm_edid_connector_add_modes(connector); in intel_crt_get_modes()
960 wakeref = intel_display_power_get(dev_priv, encoder->power_domain); in intel_crt_get_modes()
962 ret = intel_crt_ddc_get_modes(connector, connector->ddc); in intel_crt_get_modes()
966 /* Try to probe digital port for output in DVI-I -> VGA mode. */ in intel_crt_get_modes()
968 ret = intel_crt_ddc_get_modes(connector, ddc); in intel_crt_get_modes()
971 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_crt_get_modes()
978 struct intel_display *display = to_intel_display(encoder->dev); in intel_crt_reset()
984 adpa = intel_de_read(display, crt->adpa_reg); in intel_crt_reset()
987 intel_de_write(display, crt->adpa_reg, adpa); in intel_crt_reset()
988 intel_de_posting_read(display, crt->adpa_reg); in intel_crt_reset()
990 drm_dbg_kms(display->drm, "crt adpa set to 0x%x\n", adpa); in intel_crt_reset()
991 crt->force_hotplug_required = true; in intel_crt_reset()
1022 struct drm_i915_private *dev_priv = to_i915(display->drm); in intel_crt_init()
1023 struct intel_connector *connector; in intel_crt_init() local
1059 connector = intel_connector_alloc(); in intel_crt_init()
1060 if (!connector) { in intel_crt_init()
1065 ddc_pin = display->vbt.crt_ddc_pin; in intel_crt_init()
1067 drm_connector_init_with_ddc(display->drm, &connector->base, in intel_crt_init()
1072 drm_encoder_init(display->drm, &crt->base.base, &intel_crt_enc_funcs, in intel_crt_init()
1075 intel_connector_attach_encoder(connector, &crt->base); in intel_crt_init()
1077 crt->base.type = INTEL_OUTPUT_ANALOG; in intel_crt_init()
1078 crt->base.cloneable = BIT(INTEL_OUTPUT_DVO) | BIT(INTEL_OUTPUT_HDMI); in intel_crt_init()
1080 crt->base.pipe_mask = BIT(PIPE_A); in intel_crt_init()
1082 crt->base.pipe_mask = ~0; in intel_crt_init()
1085 connector->base.interlace_allowed = true; in intel_crt_init()
1087 crt->adpa_reg = adpa_reg; in intel_crt_init()
1089 crt->base.power_domain = POWER_DOMAIN_PORT_CRT; in intel_crt_init()
1093 crt->base.hpd_pin = HPD_CRT; in intel_crt_init()
1094 crt->base.hotplug = intel_encoder_hotplug; in intel_crt_init()
1095 connector->polled = DRM_CONNECTOR_POLL_HPD; in intel_crt_init()
1097 connector->polled = DRM_CONNECTOR_POLL_CONNECT; in intel_crt_init()
1099 connector->base.polled = connector->polled; in intel_crt_init()
1104 crt->base.port = PORT_E; in intel_crt_init()
1105 crt->base.get_config = hsw_crt_get_config; in intel_crt_init()
1106 crt->base.get_hw_state = intel_ddi_get_hw_state; in intel_crt_init()
1107 crt->base.compute_config = hsw_crt_compute_config; in intel_crt_init()
1108 crt->base.pre_pll_enable = hsw_pre_pll_enable_crt; in intel_crt_init()
1109 crt->base.pre_enable = hsw_pre_enable_crt; in intel_crt_init()
1110 crt->base.enable = hsw_enable_crt; in intel_crt_init()
1111 crt->base.disable = hsw_disable_crt; in intel_crt_init()
1112 crt->base.post_disable = hsw_post_disable_crt; in intel_crt_init()
1113 crt->base.enable_clock = hsw_ddi_enable_clock; in intel_crt_init()
1114 crt->base.disable_clock = hsw_ddi_disable_clock; in intel_crt_init()
1115 crt->base.is_clock_enabled = hsw_ddi_is_clock_enabled; in intel_crt_init()
1117 intel_ddi_buf_trans_init(&crt->base); in intel_crt_init()
1120 crt->base.compute_config = pch_crt_compute_config; in intel_crt_init()
1121 crt->base.disable = pch_disable_crt; in intel_crt_init()
1122 crt->base.post_disable = pch_post_disable_crt; in intel_crt_init()
1124 crt->base.compute_config = intel_crt_compute_config; in intel_crt_init()
1125 crt->base.disable = intel_disable_crt; in intel_crt_init()
1127 crt->base.port = PORT_NONE; in intel_crt_init()
1128 crt->base.get_config = intel_crt_get_config; in intel_crt_init()
1129 crt->base.get_hw_state = intel_crt_get_hw_state; in intel_crt_init()
1130 crt->base.enable = intel_enable_crt; in intel_crt_init()
1132 connector->get_hw_state = intel_connector_get_hw_state; in intel_crt_init()
1134 drm_connector_helper_add(&connector->base, &intel_crt_connector_helper_funcs); in intel_crt_init()
1145 display->fdi.rx_config = intel_de_read(display, in intel_crt_init()
1149 intel_crt_reset(&crt->base.base); in intel_crt_init()