Lines Matching refs:CDCLK_CTL
984 cdctl = intel_de_read(display, CDCLK_CTL);
1161 cdclk_ctl = intel_de_read(display, CDCLK_CTL);
1167 intel_de_write(display, CDCLK_CTL, cdclk_ctl);
1172 intel_de_write(display, CDCLK_CTL, cdclk_ctl);
1173 intel_de_posting_read(display, CDCLK_CTL);
1180 intel_de_write(display, CDCLK_CTL, cdclk_ctl);
1183 intel_de_write(display, CDCLK_CTL, cdclk_ctl);
1187 intel_de_write(display, CDCLK_CTL, cdclk_ctl);
1188 intel_de_posting_read(display, CDCLK_CTL);
1223 cdctl = intel_de_read(display, CDCLK_CTL);
1716 divider = intel_de_read(display, CDCLK_CTL) & BXT_CDCLK_CD2X_DIV_SEL_MASK;
2118 intel_de_write(display, CDCLK_CTL, bxt_cdclk_ctl(display, cdclk_config, pipe));
2237 * set reserved MBZ bits in CDCLK_CTL at least during exiting from S4,
2240 cdctl = intel_de_read(display, CDCLK_CTL);