Lines Matching +full:400 +full:us
49 {1, 0, 800, 400, 3382, 33382, 3983, 33983}, /* DDR2-400 SC */
55 {1, 0, 667, 400, 3400, 33400, 4021, 34021}, /* DDR2-400 SC */
61 {1, 0, 400, 400, 3472, 33472, 4173, 34173}, /* DDR2-400 SC */
62 {1, 0, 400, 667, 3443, 33443, 3996, 33996}, /* DDR2-667 SC */
63 {1, 0, 400, 800, 3430, 33430, 3946, 33946}, /* DDR2-800 SC */
64 {1, 1, 400, 667, 6509, 36509, 7062, 37062}, /* DDR3-667 SC */
65 {1, 1, 400, 800, 5985, 35985, 6501, 36501}, /* DDR3-800 SC */
67 {0, 0, 800, 400, 3438, 33438, 4065, 34065}, /* DDR2-400 SC */
73 {0, 0, 667, 400, 3456, 33456, 4103, 34106}, /* DDR2-400 SC */
79 {0, 0, 400, 400, 3528, 33528, 4255, 34255}, /* DDR2-400 SC */
80 {0, 0, 400, 667, 3500, 33500, 4079, 34079}, /* DDR2-667 SC */
81 {0, 0, 400, 800, 3487, 33487, 4029, 34029}, /* DDR2-800 SC */
82 {0, 1, 400, 667, 6566, 36566, 7145, 37145}, /* DDR3-667 SC */
83 {0, 1, 400, 800, 6042, 36042, 6584, 36584}, /* DDR3-800 SC */
266 * A value of 5us seems to be a good balance; safe for very low end
446 * @latency: Memory wakeup latency in 0.1us units
493 * @latency: Memory wakeup latency in 0.1us units
1470 /* latency must be in 0.1us units. */
1878 * uncore.lock serves a double purpose here. It allows us to
1884 * for us, so a plain spin_lock() is sufficient here.
2382 /* latency must be in 0.1us units. */
2395 /* latency must be in 0.1us units. */
2436 * mem_value must be in 0.1us units.
2468 * mem_value must be in 0.1us units.
2495 * mem_value must be in 0.1us units.
2713 /* WM1+ latency values stored in 0.5us units */