Lines Matching refs:cap
14 switch (dp->link.cap.link_rate) {
35 dp->link.cap.lanes == 0x2 ? 0x3 : 0x1);
37 dp->link.cap.lanes == 0x2 ? 0x1 : 0);
43 buf[0] = dp->link.cap.link_rate;
44 buf[1] = DP_LANE_COUNT_ENHANCED_FRAME_EN | dp->link.cap.lanes;
122 for (i = 0; i < dp->link.cap.lanes; i++)
129 ret = drm_dp_dpcd_write(dp->aux, DP_TRAINING_LANE0_SET, train_set, dp->link.cap.lanes);
130 if (ret != dp->link.cap.lanes) {
144 for (lane = 0; lane < dp->link.cap.lanes; lane++)
160 switch (dp->link.cap.link_rate) {
162 dp->link.cap.link_rate = DP_LINK_BW_1_62;
165 dp->link.cap.link_rate = DP_LINK_BW_2_7;
168 dp->link.cap.link_rate = DP_LINK_BW_5_4;
183 switch (dp->link.cap.lanes) {
185 dp->link.cap.lanes--;
221 if (drm_dp_clock_recovery_ok(lane_status, dp->link.cap.lanes)) {
240 dp->link.cap.lanes);
241 if (ret != dp->link.cap.lanes) {
274 if (!drm_dp_clock_recovery_ok(lane_status, dp->link.cap.lanes)) {
281 if (drm_dp_channel_eq_ok(lane_status, dp->link.cap.lanes)) {
294 dp->link.train_set, dp->link.cap.lanes);
295 if (ret != dp->link.cap.lanes) {
337 dp->link.cap.link_rate = dp->dpcd[DP_MAX_LINK_RATE];
338 dp->link.cap.lanes = 0x2;