33 	/* DP 2 lane */  in hibmc_dp_link_training_configure()
42 	/* set rate and lane count */  in hibmc_dp_link_training_configure()
131 		drm_dbg_dp(dp->dev, "dp aux write training lane set failed\n");  in hibmc_dp_link_training_cr_pre()
142 	u8 lane;  in hibmc_dp_link_get_adjust_train()  local
144 	for (lane = 0; lane < dp->link.cap.lanes; lane++)  in hibmc_dp_link_get_adjust_train()
145 		train_set[lane] = drm_dp_get_adjust_request_voltage(lane_status, lane) |  in hibmc_dp_link_get_adjust_train()
146 				  drm_dp_get_adjust_request_pre_emphasis(lane_status, lane);  in hibmc_dp_link_get_adjust_train()
186 		drm_dbg_dp(dp->dev, "dp link training reduce to 1 lane\n");  in hibmc_dp_link_reduce_lane()
189 		drm_err(dp->dev, "dp link training reduce lane failed, already reach minimum\n");  in hibmc_dp_link_reduce_lane()
217 			drm_err(dp->dev, "Get lane status failed\n");  in hibmc_dp_link_training_cr()
270 			drm_err(dp->dev, "get lane status failed\n");  in hibmc_dp_link_training_channel_eq()