Lines Matching refs:dtd
692 struct psb_intel_sdvo_dtd *dtd)
694 return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
695 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
699 struct psb_intel_sdvo_dtd *dtd)
702 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
706 struct psb_intel_sdvo_dtd *dtd)
709 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
737 struct psb_intel_sdvo_dtd *dtd)
739 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
740 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
742 &dtd->part1, sizeof(dtd->part1)) &&
744 &dtd->part2, sizeof(dtd->part2));
752 static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd,
772 dtd->part1.clock = mode->clock / 10;
773 dtd->part1.h_active = width & 0xff;
774 dtd->part1.h_blank = h_blank_len & 0xff;
775 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
777 dtd->part1.v_active = height & 0xff;
778 dtd->part1.v_blank = v_blank_len & 0xff;
779 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
782 dtd->part2.h_sync_off = h_sync_offset & 0xff;
783 dtd->part2.h_sync_width = h_sync_len & 0xff;
784 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
786 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
790 dtd->part2.dtd_flags = 0x18;
792 dtd->part2.dtd_flags |= 0x2;
794 dtd->part2.dtd_flags |= 0x4;
796 dtd->part2.sdvo_flags = 0;
797 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
798 dtd->part2.reserved = 0;
802 const struct psb_intel_sdvo_dtd *dtd)
804 mode->hdisplay = dtd->part1.h_active;
805 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
806 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
807 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
808 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
809 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
810 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
811 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
813 mode->vdisplay = dtd->part1.v_active;
814 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
816 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
817 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
818 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
820 (dtd->part2.v_sync_off_width & 0xf);
821 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
822 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
823 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
825 mode->clock = dtd->part1.clock * 10;
828 if (dtd->part2.dtd_flags & 0x2)
830 if (dtd->part2.dtd_flags & 0x4)